{"header":{"message":"Fix incomplete import of LLVM","description":null,"timestamp":"2024-04-30T03:23:54.377302458Z","authors":[{}]},"hash":"N4X2X2YYQCKXNP6DZONO3LBVKHTXETWQDC3OWMNM5DEMJ3KPDBVQC","authors":[{"key":"HEoBdDazRMaEHRZYU3bhWF1H1nw4HPwSGacwHU3HCqdH"}],"deps":{"hashes":[["N4X2X2YYQCKXNP6DZONO3LBVKHTXETWQDC3OWMNM5DEMJ3KPDBVQC","Fix incomplete import of LLVM"],["AA",null],["7OVOGA6QKF5OJXOT6VP4Y6GOFI2ZZSBBK3QNK7CPFGN74F7O6HAAC","Import LLVM @ 15.0.7"]],"deps":["7OVOGA6QKF5OJXOT6VP4Y6GOFI2ZZSBBK3QNK7CPFGN74F7O6HAAC"],"known":[]},"hunks":[{"FileAdd":{"meta":{"basename":"unittest.cfg.in","metadata":0},"context":[{"change":2,"pos":7008862}],"contents":[{"Add":"@LLVM_UNITTEST_SOURCE_DIR@"}]}},{"FileAdd":{"meta":{"basename":"tools","metadata":576},"context":[{"change":2,"pos":7008862}],"contents":[]}},{"FileAdd":{"meta":{"basename":"llvm-profgen","metadata":576},"context":[{"change":0,"pos":71}],"contents":[]}},{"FileAdd":{"meta":{"basename":"ContextCompressionTest.cpp","metadata":0},"context":[{"change":0,"pos":90}],"contents":[{"Add":"//===-- ContextCompressionTest.cpp -------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"../tools/llvm-profgen/ProfileGenerator.h\""},{"Add":"#include \"llvm/DebugInfo/Symbolize/SymbolizableModule.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"using namespace llvm;"},{"Add":"using namespace sampleprof;"},{"Add":""},{"Add":"TEST(TestCompression, TestNoSizeLimit1) {"},{"Add":" SmallVector Context = {\"a\", \"b\", \"c\", \"a\", \"b\", \"c\"};"},{"Add":" SmallVector Expect = {\"a\", \"b\", \"c\"};"},{"Add":" CSProfileGenerator::compressRecursionContext(Context, -1);"},{"Add":" EXPECT_TRUE(std::equal(Context.begin(), Context.end(), Expect.begin()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(TestCompression, TestNoSizeLimit2) {"},{"Add":" SmallVector Context = {\"m\", \"a\", \"a\", \"b\", \"c\", \"a\","},{"Add":" \"b\", \"c\", \"b\", \"c\", \"d\"};"},{"Add":" SmallVector Expect = {\"m\", \"a\", \"b\", \"c\", \"d\"};"},{"Add":" CSProfileGenerator::compressRecursionContext(Context, -1);"},{"Add":" EXPECT_TRUE(std::equal(Context.begin(), Context.end(), Expect.begin()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(TestCompression, TestMaxDedupSize) {"},{"Add":" SmallVector Context = {\"m\", \"a\", \"a\", \"b\", \"c\", \"a\","},{"Add":" \"b\", \"c\", \"b\", \"c\", \"d\"};"},{"Add":" SmallVector Expect = {\"m\", \"a\", \"b\", \"c\","},{"Add":" \"a\", \"b\", \"c\", \"d\"};"},{"Add":" CSProfileGenerator::compressRecursionContext(Context, 2);"},{"Add":" EXPECT_TRUE(std::equal(Context.begin(), Context.end(), Expect.begin()));"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":90}],"contents":[{"Add":"set(LLVM_LINK_COMPONENTS"},{"Add":" Support"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_unittest(LLVMProfgenTests"},{"Add":" ContextCompressionTest.cpp"},{"Add":" )"},{"Add":""},{"Add":"target_link_libraries(LLVMProfgenTests PRIVATE LLVMTestingSupport)"},{"Add":""},{"Add":"add_dependencies(LLVMProfgenTests intrinsics_gen)"},{"Add":""},{"Add":"set_property(TARGET LLVMProfgenTests PROPERTY FOLDER \"Tests/UnitTests/ToolTests\")"}]}},{"FileAdd":{"meta":{"basename":"llvm-mca","metadata":576},"context":[{"change":0,"pos":71}],"contents":[]}},{"FileAdd":{"meta":{"basename":"X86","metadata":576},"context":[{"change":0,"pos":2221}],"contents":[]}},{"FileAdd":{"meta":{"basename":"X86TestBase.h","metadata":0},"context":[{"change":0,"pos":2243}],"contents":[{"Add":"//===---- X86TestBase.h -----------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"// Test fixture common to all X86 MCA tests."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMMCA_X86_X86TESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMMCA_X86_X86TESTBASE_H"},{"Add":""},{"Add":"#include \"MCATestBase.h\""},{"Add":"#include \"llvm/ADT/SmallVector.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace mca {"},{"Add":""},{"Add":"class X86TestBase : public MCATestBase {"},{"Add":"protected:"},{"Add":" X86TestBase();"},{"Add":""},{"Add":" void getSimpleInsts(SmallVectorImpl &Insts, unsigned Repeats = 1);"},{"Add":"};"},{"Add":""},{"Add":"} // end namespace mca"},{"Add":"} // end namespace llvm"},{"Add":""},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"X86TestBase.cpp","metadata":0},"context":[{"change":0,"pos":2243}],"contents":[{"Add":"#include \"X86TestBase.h\""},{"Add":"#include \"MCTargetDesc/X86MCTargetDesc.h\""},{"Add":"#include \"llvm/MC/MCInstBuilder.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":""},{"Add":"using namespace llvm;"},{"Add":"using namespace mca;"},{"Add":""},{"Add":"X86TestBase::X86TestBase() : MCATestBase(\"x86_64-unknown-linux\", \"skylake\") {"},{"Add":" LLVMInitializeX86TargetInfo();"},{"Add":" LLVMInitializeX86TargetMC();"},{"Add":" LLVMInitializeX86Target();"},{"Add":" LLVMInitializeX86AsmPrinter();"},{"Add":"}"},{"Add":""},{"Add":"void X86TestBase::getSimpleInsts(SmallVectorImpl &Insts,"},{"Add":" unsigned Repeats) {"},{"Add":" for (unsigned i = 0U; i < Repeats; ++i) {"},{"Add":" // vmulps %xmm0, %xmm1, %xmm2"},{"Add":" Insts.push_back(MCInstBuilder(X86::VMULPSrr)"},{"Add":" .addReg(X86::XMM2)"},{"Add":" .addReg(X86::XMM1)"},{"Add":" .addReg(X86::XMM0));"},{"Add":" // vhaddps %xmm2, %xmm2, %xmm3"},{"Add":" Insts.push_back(MCInstBuilder(X86::VHADDPSrr)"},{"Add":" .addReg(X86::XMM3)"},{"Add":" .addReg(X86::XMM2)"},{"Add":" .addReg(X86::XMM2));"},{"Add":" // vhaddps %xmm3, %xmm3, %xmm4"},{"Add":" Insts.push_back(MCInstBuilder(X86::VHADDPSrr)"},{"Add":" .addReg(X86::XMM4)"},{"Add":" .addReg(X86::XMM3)"},{"Add":" .addReg(X86::XMM3));"},{"Add":" }"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"TestIncrementalMCA.cpp","metadata":0},"context":[{"change":0,"pos":2243}],"contents":[{"Add":"#include \"Views/SummaryView.h\""},{"Add":"#include \"X86TestBase.h\""},{"Add":"#include \"llvm/ADT/SmallPtrSet.h\""},{"Add":"#include \"llvm/MCA/CustomBehaviour.h\""},{"Add":"#include \"llvm/MCA/IncrementalSourceMgr.h\""},{"Add":"#include \"llvm/MCA/InstrBuilder.h\""},{"Add":"#include \"llvm/MCA/Pipeline.h\""},{"Add":"#include \"llvm/Support/Format.h\""},{"Add":"#include \"llvm/Support/JSON.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include "},{"Add":""},{"Add":"using namespace llvm;"},{"Add":"using namespace mca;"},{"Add":""},{"Add":"TEST_F(X86TestBase, TestResumablePipeline) {"},{"Add":" mca::Context MCA(*MRI, *STI);"},{"Add":""},{"Add":" mca::IncrementalSourceMgr ISM;"},{"Add":" // Empty CustomBehaviour."},{"Add":" auto CB = std::make_unique(*STI, ISM, *MCII);"},{"Add":""},{"Add":" auto PO = getDefaultPipelineOptions();"},{"Add":" auto P = MCA.createDefaultPipeline(PO, ISM, *CB);"},{"Add":" ASSERT_TRUE(P);"},{"Add":""},{"Add":" SmallVector MCIs;"},{"Add":" getSimpleInsts(MCIs, /*Repeats=*/100);"},{"Add":""},{"Add":" // Add views."},{"Add":" auto SV = std::make_unique(STI->getSchedModel(), MCIs,"},{"Add":" PO.DispatchWidth);"},{"Add":" P->addEventListener(SV.get());"},{"Add":""},{"Add":" mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());"},{"Add":""},{"Add":" // Tile size = 7"},{"Add":" for (unsigned i = 0U, E = MCIs.size(); i < E;) {"},{"Add":" for (unsigned TE = i + 7; i < TE && i < E; ++i) {"},{"Add":" Expected> InstOrErr ="},{"Add":" IB.createInstruction(MCIs[i]);"},{"Add":" ASSERT_TRUE(bool(InstOrErr));"},{"Add":" ISM.addInst(std::move(InstOrErr.get()));"},{"Add":" }"},{"Add":""},{"Add":" // Run the pipeline."},{"Add":" Expected Cycles = P->run();"},{"Add":" if (!Cycles) {"},{"Add":" // Should be a stream pause error."},{"Add":" ASSERT_TRUE(Cycles.errorIsA());"},{"Add":" llvm::consumeError(Cycles.takeError());"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" ISM.endOfStream();"},{"Add":" // Has to terminate properly."},{"Add":" Expected Cycles = P->run();"},{"Add":" ASSERT_TRUE(bool(Cycles));"},{"Add":""},{"Add":" json::Value Result = SV->toJSON();"},{"Add":" auto *ResultObj = Result.getAsObject();"},{"Add":" ASSERT_TRUE(ResultObj);"},{"Add":""},{"Add":" // Run the baseline."},{"Add":" json::Object BaselineResult;"},{"Add":" auto E = runBaselineMCA(BaselineResult, MCIs);"},{"Add":" ASSERT_FALSE(bool(E)) << \"Failed to run baseline\";"},{"Add":" auto *BaselineObj = BaselineResult.getObject(SV->getNameAsString());"},{"Add":" ASSERT_TRUE(BaselineObj) << \"Does not contain SummaryView result\";"},{"Add":""},{"Add":" // Compare the results."},{"Add":" constexpr const char *Fields[] = {\"Instructions\", \"TotalCycles\", \"TotaluOps\","},{"Add":" \"BlockRThroughput\"};"},{"Add":" for (const auto *F : Fields) {"},{"Add":" auto V = ResultObj->getInteger(F);"},{"Add":" auto BV = BaselineObj->getInteger(F);"},{"Add":" ASSERT_TRUE(V && BV);"},{"Add":" ASSERT_EQ(*BV, *V) << \"Value of '\" << F << \"' does not match\";"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86TestBase, TestInstructionRecycling) {"},{"Add":" mca::Context MCA(*MRI, *STI);"},{"Add":""},{"Add":" std::unordered_map>"},{"Add":" RecycledInsts;"},{"Add":" auto GetRecycledInst = [&](const mca::InstrDesc &Desc) -> mca::Instruction * {"},{"Add":" auto It = RecycledInsts.find(&Desc);"},{"Add":" if (It != RecycledInsts.end()) {"},{"Add":" auto &Insts = It->second;"},{"Add":" if (Insts.size()) {"},{"Add":" mca::Instruction *I = *Insts.begin();"},{"Add":" Insts.erase(I);"},{"Add":" return I;"},{"Add":" }"},{"Add":" }"},{"Add":" return nullptr;"},{"Add":" };"},{"Add":" auto AddRecycledInst = [&](mca::Instruction *I) {"},{"Add":" const mca::InstrDesc &D = I->getDesc();"},{"Add":" RecycledInsts[&D].insert(I);"},{"Add":" };"},{"Add":""},{"Add":" mca::IncrementalSourceMgr ISM;"},{"Add":" ISM.setOnInstFreedCallback(AddRecycledInst);"},{"Add":""},{"Add":" // Empty CustomBehaviour."},{"Add":" auto CB = std::make_unique(*STI, ISM, *MCII);"},{"Add":""},{"Add":" auto PO = getDefaultPipelineOptions();"},{"Add":" auto P = MCA.createDefaultPipeline(PO, ISM, *CB);"},{"Add":" ASSERT_TRUE(P);"},{"Add":""},{"Add":" SmallVector MCIs;"},{"Add":" getSimpleInsts(MCIs, /*Repeats=*/100);"},{"Add":""},{"Add":" // Add views."},{"Add":" auto SV = std::make_unique(STI->getSchedModel(), MCIs,"},{"Add":" PO.DispatchWidth);"},{"Add":" P->addEventListener(SV.get());"},{"Add":""},{"Add":" mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());"},{"Add":" IB.setInstRecycleCallback(GetRecycledInst);"},{"Add":""},{"Add":" // Tile size = 7"},{"Add":" for (unsigned i = 0U, E = MCIs.size(); i < E;) {"},{"Add":" for (unsigned TE = i + 7; i < TE && i < E; ++i) {"},{"Add":" Expected> InstOrErr ="},{"Add":" IB.createInstruction(MCIs[i]);"},{"Add":""},{"Add":" if (!InstOrErr) {"},{"Add":" mca::Instruction *RecycledInst = nullptr;"},{"Add":" // Check if the returned instruction is a recycled"},{"Add":" // one."},{"Add":" auto RemainingE = handleErrors(InstOrErr.takeError(),"},{"Add":" [&](const mca::RecycledInstErr &RC) {"},{"Add":" RecycledInst = RC.getInst();"},{"Add":" });"},{"Add":" ASSERT_FALSE(bool(RemainingE));"},{"Add":" ASSERT_TRUE(RecycledInst);"},{"Add":" ISM.addRecycledInst(RecycledInst);"},{"Add":" } else {"},{"Add":" ISM.addInst(std::move(InstOrErr.get()));"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" // Run the pipeline."},{"Add":" Expected Cycles = P->run();"},{"Add":" if (!Cycles) {"},{"Add":" // Should be a stream pause error."},{"Add":" ASSERT_TRUE(Cycles.errorIsA());"},{"Add":" llvm::consumeError(Cycles.takeError());"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" ISM.endOfStream();"},{"Add":" // Has to terminate properly."},{"Add":" Expected Cycles = P->run();"},{"Add":" ASSERT_TRUE(bool(Cycles));"},{"Add":""},{"Add":" json::Value Result = SV->toJSON();"},{"Add":" auto *ResultObj = Result.getAsObject();"},{"Add":" ASSERT_TRUE(ResultObj);"},{"Add":""},{"Add":" // Run the baseline."},{"Add":" json::Object BaselineResult;"},{"Add":" auto E = runBaselineMCA(BaselineResult, MCIs);"},{"Add":" ASSERT_FALSE(bool(E)) << \"Failed to run baseline\";"},{"Add":" auto *BaselineObj = BaselineResult.getObject(SV->getNameAsString());"},{"Add":" ASSERT_TRUE(BaselineObj) << \"Does not contain SummaryView result\";"},{"Add":""},{"Add":" // Compare the results."},{"Add":" constexpr const char *Fields[] = {\"Instructions\", \"TotalCycles\", \"TotaluOps\","},{"Add":" \"BlockRThroughput\"};"},{"Add":" for (const auto *F : Fields) {"},{"Add":" auto V = ResultObj->getInteger(F);"},{"Add":" auto BV = BaselineObj->getInteger(F);"},{"Add":" ASSERT_TRUE(V && BV);"},{"Add":" ASSERT_EQ(*BV, *V) << \"Value of '\" << F << \"' does not match\";"},{"Add":" }"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":2243}],"contents":[{"Add":"add_llvm_mca_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/X86"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/X86"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_mca_unittest_sources("},{"Add":" TestIncrementalMCA.cpp"},{"Add":" X86TestBase.cpp"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_mca_unittest_link_components("},{"Add":" X86"},{"Add":" )"}]}},{"FileAdd":{"meta":{"basename":"MCATestBase.h","metadata":0},"context":[{"change":0,"pos":2221}],"contents":[{"Add":"//===---- MCATestBase.h -----------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"// Test fixture common to all MCA tests."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMMCA_MCATESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMMCA_MCATESTBASE_H"},{"Add":""},{"Add":"#include \"llvm/ADT/StringRef.h\""},{"Add":"#include \"llvm/ADT/Triple.h\""},{"Add":"#include \"llvm/MC/MCAsmInfo.h\""},{"Add":"#include \"llvm/MC/MCContext.h\""},{"Add":"#include \"llvm/MC/MCInst.h\""},{"Add":"#include \"llvm/MC/MCInstPrinter.h\""},{"Add":"#include \"llvm/MC/MCInstrAnalysis.h\""},{"Add":"#include \"llvm/MC/MCInstrInfo.h\""},{"Add":"#include \"llvm/MC/MCObjectFileInfo.h\""},{"Add":"#include \"llvm/MC/MCRegisterInfo.h\""},{"Add":"#include \"llvm/MC/MCSubtargetInfo.h\""},{"Add":"#include \"llvm/MC/MCTargetOptions.h\""},{"Add":"#include \"llvm/MC/SubtargetFeature.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/MCA/Context.h\""},{"Add":""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace json {"},{"Add":"class Object;"},{"Add":"} // end namespace json"},{"Add":""},{"Add":"namespace mca {"},{"Add":"class View;"},{"Add":""},{"Add":"class MCATestBase : public ::testing::Test {"},{"Add":"protected:"},{"Add":" // Note: Subclass ctors are expected to perform target-specific"},{"Add":" // initializations."},{"Add":" MCATestBase(StringRef TripleStr, StringRef CPUName, StringRef MAttr = \"\")"},{"Add":" : TheTriple(TripleStr), CPUName(CPUName), MAttr(MAttr) {}"},{"Add":""},{"Add":" /// Factory function to create a Target."},{"Add":" virtual const Target *getLLVMTarget() const;"},{"Add":""},{"Add":" /// Factory function to create a MCTargetOptions instance. Returns an"},{"Add":" /// empty one by default."},{"Add":" virtual MCTargetOptions getMCTargetOptions() { return MCTargetOptions(); }"},{"Add":""},{"Add":" const Target *TheTarget;"},{"Add":" const Triple TheTriple;"},{"Add":" StringRef CPUName;"},{"Add":" StringRef MAttr;"},{"Add":""},{"Add":" // MC components."},{"Add":" std::unique_ptr STI;"},{"Add":" std::unique_ptr MRI;"},{"Add":" std::unique_ptr MAI;"},{"Add":" std::unique_ptr MOFI;"},{"Add":" std::unique_ptr Ctx;"},{"Add":" std::unique_ptr MCII;"},{"Add":" std::unique_ptr MCIA;"},{"Add":" std::unique_ptr IP;"},{"Add":""},{"Add":" static mca::PipelineOptions getDefaultPipelineOptions();"},{"Add":""},{"Add":" void SetUp() override;"},{"Add":""},{"Add":" /// Utility function to run MCA with (nearly) the same configuration as the"},{"Add":" /// `llvm-mca` tool to verify result correctness."},{"Add":" /// This function only displays on SummaryView by default."},{"Add":" virtual Error runBaselineMCA(json::Object &Result, ArrayRef Insts,"},{"Add":" ArrayRef Views = None,"},{"Add":" const mca::PipelineOptions *PO = nullptr);"},{"Add":"};"},{"Add":""},{"Add":"} // end namespace mca"},{"Add":"} // end namespace llvm"},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"MCATestBase.cpp","metadata":0},"context":[{"change":0,"pos":2221}],"contents":[{"Add":"#include \"MCATestBase.h\""},{"Add":"#include \"Views/SummaryView.h\""},{"Add":"#include \"llvm/MCA/CustomBehaviour.h\""},{"Add":"#include \"llvm/MCA/InstrBuilder.h\""},{"Add":"#include \"llvm/MCA/Pipeline.h\""},{"Add":"#include \"llvm/MCA/SourceMgr.h\""},{"Add":"#include \"llvm/MCA/View.h\""},{"Add":"#include \"llvm/Support/JSON.h\""},{"Add":"#include \"llvm/Support/WithColor.h\""},{"Add":"#include "},{"Add":""},{"Add":"using namespace llvm;"},{"Add":"using namespace mca;"},{"Add":""},{"Add":"const Target *MCATestBase::getLLVMTarget() const {"},{"Add":" std::string Error;"},{"Add":" return TargetRegistry::lookupTarget(TheTriple.getTriple(), Error);"},{"Add":"}"},{"Add":""},{"Add":"mca::PipelineOptions MCATestBase::getDefaultPipelineOptions() {"},{"Add":" mca::PipelineOptions PO(/*MicroOpQueue=*/0, /*DecoderThroughput=*/0,"},{"Add":" /*DispatchWidth=*/0,"},{"Add":" /*RegisterFileSize=*/0,"},{"Add":" /*LoadQueueSize=*/0, /*StoreQueueSize=*/0,"},{"Add":" /*AssumeNoAlias=*/true,"},{"Add":" /*EnableBottleneckAnalysis=*/false);"},{"Add":" return PO;"},{"Add":"}"},{"Add":""},{"Add":"void MCATestBase::SetUp() {"},{"Add":" TheTarget = getLLVMTarget();"},{"Add":" ASSERT_NE(TheTarget, nullptr);"},{"Add":""},{"Add":" StringRef TripleName = TheTriple.getTriple();"},{"Add":""},{"Add":" STI.reset(TheTarget->createMCSubtargetInfo(TripleName, CPUName, MAttr));"},{"Add":" ASSERT_TRUE(STI);"},{"Add":" ASSERT_TRUE(STI->isCPUStringValid(CPUName));"},{"Add":""},{"Add":" MRI.reset(TheTarget->createMCRegInfo(TripleName));"},{"Add":" ASSERT_TRUE(MRI);"},{"Add":""},{"Add":" auto MCOptions = getMCTargetOptions();"},{"Add":" MAI.reset(TheTarget->createMCAsmInfo(*MRI, TripleName, MCOptions));"},{"Add":" ASSERT_TRUE(MAI);"},{"Add":""},{"Add":" Ctx = std::make_unique(TheTriple, MAI.get(), MRI.get(), STI.get());"},{"Add":" MOFI.reset(TheTarget->createMCObjectFileInfo(*Ctx, /*PIC=*/false));"},{"Add":" Ctx->setObjectFileInfo(MOFI.get());"},{"Add":""},{"Add":" MCII.reset(TheTarget->createMCInstrInfo());"},{"Add":" ASSERT_TRUE(MCII);"},{"Add":""},{"Add":" MCIA.reset(TheTarget->createMCInstrAnalysis(MCII.get()));"},{"Add":" ASSERT_TRUE(MCIA);"},{"Add":""},{"Add":" IP.reset(TheTarget->createMCInstPrinter(TheTriple, /*AssemblerDialect=*/0,"},{"Add":" *MAI, *MCII, *MRI));"},{"Add":" ASSERT_TRUE(IP);"},{"Add":"}"},{"Add":""},{"Add":"Error MCATestBase::runBaselineMCA(json::Object &Result, ArrayRef Insts,"},{"Add":" ArrayRef Views,"},{"Add":" const mca::PipelineOptions *PO) {"},{"Add":" mca::Context MCA(*MRI, *STI);"},{"Add":""},{"Add":" mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());"},{"Add":""},{"Add":" SmallVector> LoweredInsts;"},{"Add":" for (const auto &MCI : Insts) {"},{"Add":" Expected> Inst ="},{"Add":" IB.createInstruction(MCI);"},{"Add":" if (!Inst) {"},{"Add":" if (auto NewE ="},{"Add":" handleErrors(Inst.takeError(),"},{"Add":" [this](const mca::InstructionError &IE) {"},{"Add":" std::string InstructionStr;"},{"Add":" raw_string_ostream SS(InstructionStr);"},{"Add":" WithColor::error() << IE.Message << '\\n';"},{"Add":" IP->printInst(&IE.Inst, 0, \"\", *STI, SS);"},{"Add":" WithColor::note()"},{"Add":" << \"instruction: \" << InstructionStr << '\\n';"},{"Add":" })) {"},{"Add":" // Default case."},{"Add":" return NewE;"},{"Add":" }"},{"Add":" } else {"},{"Add":" LoweredInsts.emplace_back(std::move(Inst.get()));"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" mca::CircularSourceMgr SM(LoweredInsts, /*Iterations=*/1);"},{"Add":""},{"Add":" // Empty CustomBehaviour."},{"Add":" auto CB = std::make_unique(*STI, SM, *MCII);"},{"Add":""},{"Add":" mca::PipelineOptions ThePO = PO ? *PO : getDefaultPipelineOptions();"},{"Add":" auto P = MCA.createDefaultPipeline(ThePO, SM, *CB);"},{"Add":""},{"Add":" SmallVector, 1> DefaultViews;"},{"Add":" if (Views.empty()) {"},{"Add":" // By default, we only add SummaryView."},{"Add":" auto SV = std::make_unique(STI->getSchedModel(), Insts,"},{"Add":" ThePO.DispatchWidth);"},{"Add":" P->addEventListener(SV.get());"},{"Add":" DefaultViews.emplace_back(std::move(SV));"},{"Add":" } else {"},{"Add":" for (auto *V : Views)"},{"Add":" P->addEventListener(V);"},{"Add":" }"},{"Add":""},{"Add":" // Run the pipeline."},{"Add":" Expected Cycles = P->run();"},{"Add":" if (!Cycles)"},{"Add":" return Cycles.takeError();"},{"Add":""},{"Add":" for (const auto *V : Views)"},{"Add":" Result[V->getNameAsString()] = V->toJSON();"},{"Add":" for (const auto &V : DefaultViews)"},{"Add":" Result[V->getNameAsString()] = V->toJSON();"},{"Add":""},{"Add":" return Error::success();"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":2221}],"contents":[{"Add":"set(LLVM_LINK_COMPONENTS"},{"Add":" MC"},{"Add":" MCA"},{"Add":" Object"},{"Add":" Support"},{"Add":" )"},{"Add":""},{"Add":"set(mca_root ${LLVM_MAIN_SRC_DIR}/tools/llvm-mca)"},{"Add":""},{"Add":"set(mca_includes"},{"Add":" ${CMAKE_CURRENT_SOURCE_DIR}"},{"Add":" ${mca_root}"},{"Add":" )"},{"Add":""},{"Add":"# Right now we only need SummaryView."},{"Add":"set(mca_views_sources"},{"Add":" SummaryView.cpp"},{"Add":" )"},{"Add":"list(TRANSFORM mca_views_sources PREPEND \"${mca_root}/Views/\")"},{"Add":""},{"Add":"set(mca_sources"},{"Add":" MCATestBase.cpp"},{"Add":" ${mca_views_sources}"},{"Add":" )"},{"Add":""},{"Add":"function(add_llvm_mca_unittest_includes)"},{"Add":" set(mca_includes ${mca_includes} ${ARGV} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"function(add_llvm_mca_unittest_sources)"},{"Add":" set(sources ${ARGV})"},{"Add":" list(TRANSFORM sources PREPEND \"${CMAKE_CURRENT_LIST_DIR}/\")"},{"Add":" set(mca_sources ${mca_sources} ${sources} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"function(add_llvm_mca_unittest_link_components comps)"},{"Add":" set(LLVM_LINK_COMPONENTS ${LLVM_LINK_COMPONENTS} ${ARGV} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"X86\")"},{"Add":" include(X86/CMakeLists.txt)"},{"Add":"endif()"},{"Add":""},{"Add":"list(REMOVE_DUPLICATES LLVM_LINK_COMPONENTS)"},{"Add":""},{"Add":"include_directories(${mca_includes})"},{"Add":""},{"Add":"add_llvm_target_unittest(LLVMMCATests"},{"Add":" ${mca_sources}"},{"Add":" )"},{"Add":""},{"Add":"set_property(TARGET LLVMMCATests PROPERTY FOLDER \"Tests/UnitTests/ToolTests\")"}]}},{"FileAdd":{"meta":{"basename":"llvm-exegesis","metadata":576},"context":[{"change":0,"pos":71}],"contents":[]}},{"FileAdd":{"meta":{"basename":"X86","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"TestBase.h","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- TestBase.h ----------------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"// Test fixture common to all X86 tests."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_X86_TESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_X86_TESTBASE_H"},{"Add":""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"class X86TestBase : public ::testing::Test {"},{"Add":"protected:"},{"Add":" X86TestBase() : State(\"x86_64-unknown-linux\", \"haswell\") {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeX86TargetInfo();"},{"Add":" LLVMInitializeX86TargetMC();"},{"Add":" LLVMInitializeX86Target();"},{"Add":" LLVMInitializeX86AsmPrinter();"},{"Add":" LLVMInitializeX86AsmParser();"},{"Add":" InitializeX86ExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" const LLVMState State;"},{"Add":"};"},{"Add":""},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"},{"Add":""},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"TargetTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- TargetTest.cpp -----------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Target.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"MCTargetDesc/X86MCTargetDesc.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"#include \"llvm/MC/MCInstPrinter.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":""},{"Add":"bool operator==(const MCOperand &a, const MCOperand &b) {"},{"Add":" if (a.isImm() && b.isImm())"},{"Add":" return a.getImm() == b.getImm();"},{"Add":" if (a.isReg() && b.isReg())"},{"Add":" return a.getReg() == b.getReg();"},{"Add":" return false;"},{"Add":"}"},{"Add":""},{"Add":"bool operator==(const MCInst &a, const MCInst &b) {"},{"Add":" if (a.getOpcode() != b.getOpcode())"},{"Add":" return false;"},{"Add":" if (a.getNumOperands() != b.getNumOperands())"},{"Add":" return false;"},{"Add":" for (unsigned I = 0; I < a.getNumOperands(); ++I) {"},{"Add":" if (!(a.getOperand(I) == b.getOperand(I)))"},{"Add":" return false;"},{"Add":" }"},{"Add":" return true;"},{"Add":"}"},{"Add":""},{"Add":"} // namespace llvm"},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AllOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::ElementsAreArray;"},{"Add":"using testing::Eq;"},{"Add":"using testing::Gt;"},{"Add":"using testing::Matcher;"},{"Add":"using testing::NotNull;"},{"Add":"using testing::Property;"},{"Add":"using testing::SizeIs;"},{"Add":""},{"Add":"Matcher IsImm(int64_t Value) {"},{"Add":" return AllOf(Property(&MCOperand::isImm, Eq(true)),"},{"Add":" Property(&MCOperand::getImm, Eq(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsReg(unsigned Reg) {"},{"Add":" return AllOf(Property(&MCOperand::isReg, Eq(true)),"},{"Add":" Property(&MCOperand::getReg, Eq(Reg)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher OpcodeIs(unsigned Opcode) {"},{"Add":" return Property(&MCInst::getOpcode, Eq(Opcode));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsMovImmediate(unsigned Opcode, int64_t Reg, int64_t Value) {"},{"Add":" return AllOf(OpcodeIs(Opcode), ElementsAre(IsReg(Reg), IsImm(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsMovValueToStack(unsigned Opcode, int64_t Value,"},{"Add":" size_t Offset) {"},{"Add":" return AllOf(OpcodeIs(Opcode),"},{"Add":" ElementsAre(IsReg(X86::RSP), IsImm(1), IsReg(0), IsImm(Offset),"},{"Add":" IsReg(0), IsImm(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsMovValueFromStack(unsigned Opcode, unsigned Reg) {"},{"Add":" return AllOf(OpcodeIs(Opcode),"},{"Add":" ElementsAre(IsReg(Reg), IsReg(X86::RSP), IsImm(1), IsReg(0),"},{"Add":" IsImm(0), IsReg(0)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsStackAllocate(unsigned Size) {"},{"Add":" return AllOf(OpcodeIs(X86::SUB64ri8),"},{"Add":" ElementsAre(IsReg(X86::RSP), IsReg(X86::RSP), IsImm(Size)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsStackDeallocate(unsigned Size) {"},{"Add":" return AllOf(OpcodeIs(X86::ADD64ri8),"},{"Add":" ElementsAre(IsReg(X86::RSP), IsReg(X86::RSP), IsImm(Size)));"},{"Add":"}"},{"Add":""},{"Add":"constexpr const char kTriple[] = \"x86_64-unknown-linux\";"},{"Add":""},{"Add":"class X86TargetTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" X86TargetTest(const char *Features) : State(kTriple, \"core2\", Features) {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeX86TargetInfo();"},{"Add":" LLVMInitializeX86Target();"},{"Add":" LLVMInitializeX86TargetMC();"},{"Add":" InitializeX86ExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" std::vector setRegTo(unsigned Reg, const APInt &Value) {"},{"Add":" return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg,"},{"Add":" Value);"},{"Add":" }"},{"Add":""},{"Add":" const Instruction &getInstr(unsigned OpCode) {"},{"Add":" return State.getIC().getInstr(OpCode);"},{"Add":" }"},{"Add":""},{"Add":" LLVMState State;"},{"Add":"};"},{"Add":""},{"Add":"class X86Core2TargetTest : public X86TargetTest {"},{"Add":"public:"},{"Add":" X86Core2TargetTest() : X86TargetTest(\"\") {}"},{"Add":"};"},{"Add":""},{"Add":"class X86Core2AvxTargetTest : public X86TargetTest {"},{"Add":"public:"},{"Add":" X86Core2AvxTargetTest() : X86TargetTest(\"+avx\") {}"},{"Add":"};"},{"Add":""},{"Add":"class X86Core2Avx512TargetTest : public X86TargetTest {"},{"Add":"public:"},{"Add":" X86Core2Avx512TargetTest() : X86TargetTest(\"+avx512vl\") {}"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, NoHighByteRegs) {"},{"Add":" EXPECT_TRUE(State.getRATC().reservedRegisters().test(X86::AH));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetFlags) {"},{"Add":" const unsigned Reg = X86::EFLAGS;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(64, 0x1111222233334444ULL)),"},{"Add":" ElementsAre(IsStackAllocate(8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 4),"},{"Add":" OpcodeIs(X86::POPF64)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToGR8Value) {"},{"Add":" const uint8_t Value = 0xFFU;"},{"Add":" const unsigned Reg = X86::AL;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(8, Value)),"},{"Add":" ElementsAre(IsMovImmediate(X86::MOV8ri, Reg, Value)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToGR16Value) {"},{"Add":" const uint16_t Value = 0xFFFFU;"},{"Add":" const unsigned Reg = X86::BX;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),"},{"Add":" ElementsAre(IsMovImmediate(X86::MOV16ri, Reg, Value)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToGR32Value) {"},{"Add":" const uint32_t Value = 0x7FFFFU;"},{"Add":" const unsigned Reg = X86::ECX;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(32, Value)),"},{"Add":" ElementsAre(IsMovImmediate(X86::MOV32ri, Reg, Value)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToGR64Value) {"},{"Add":" const uint64_t Value = 0x7FFFFFFFFFFFFFFFULL;"},{"Add":" const unsigned Reg = X86::RDX;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(64, Value)),"},{"Add":" ElementsAre(IsMovImmediate(X86::MOV64ri, Reg, Value)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToVR64Value) {"},{"Add":" EXPECT_THAT(setRegTo(X86::MM0, APInt(64, 0x1111222233334444ULL)),"},{"Add":" ElementsAre(IsStackAllocate(8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 4),"},{"Add":" IsMovValueFromStack(X86::MMX_MOVQ64rm, X86::MM0),"},{"Add":" IsStackDeallocate(8)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToVR128Value_Use_MOVDQUrm) {"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::XMM0, APInt(128, \"11112222333344445555666677778888\", 16)),"},{"Add":" ElementsAre(IsStackAllocate(16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77778888UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55556666UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 12),"},{"Add":" IsMovValueFromStack(X86::MOVDQUrm, X86::XMM0),"},{"Add":" IsStackDeallocate(16)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2AvxTargetTest, SetRegToVR128Value_Use_VMOVDQUrm) {"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::XMM0, APInt(128, \"11112222333344445555666677778888\", 16)),"},{"Add":" ElementsAre(IsStackAllocate(16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77778888UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55556666UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 12),"},{"Add":" IsMovValueFromStack(X86::VMOVDQUrm, X86::XMM0),"},{"Add":" IsStackDeallocate(16)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2Avx512TargetTest, SetRegToVR128Value_Use_VMOVDQU32Z128rm) {"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::XMM0, APInt(128, \"11112222333344445555666677778888\", 16)),"},{"Add":" ElementsAre(IsStackAllocate(16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77778888UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55556666UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 12),"},{"Add":" IsMovValueFromStack(X86::VMOVDQU32Z128rm, X86::XMM0),"},{"Add":" IsStackDeallocate(16)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2AvxTargetTest, SetRegToVR256Value_Use_VMOVDQUYrm) {"},{"Add":" const char ValueStr[] ="},{"Add":" \"1111111122222222333333334444444455555555666666667777777788888888\";"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::YMM0, APInt(256, ValueStr, 16)),"},{"Add":" ElementsAreArray({IsStackAllocate(32),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x88888888UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77777777UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x66666666UL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55555555UL, 12),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x44444444UL, 16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33333333UL, 20),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x22222222UL, 24),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11111111UL, 28),"},{"Add":" IsMovValueFromStack(X86::VMOVDQUYrm, X86::YMM0),"},{"Add":" IsStackDeallocate(32)}));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2Avx512TargetTest, SetRegToVR256Value_Use_VMOVDQU32Z256rm) {"},{"Add":" const char ValueStr[] ="},{"Add":" \"1111111122222222333333334444444455555555666666667777777788888888\";"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::YMM0, APInt(256, ValueStr, 16)),"},{"Add":" ElementsAreArray({IsStackAllocate(32),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x88888888UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77777777UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x66666666UL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55555555UL, 12),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x44444444UL, 16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33333333UL, 20),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x22222222UL, 24),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11111111UL, 28),"},{"Add":" IsMovValueFromStack(X86::VMOVDQU32Z256rm, X86::YMM0),"},{"Add":" IsStackDeallocate(32)}));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2Avx512TargetTest, SetRegToVR512Value) {"},{"Add":" const char ValueStr[] ="},{"Add":" \"1111111122222222333333334444444455555555666666667777777788888888\""},{"Add":" \"99999999AAAAAAAABBBBBBBBCCCCCCCCDDDDDDDDEEEEEEEEFFFFFFFF00000000\";"},{"Add":" EXPECT_THAT("},{"Add":" setRegTo(X86::ZMM0, APInt(512, ValueStr, 16)),"},{"Add":" ElementsAreArray({IsStackAllocate(64),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000000UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xFFFFFFFFUL, 4),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xEEEEEEEEUL, 8),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xDDDDDDDDUL, 12),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xCCCCCCCCUL, 16),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xBBBBBBBBUL, 20),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0xAAAAAAAAUL, 24),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x99999999UL, 28),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x88888888UL, 32),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x77777777UL, 36),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x66666666UL, 40),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x55555555UL, 44),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x44444444UL, 48),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33333333UL, 52),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x22222222UL, 56),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11111111UL, 60),"},{"Add":" IsMovValueFromStack(X86::VMOVDQU32Zrm, X86::ZMM0),"},{"Add":" IsStackDeallocate(64)}));"},{"Add":"}"},{"Add":""},{"Add":"// Note: We always put 80 bits on the stack independently of the size of the"},{"Add":"// value. This uses a bit more space but makes the code simpler."},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToST0_32Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::ST0, APInt(32, 0x11112222ULL)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000000UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x0000UL, 8),"},{"Add":" OpcodeIs(X86::LD_F80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToST1_32Bits) {"},{"Add":" const MCInst CopySt0ToSt1 = MCInstBuilder(X86::ST_Frr).addReg(X86::ST1);"},{"Add":" EXPECT_THAT(setRegTo(X86::ST1, APInt(32, 0x11112222ULL)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000000UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x0000UL, 8),"},{"Add":" OpcodeIs(X86::LD_F80m), CopySt0ToSt1,"},{"Add":" IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToST0_64Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::ST0, APInt(64, 0x1111222233334444ULL)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x33334444UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x0000UL, 8),"},{"Add":" OpcodeIs(X86::LD_F80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToST0_80Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::ST0, APInt(80, \"11112222333344445555\", 16)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x44445555UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x22223333UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x1111UL, 8),"},{"Add":" OpcodeIs(X86::LD_F80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToFP0_80Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::FP0, APInt(80, \"11112222333344445555\", 16)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x44445555UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x22223333UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x1111UL, 8),"},{"Add":" OpcodeIs(X86::LD_Fp80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToFP1_32Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::FP1, APInt(32, 0x11112222ULL)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x11112222UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000000UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x0000UL, 8),"},{"Add":" OpcodeIs(X86::LD_Fp80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, SetRegToFP1_4Bits) {"},{"Add":" EXPECT_THAT(setRegTo(X86::FP1, APInt(4, 0x1ULL)),"},{"Add":" ElementsAre(IsStackAllocate(10),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000001UL, 0),"},{"Add":" IsMovValueToStack(X86::MOV32mi, 0x00000000UL, 4),"},{"Add":" IsMovValueToStack(X86::MOV16mi, 0x0000UL, 8),"},{"Add":" OpcodeIs(X86::LD_Fp80m), IsStackDeallocate(10)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2Avx512TargetTest, FillMemoryOperands_ADD64rm) {"},{"Add":" const Instruction &I = getInstr(X86::ADD64rm);"},{"Add":" InstructionTemplate IT(&I);"},{"Add":" constexpr const int kOffset = 42;"},{"Add":" State.getExegesisTarget().fillMemoryOperands(IT, X86::RDI, kOffset);"},{"Add":" // Memory is operands 2-6."},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[2]), IsReg(X86::RDI));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[3]), IsImm(1));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[4]), IsReg(0));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[5]), IsImm(kOffset));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[6]), IsReg(0));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2Avx512TargetTest, FillMemoryOperands_VGATHERDPSZ128rm) {"},{"Add":" const Instruction &I = getInstr(X86::VGATHERDPSZ128rm);"},{"Add":" InstructionTemplate IT(&I);"},{"Add":" constexpr const int kOffset = 42;"},{"Add":" State.getExegesisTarget().fillMemoryOperands(IT, X86::RDI, kOffset);"},{"Add":" // Memory is operands 4-8."},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[4]), IsReg(X86::RDI));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[5]), IsImm(1));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[6]), IsReg(0));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[7]), IsImm(kOffset));"},{"Add":" EXPECT_THAT(IT.getValueFor(I.Operands[8]), IsReg(0));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86Core2TargetTest, AllowAsBackToBack) {"},{"Add":" EXPECT_TRUE("},{"Add":" State.getExegesisTarget().allowAsBackToBack(getInstr(X86::ADD64rr)));"},{"Add":" EXPECT_FALSE("},{"Add":" State.getExegesisTarget().allowAsBackToBack(getInstr(X86::LEA64r)));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SnippetRepetitorTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- SnippetRepetitorTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"MCInstrDescView.h\""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":"#include \"llvm/CodeGen/MachineBasicBlock.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::Eq;"},{"Add":"using testing::Field;"},{"Add":"using testing::Property;"},{"Add":"using testing::UnorderedElementsAre;"},{"Add":""},{"Add":"class X86SnippetRepetitorTest : public X86TestBase {"},{"Add":"protected:"},{"Add":" void SetUp() override {"},{"Add":" TM = State.createTargetMachine();"},{"Add":" Context = std::make_unique();"},{"Add":" Mod = std::make_unique(\"X86SnippetRepetitorTest\", *Context);"},{"Add":" Mod->setDataLayout(TM->createDataLayout());"},{"Add":" MMI = std::make_unique(TM.get());"},{"Add":" MF = &createVoidVoidPtrMachineFunction(\"TestFn\", Mod.get(), MMI.get());"},{"Add":" }"},{"Add":""},{"Add":" void TestCommon(InstructionBenchmark::RepetitionModeE RepetitionMode) {"},{"Add":" const auto Repetitor = SnippetRepetitor::Create(RepetitionMode, State);"},{"Add":" const std::vector Instructions = {MCInstBuilder(X86::NOOP)};"},{"Add":" FunctionFiller Sink(*MF, {X86::EAX});"},{"Add":" const auto Fill ="},{"Add":" Repetitor->Repeat(Instructions, kMinInstructions, kLoopBodySize);"},{"Add":" Fill(Sink);"},{"Add":" }"},{"Add":""},{"Add":" static constexpr const unsigned kMinInstructions = 3;"},{"Add":" static constexpr const unsigned kLoopBodySize = 5;"},{"Add":""},{"Add":" std::unique_ptr TM;"},{"Add":" std::unique_ptr Context;"},{"Add":" std::unique_ptr Mod;"},{"Add":" std::unique_ptr MMI;"},{"Add":" MachineFunction *MF = nullptr;"},{"Add":"};"},{"Add":""},{"Add":"static auto HasOpcode = [](unsigned Opcode) {"},{"Add":" return Property(&MachineInstr::getOpcode, Eq(Opcode));"},{"Add":"};"},{"Add":""},{"Add":"static auto LiveReg = [](unsigned Reg) {"},{"Add":" return Field(&MachineBasicBlock::RegisterMaskPair::PhysReg, Eq(Reg));"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(X86SnippetRepetitorTest, Duplicate) {"},{"Add":" TestCommon(InstructionBenchmark::Duplicate);"},{"Add":" // Duplicating creates a single basic block that repeats the instructions."},{"Add":" ASSERT_EQ(MF->getNumBlockIDs(), 1u);"},{"Add":" EXPECT_THAT(MF->getBlockNumbered(0)->instrs(),"},{"Add":" ElementsAre(HasOpcode(X86::NOOP), HasOpcode(X86::NOOP),"},{"Add":" HasOpcode(X86::NOOP), HasOpcode(X86::RET64)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetRepetitorTest, Loop) {"},{"Add":" TestCommon(InstructionBenchmark::Loop);"},{"Add":" // Duplicating creates an entry block, a loop body and a ret block."},{"Add":" ASSERT_EQ(MF->getNumBlockIDs(), 3u);"},{"Add":" const auto &LoopBlock = *MF->getBlockNumbered(1);"},{"Add":" EXPECT_THAT(LoopBlock.instrs(),"},{"Add":" ElementsAre(HasOpcode(X86::NOOP), HasOpcode(X86::NOOP),"},{"Add":" HasOpcode(X86::NOOP), HasOpcode(X86::NOOP),"},{"Add":" HasOpcode(X86::NOOP), HasOpcode(X86::ADD64ri8),"},{"Add":" HasOpcode(X86::JCC_1)));"},{"Add":" EXPECT_THAT(LoopBlock.liveins(),"},{"Add":" UnorderedElementsAre("},{"Add":" LiveReg(X86::EAX),"},{"Add":" LiveReg(State.getExegesisTarget().getLoopCounterRegister("},{"Add":" State.getTargetMachine().getTargetTriple()))));"},{"Add":" EXPECT_THAT(MF->getBlockNumbered(2)->instrs(),"},{"Add":" ElementsAre(HasOpcode(X86::RET64)));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SnippetGeneratorTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- SnippetGeneratorTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"MCInstrDescView.h\""},{"Add":"#include \"ParallelSnippetGenerator.h\""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":"#include \"SerialSnippetGenerator.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AnyOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::Gt;"},{"Add":"using testing::HasSubstr;"},{"Add":"using testing::Not;"},{"Add":"using testing::SizeIs;"},{"Add":"using testing::UnorderedElementsAre;"},{"Add":""},{"Add":"MATCHER(IsInvalid, \"\") { return !arg.isValid(); }"},{"Add":"MATCHER(IsReg, \"\") { return arg.isReg(); }"},{"Add":""},{"Add":"template "},{"Add":"class X86SnippetGeneratorTest : public X86TestBase {"},{"Add":"protected:"},{"Add":" X86SnippetGeneratorTest() : Generator(State, SnippetGenerator::Options()),"},{"Add":"\t InstrInfo(State.getInstrInfo()) {}"},{"Add":""},{"Add":" std::vector checkAndGetCodeTemplates(unsigned Opcode) {"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" auto CodeTemplateOrError = Generator.generateCodeTemplates("},{"Add":" &Instr, State.getRATC().emptyRegisters());"},{"Add":" EXPECT_FALSE(CodeTemplateOrError.takeError()); // Valid configuration."},{"Add":" return std::move(CodeTemplateOrError.get());"},{"Add":" }"},{"Add":""},{"Add":" SnippetGeneratorT Generator;"},{"Add":" const MCInstrInfo &InstrInfo;"},{"Add":"};"},{"Add":""},{"Add":"using X86SerialSnippetGeneratorTest = X86SnippetGeneratorTest;"},{"Add":""},{"Add":"using X86ParallelSnippetGeneratorTest ="},{"Add":" X86SnippetGeneratorTest;"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, ImplicitSelfDependencyThroughImplicitReg) {"},{"Add":" // - ADC16i16"},{"Add":" // - Op0 Explicit Use Immediate"},{"Add":" // - Op1 Implicit Def Reg(AX)"},{"Add":" // - Op2 Implicit Def Reg(EFLAGS)"},{"Add":" // - Op3 Implicit Use Reg(AX)"},{"Add":" // - Op4 Implicit Use Reg(EFLAGS)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - hasAliasingImplicitRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::ADC16i16;"},{"Add":" EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::AX);"},{"Add":" EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[1], X86::EFLAGS);"},{"Add":" EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[0], X86::AX);"},{"Add":" EXPECT_THAT(InstrInfo.get(Opcode).getImplicitUses()[1], X86::EFLAGS);"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::ALWAYS_SERIAL_IMPLICIT_REGS_ALIAS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(1)); // Imm."},{"Add":" EXPECT_THAT(IT.getVariableValues()[0], IsInvalid()) << \"Immediate is not set\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, ImplicitSelfDependencyThroughTiedRegs) {"},{"Add":" // - ADD16ri"},{"Add":" // - Op0 Explicit Def RegClass(GR16)"},{"Add":" // - Op1 Explicit Use RegClass(GR16) TiedToOp0"},{"Add":" // - Op2 Explicit Use Immediate"},{"Add":" // - Op3 Implicit Def Reg(EFLAGS)"},{"Add":" // - Var0 [Op0,Op1]"},{"Add":" // - Var1 [Op2]"},{"Add":" // - hasTiedRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::ADD16ri;"},{"Add":" EXPECT_THAT(InstrInfo.get(Opcode).getImplicitDefs()[0], X86::EFLAGS);"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::ALWAYS_SERIAL_TIED_REGS_ALIAS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(2));"},{"Add":" EXPECT_THAT(IT.getVariableValues()[0], IsInvalid()) << \"Operand 1 is not set\";"},{"Add":" EXPECT_THAT(IT.getVariableValues()[1], IsInvalid()) << \"Operand 2 is not set\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) {"},{"Add":" // - VXORPSrr"},{"Add":" // - Op0 Explicit Def RegClass(VR128)"},{"Add":" // - Op1 Explicit Use RegClass(VR128)"},{"Add":" // - Op2 Explicit Use RegClass(VR128)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::VXORPSrr;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_EXPLICIT_REGS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" EXPECT_THAT(IT.getVariableValues(),"},{"Add":" AnyOf(ElementsAre(IsReg(), IsInvalid(), IsReg()),"},{"Add":" ElementsAre(IsReg(), IsReg(), IsInvalid())))"},{"Add":" << \"Op0 is either set to Op1 or to Op2\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest,"},{"Add":" ImplicitSelfDependencyThroughExplicitRegsForbidAll) {"},{"Add":" // - VXORPSrr"},{"Add":" // - Op0 Explicit Def RegClass(VR128)"},{"Add":" // - Op1 Explicit Use RegClass(VR128)"},{"Add":" // - Op2 Explicit Use RegClass(VR128)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::VXORPSrr;"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" auto AllRegisters = State.getRATC().emptyRegisters();"},{"Add":" AllRegisters.flip();"},{"Add":" auto Error ="},{"Add":" Generator.generateCodeTemplates(&Instr, AllRegisters).takeError();"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, DependencyThroughOtherOpcode) {"},{"Add":" // - CMP64rr"},{"Add":" // - Op0 Explicit Use RegClass(GR64)"},{"Add":" // - Op1 Explicit Use RegClass(GR64)"},{"Add":" // - Op2 Implicit Def Reg(EFLAGS)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" const unsigned Opcode = X86::CMP64rr;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(Gt(1U))) << \"Many templates are available\";"},{"Add":" for (const auto &CT : CodeTemplates) {"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_NON_MEMORY_INSTR);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(2));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(2));"},{"Add":" EXPECT_THAT(IT.getVariableValues(),"},{"Add":" AnyOf(ElementsAre(IsReg(), IsInvalid()),"},{"Add":" ElementsAre(IsInvalid(), IsReg())));"},{"Add":" EXPECT_THAT(CT.Instructions[1].getOpcode(), Not(Opcode));"},{"Add":" // TODO: check that the two instructions alias each other."},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, LAHF) {"},{"Add":" // - LAHF"},{"Add":" // - Op0 Implicit Def Reg(AH)"},{"Add":" // - Op1 Implicit Use Reg(EFLAGS)"},{"Add":" const unsigned Opcode = X86::LAHF;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(Gt(1U))) << \"Many templates are available\";"},{"Add":" for (const auto &CT : CodeTemplates) {"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_NON_MEMORY_INSTR);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(2));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(0));"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SerialSnippetGeneratorTest, VCVTUSI642SDZrrb_Int) {"},{"Add":" // - VCVTUSI642SDZrrb_Int"},{"Add":" // - Op0 Explicit Def RegClass(VR128X)"},{"Add":" // - Op1 Explicit Use RegClass(VR128X)"},{"Add":" // - Op2 Explicit Use STATIC_ROUNDING"},{"Add":" // - Op2 Explicit Use RegClass(GR64)"},{"Add":" // - Op4 Implicit Use Reg(MXSCR)"},{"Add":" const unsigned Opcode = X86::VCVTUSI642SDZrrb_Int;"},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" std::vector Configs;"},{"Add":" auto Error = Generator.generateConfigurations("},{"Add":" &Instr, Configs, State.getRATC().emptyRegisters());"},{"Add":" ASSERT_FALSE(Error);"},{"Add":" ASSERT_THAT(Configs, SizeIs(1));"},{"Add":" const BenchmarkCode &BC = Configs[0];"},{"Add":" ASSERT_THAT(BC.Key.Instructions, SizeIs(1));"},{"Add":" ASSERT_TRUE(BC.Key.Instructions[0].getOperand(3).isImm());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest, SerialInstruction) {"},{"Add":" // - CDQ"},{"Add":" // - Op0 Implicit Def Reg(EAX)"},{"Add":" // - Op1 Implicit Def Reg(EDX)"},{"Add":" // - Op2 Implicit Use Reg(EAX)"},{"Add":" // - hasAliasingImplicitRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::CDQ;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info, HasSubstr(\"serial\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(0));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest, StaticRenaming) {"},{"Add":" // CMOV32rr has tied variables, we enumerate the possible values to execute"},{"Add":" // as many in parallel as possible."},{"Add":""},{"Add":" // - CMOV32rr"},{"Add":" // - Op0 Explicit Def RegClass(GR32)"},{"Add":" // - Op1 Explicit Use RegClass(GR32) TiedToOp0"},{"Add":" // - Op2 Explicit Use RegClass(GR32)"},{"Add":" // - Op3 Explicit Use Immediate"},{"Add":" // - Op3 Implicit Use Reg(EFLAGS)"},{"Add":" // - Var0 [Op0,Op1]"},{"Add":" // - Var1 [Op2]"},{"Add":" // - hasTiedRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::CMOV32rr;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info, HasSubstr(\"static renaming\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" constexpr const unsigned kInstructionCount = 15;"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(kInstructionCount));"},{"Add":" std::unordered_set AllDefRegisters;"},{"Add":" for (const auto &IT : CT.Instructions) {"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" AllDefRegisters.insert(IT.getVariableValues()[0].getReg());"},{"Add":" }"},{"Add":" EXPECT_THAT(AllDefRegisters, SizeIs(kInstructionCount))"},{"Add":" << \"Each instruction writes to a different register\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest, NoTiedVariables) {"},{"Add":" // CMOV_GR32 has no tied variables, we make sure def and use are different"},{"Add":" // from each other."},{"Add":""},{"Add":" // - CMOV_GR32"},{"Add":" // - Op0 Explicit Def RegClass(GR32)"},{"Add":" // - Op1 Explicit Use RegClass(GR32)"},{"Add":" // - Op2 Explicit Use RegClass(GR32)"},{"Add":" // - Op3 Explicit Use Immediate"},{"Add":" // - Op4 Implicit Use Reg(EFLAGS)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - Var3 [Op3]"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::CMOV_GR32;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info, HasSubstr(\"no tied variables\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(4));"},{"Add":" EXPECT_THAT(IT.getVariableValues()[0].getReg(),"},{"Add":" Not(IT.getVariableValues()[1].getReg()))"},{"Add":" << \"Def is different from first Use\";"},{"Add":" EXPECT_THAT(IT.getVariableValues()[0].getReg(),"},{"Add":" Not(IT.getVariableValues()[2].getReg()))"},{"Add":" << \"Def is different from second Use\";"},{"Add":" EXPECT_THAT(IT.getVariableValues()[3], IsInvalid());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest, MemoryUse) {"},{"Add":" // Mov32rm reads from memory."},{"Add":" // - MOV32rm"},{"Add":" // - Op0 Explicit Def RegClass(GR32)"},{"Add":" // - Op1 Explicit Use Memory RegClass(GR8)"},{"Add":" // - Op2 Explicit Use Memory"},{"Add":" // - Op3 Explicit Use Memory RegClass(GRH8)"},{"Add":" // - Op4 Explicit Use Memory"},{"Add":" // - Op5 Explicit Use Memory RegClass(SEGMENT_REG)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - Var3 [Op3]"},{"Add":" // - Var4 [Op4]"},{"Add":" // - Var5 [Op5]"},{"Add":" // - hasMemoryOperands"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::MOV32rm;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info, HasSubstr(\"no tied variables\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" ASSERT_THAT(CT.Instructions,"},{"Add":" SizeIs(ParallelSnippetGenerator::kMinNumDifferentAddresses));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(6));"},{"Add":" EXPECT_EQ(IT.getVariableValues()[2].getImm(), 1);"},{"Add":" EXPECT_EQ(IT.getVariableValues()[3].getReg(), 0u);"},{"Add":" EXPECT_EQ(IT.getVariableValues()[4].getImm(), 0);"},{"Add":" EXPECT_EQ(IT.getVariableValues()[5].getReg(), 0u);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest, MOV16ms) {"},{"Add":" const unsigned Opcode = X86::MOV16ms;"},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" std::vector Benchmarks;"},{"Add":" auto Err = Generator.generateConfigurations(&Instr, Benchmarks,"},{"Add":" State.getRATC().emptyRegisters());"},{"Add":" EXPECT_TRUE((bool)Err);"},{"Add":" EXPECT_THAT(toString(std::move(Err)),"},{"Add":" testing::HasSubstr(\"no available registers\"));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86ParallelSnippetGeneratorTest,"},{"Add":" AvoidSerializingThroughImplicitRegisters) {"},{"Add":" // MULX32rr implicitly uses EDX. We should not select that register to avoid"},{"Add":" // serialization."},{"Add":" const unsigned Opcode = X86::MULX32rr;"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" // Forbid all registers but RDX/EDX/DX/DH/DL. The only option would be to"},{"Add":" // choose that register, but that would serialize the instruction, so we"},{"Add":" // should be returning an error."},{"Add":" auto AllRegisters = State.getRATC().emptyRegisters();"},{"Add":" AllRegisters.flip();"},{"Add":" AllRegisters.reset(X86::RDX);"},{"Add":" AllRegisters.reset(X86::EDX);"},{"Add":" AllRegisters.reset(X86::DX);"},{"Add":" AllRegisters.reset(X86::DH);"},{"Add":" AllRegisters.reset(X86::DL);"},{"Add":" auto Err = Generator.generateCodeTemplates(&Instr, AllRegisters);"},{"Add":" EXPECT_FALSE((bool)Err);"},{"Add":" EXPECT_THAT(toString(Err.takeError()),"},{"Add":" testing::HasSubstr(\"no available registers\"));"},{"Add":"}"},{"Add":""},{"Add":"class X86FakeSnippetGenerator : public SnippetGenerator {"},{"Add":"public:"},{"Add":" X86FakeSnippetGenerator(const LLVMState &State, const Options &Opts)"},{"Add":" : SnippetGenerator(State, Opts) {}"},{"Add":""},{"Add":" const Instruction &getInstr(unsigned Opcode) {"},{"Add":" return State.getIC().getInstr(Opcode);"},{"Add":" }"},{"Add":""},{"Add":" InstructionTemplate getInstructionTemplate(unsigned Opcode) {"},{"Add":" return {&getInstr(Opcode)};"},{"Add":" }"},{"Add":""},{"Add":"private:"},{"Add":" Expected>"},{"Add":" generateCodeTemplates(InstructionTemplate, const BitVector &) const override {"},{"Add":" return make_error(\"not implemented\", inconvertibleErrorCode());"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"using X86FakeSnippetGeneratorTest = X86SnippetGeneratorTest;"},{"Add":""},{"Add":"testing::Matcher IsRegisterValue(unsigned Reg,"},{"Add":" APInt Value) {"},{"Add":" return testing::AllOf(testing::Field(&RegisterValue::Register, Reg),"},{"Add":" testing::Field(&RegisterValue::Value, Value));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86FakeSnippetGeneratorTest, MemoryUse_Movsb) {"},{"Add":" // MOVSB writes to scratch memory register."},{"Add":" // - MOVSB"},{"Add":" // - Op0 Explicit Use Memory RegClass(GR8)"},{"Add":" // - Op1 Explicit Use Memory RegClass(GR8)"},{"Add":" // - Op2 Explicit Use Memory RegClass(SEGMENT_REG)"},{"Add":" // - Op3 Implicit Def Reg(EDI)"},{"Add":" // - Op4 Implicit Def Reg(ESI)"},{"Add":" // - Op5 Implicit Use Reg(EDI)"},{"Add":" // - Op6 Implicit Use Reg(ESI)"},{"Add":" // - Op7 Implicit Use Reg(DF)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasMemoryOperands"},{"Add":" // - hasAliasingImplicitRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = X86::MOVSB;"},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" std::vector Benchmarks;"},{"Add":" auto Error = Generator.generateConfigurations("},{"Add":" &Instr, Benchmarks, State.getRATC().emptyRegisters());"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd16ri) {"},{"Add":" // ADD16ri:"},{"Add":" // explicit def 0 : reg RegClass=GR16"},{"Add":" // explicit use 1 : reg RegClass=GR16 | TIED_TO:0"},{"Add":" // explicit use 2 : imm"},{"Add":" // implicit def : EFLAGS"},{"Add":" InstructionTemplate IT = Generator.getInstructionTemplate(X86::ADD16ri);"},{"Add":" IT.getValueFor(IT.getInstr().Variables[0]) = MCOperand::createReg(X86::AX);"},{"Add":" std::vector Snippet;"},{"Add":" Snippet.push_back(std::move(IT));"},{"Add":" const auto RIV = Generator.computeRegisterInitialValues(Snippet);"},{"Add":" EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(X86::AX, APInt())));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd64rr) {"},{"Add":" // ADD64rr:"},{"Add":" // mov64ri rax, 42"},{"Add":" // add64rr rax, rax, rbx"},{"Add":" // -> only rbx needs defining."},{"Add":" std::vector Snippet;"},{"Add":" {"},{"Add":" InstructionTemplate Mov = Generator.getInstructionTemplate(X86::MOV64ri);"},{"Add":" Mov.getValueFor(Mov.getInstr().Variables[0]) ="},{"Add":" MCOperand::createReg(X86::RAX);"},{"Add":" Mov.getValueFor(Mov.getInstr().Variables[1]) = MCOperand::createImm(42);"},{"Add":" Snippet.push_back(std::move(Mov));"},{"Add":" }"},{"Add":" {"},{"Add":" InstructionTemplate Add = Generator.getInstructionTemplate(X86::ADD64rr);"},{"Add":" Add.getValueFor(Add.getInstr().Variables[0]) ="},{"Add":" MCOperand::createReg(X86::RAX);"},{"Add":" Add.getValueFor(Add.getInstr().Variables[1]) ="},{"Add":" MCOperand::createReg(X86::RBX);"},{"Add":" Snippet.push_back(std::move(Add));"},{"Add":" }"},{"Add":""},{"Add":" const auto RIV = Generator.computeRegisterInitialValues(Snippet);"},{"Add":" EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(X86::RBX, APInt())));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SnippetFileTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- SnippetFileTest.cpp -------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"SnippetFile.h\""},{"Add":""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/FileSystem.h\""},{"Add":"#include \"llvm/Support/Path.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"llvm/Testing/Support/SupportHelpers.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AllOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::Eq;"},{"Add":"using testing::Field;"},{"Add":"using testing::Property;"},{"Add":"using testing::SizeIs;"},{"Add":""},{"Add":"using llvm::unittest::TempDir;"},{"Add":""},{"Add":"class X86SnippetFileTest : public X86TestBase {"},{"Add":"protected:"},{"Add":" Expected> TestCommon(StringRef Contents) {"},{"Add":" TempDir TestDirectory(\"SnippetFileTestDir\", /*Unique*/ true);"},{"Add":" SmallString<64> Filename(TestDirectory.path());"},{"Add":" sys::path::append(Filename, \"snippet.s\");"},{"Add":" errs() << Filename << \"-------\\n\";"},{"Add":" {"},{"Add":" std::error_code EC;"},{"Add":" raw_fd_ostream FOS(Filename, EC);"},{"Add":" FOS << Contents;"},{"Add":" EXPECT_FALSE(EC);"},{"Add":" }"},{"Add":" return readSnippets(State, Filename);"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"// FIXME: Refactor these to ../Common/Matchers.h"},{"Add":"static auto HasOpcode = [](unsigned Opcode) {"},{"Add":" return Property(&MCInst::getOpcode, Eq(Opcode));"},{"Add":"};"},{"Add":""},{"Add":"MATCHER_P2(RegisterInitialValueIs, Reg, Val, \"\") {"},{"Add":" if (arg.Register == Reg &&"},{"Add":" arg.Value.getLimitedValue() == static_cast(Val))"},{"Add":" return true;"},{"Add":" *result_listener << \"expected: {\" << Reg << \", \" << Val << \"} \";"},{"Add":" *result_listener << \"actual: {\" << arg.Register << \", \""},{"Add":" << arg.Value.getLimitedValue() << \"}\";"},{"Add":" return false;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetFileTest, Works) {"},{"Add":" auto Snippets = TestCommon(R\"("},{"Add":" # LLVM-EXEGESIS-DEFREG RAX 0f"},{"Add":" # LLVM-EXEGESIS-DEFREG SIL 0"},{"Add":" # LLVM-EXEGESIS-LIVEIN RDI"},{"Add":" # LLVM-EXEGESIS-LIVEIN DL"},{"Add":" incq %rax"},{"Add":" )\");"},{"Add":" EXPECT_FALSE((bool)Snippets.takeError());"},{"Add":" ASSERT_THAT(*Snippets, SizeIs(1));"},{"Add":" const auto &Snippet = (*Snippets)[0];"},{"Add":" ASSERT_THAT(Snippet.Key.Instructions, ElementsAre(HasOpcode(X86::INC64r)));"},{"Add":" ASSERT_THAT(Snippet.Key.RegisterInitialValues,"},{"Add":" ElementsAre(RegisterInitialValueIs(X86::RAX, 15),"},{"Add":" RegisterInitialValueIs(X86::SIL, 0)));"},{"Add":" ASSERT_THAT(Snippet.LiveIns, ElementsAre(X86::RDI, X86::DL));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetFileTest, BadDefregParam) {"},{"Add":" auto Error = TestCommon(R\"("},{"Add":" # LLVM-EXEGESIS-DEFREG DOESNOEXIST 0"},{"Add":" incq %rax"},{"Add":" )\")"},{"Add":" .takeError();"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetFileTest, NoDefregValue) {"},{"Add":" auto Error = TestCommon(R\"("},{"Add":" # LLVM-EXEGESIS-DEFREG RAX"},{"Add":" incq %rax"},{"Add":" )\")"},{"Add":" .takeError();"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetFileTest, MissingParam) {"},{"Add":" auto Error = TestCommon(R\"("},{"Add":" # LLVM-EXEGESIS-LIVEIN"},{"Add":" incq %rax"},{"Add":" )\")"},{"Add":" .takeError();"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SnippetFileTest, NoAsmStreamer) {"},{"Add":" auto Snippets = TestCommon(R\"("},{"Add":" .cv_fpo_proc foo 4"},{"Add":" )\");"},{"Add":" EXPECT_FALSE((bool)Snippets.takeError());"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SchedClassResolutionTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- SchedClassResolutionTest.cpp ----------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"SchedClassResolution.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::Pair;"},{"Add":"using testing::UnorderedElementsAre;"},{"Add":""},{"Add":"class X86SchedClassResolutionTest : public X86TestBase {"},{"Add":"protected:"},{"Add":" X86SchedClassResolutionTest() : STI(State.getSubtargetInfo()) {"},{"Add":" // Compute the ProxResIdx of ports uses in tests."},{"Add":" const auto &SM = STI.getSchedModel();"},{"Add":" for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {"},{"Add":" const std::string Name = SM.getProcResource(I)->Name;"},{"Add":" if (Name == \"HWPort0\") {"},{"Add":" P0Idx = I;"},{"Add":" } else if (Name == \"HWPort1\") {"},{"Add":" P1Idx = I;"},{"Add":" } else if (Name == \"HWPort5\") {"},{"Add":" P5Idx = I;"},{"Add":" } else if (Name == \"HWPort6\") {"},{"Add":" P6Idx = I;"},{"Add":" } else if (Name == \"HWPort05\") {"},{"Add":" P05Idx = I;"},{"Add":" } else if (Name == \"HWPort0156\") {"},{"Add":" P0156Idx = I;"},{"Add":" }"},{"Add":" }"},{"Add":" EXPECT_NE(P0Idx, 0);"},{"Add":" EXPECT_NE(P1Idx, 0);"},{"Add":" EXPECT_NE(P5Idx, 0);"},{"Add":" EXPECT_NE(P6Idx, 0);"},{"Add":" EXPECT_NE(P05Idx, 0);"},{"Add":" EXPECT_NE(P0156Idx, 0);"},{"Add":" }"},{"Add":""},{"Add":"protected:"},{"Add":" const MCSubtargetInfo &STI;"},{"Add":" uint16_t P0Idx = 0;"},{"Add":" uint16_t P1Idx = 0;"},{"Add":" uint16_t P5Idx = 0;"},{"Add":" uint16_t P6Idx = 0;"},{"Add":" uint16_t P05Idx = 0;"},{"Add":" uint16_t P0156Idx = 0;"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {"},{"Add":" const auto Pressure ="},{"Add":" computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2}});"},{"Add":" EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {"},{"Add":" const auto Pressure ="},{"Add":" computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2}});"},{"Add":" EXPECT_THAT(Pressure,"},{"Add":" UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {"},{"Add":" const auto Pressure = computeIdealizedProcResPressure("},{"Add":" STI.getSchedModel(), {{P05Idx, 2}, {P0156Idx, 2}});"},{"Add":" EXPECT_THAT(Pressure,"},{"Add":" UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),"},{"Add":" Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86SchedClassResolutionTest,"},{"Add":" ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {"},{"Add":" const auto Pressure = computeIdealizedProcResPressure("},{"Add":" STI.getSchedModel(), {{P1Idx, 1}, {P05Idx, 1}, {P0156Idx, 2}});"},{"Add":" EXPECT_THAT(Pressure,"},{"Add":" UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),"},{"Add":" Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"RegisterAliasingTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- X86RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"class X86RegisterAliasingTest : public X86TestBase {};"},{"Add":""},{"Add":"TEST_F(X86RegisterAliasingTest, TrackSimpleRegister) {"},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const RegisterAliasingTracker tracker(RegInfo, X86::EAX);"},{"Add":" std::set ActualAliasedRegisters;"},{"Add":" for (unsigned I : tracker.aliasedBits().set_bits())"},{"Add":" ActualAliasedRegisters.insert(static_cast(I));"},{"Add":" const std::set ExpectedAliasedRegisters = {"},{"Add":" X86::AL, X86::AH, X86::AX, X86::EAX, X86::HAX, X86::RAX};"},{"Add":" ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);"},{"Add":" for (MCPhysReg aliased : ExpectedAliasedRegisters) {"},{"Add":" ASSERT_THAT(tracker.getOrigin(aliased), X86::EAX);"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86RegisterAliasingTest, TrackRegisterClass) {"},{"Add":" // The alias bits for GR8_ABCD_LRegClassID are the union of the alias bits for"},{"Add":" // AL, BL, CL and DL."},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const BitVector NoReservedReg(RegInfo.getNumRegs());"},{"Add":""},{"Add":" const RegisterAliasingTracker RegClassTracker("},{"Add":" RegInfo, NoReservedReg, RegInfo.getRegClass(X86::GR8_ABCD_LRegClassID));"},{"Add":""},{"Add":" BitVector sum(RegInfo.getNumRegs());"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, X86::AL).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, X86::BL).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, X86::CL).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, X86::DL).aliasedBits();"},{"Add":""},{"Add":" ASSERT_THAT(RegClassTracker.aliasedBits(), sum);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86RegisterAliasingTest, TrackRegisterClassCache) {"},{"Add":" // Fetching twice the same tracker yields the same pointers."},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const BitVector NoReservedReg(RegInfo.getNumRegs());"},{"Add":" RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);"},{"Add":" ASSERT_THAT(&Cache.getRegister(X86::AX), &Cache.getRegister(X86::AX));"},{"Add":""},{"Add":" ASSERT_THAT(&Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID),"},{"Add":" &Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"add_llvm_exegesis_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/X86"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/X86"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_sources("},{"Add":" AssemblerTest.cpp"},{"Add":" BenchmarkResultTest.cpp"},{"Add":" RegisterAliasingTest.cpp"},{"Add":" SchedClassResolutionTest.cpp"},{"Add":" SnippetFileTest.cpp"},{"Add":" SnippetGeneratorTest.cpp"},{"Add":" SnippetRepetitorTest.cpp"},{"Add":" TargetTest.cpp"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_components("},{"Add":" Core"},{"Add":" Codegen"},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" X86"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_libraries("},{"Add":" LLVMExegesisX86"},{"Add":" )"}]}},{"FileAdd":{"meta":{"basename":"BenchmarkResultTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- BenchmarkResultTest.cpp ---------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"BenchmarkResult.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":"#include \"llvm/ADT/SmallString.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/FileSystem.h\""},{"Add":"#include \"llvm/Support/Path.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"llvm/Support/YAMLTraits.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"using ::testing::AllOf;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::get;"},{"Add":"using ::testing::Pointwise;"},{"Add":"using ::testing::Property;"},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"static std::string Dump(const MCInst &McInst) {"},{"Add":" std::string Buffer;"},{"Add":" raw_string_ostream OS(Buffer);"},{"Add":" McInst.print(OS);"},{"Add":" return Buffer;"},{"Add":"}"},{"Add":""},{"Add":"MATCHER(EqMCInst, \"\") {"},{"Add":" const std::string Lhs = Dump(get<0>(arg));"},{"Add":" const std::string Rhs = Dump(get<1>(arg));"},{"Add":" if (Lhs != Rhs) {"},{"Add":" *result_listener << Lhs << \" <=> \" << Rhs;"},{"Add":" return false;"},{"Add":" }"},{"Add":" return true;"},{"Add":"}"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"TEST(BenchmarkResultTest, WriteToAndReadFromDisk) {"},{"Add":" LLVMInitializeX86TargetInfo();"},{"Add":" LLVMInitializeX86Target();"},{"Add":" LLVMInitializeX86TargetMC();"},{"Add":""},{"Add":" // Read benchmarks."},{"Add":" const LLVMState State(\"x86_64-unknown-linux\", \"haswell\");"},{"Add":""},{"Add":" ExitOnError ExitOnErr;"},{"Add":""},{"Add":" InstructionBenchmark ToDisk;"},{"Add":""},{"Add":" ToDisk.Key.Instructions.push_back(MCInstBuilder(X86::XOR32rr)"},{"Add":" .addReg(X86::AL)"},{"Add":" .addReg(X86::AH)"},{"Add":" .addImm(123)"},{"Add":" .addDFPImm(bit_cast(0.5)));"},{"Add":" ToDisk.Key.Config = \"config\";"},{"Add":" ToDisk.Key.RegisterInitialValues = {"},{"Add":" RegisterValue{X86::AL, APInt(8, \"-1\", 10)},"},{"Add":" RegisterValue{X86::AH, APInt(8, \"123\", 10)}};"},{"Add":" ToDisk.Mode = InstructionBenchmark::Latency;"},{"Add":" ToDisk.CpuName = \"cpu_name\";"},{"Add":" ToDisk.LLVMTriple = \"llvm_triple\";"},{"Add":" ToDisk.NumRepetitions = 1;"},{"Add":" ToDisk.Measurements.push_back(BenchmarkMeasure{\"a\", 1, 1});"},{"Add":" ToDisk.Measurements.push_back(BenchmarkMeasure{\"b\", 2, 2});"},{"Add":" ToDisk.Error = \"error\";"},{"Add":" ToDisk.Info = \"info\";"},{"Add":""},{"Add":" SmallString<64> Filename;"},{"Add":" std::error_code EC;"},{"Add":" EC = sys::fs::createUniqueDirectory(\"BenchmarkResultTestDir\", Filename);"},{"Add":" ASSERT_FALSE(EC);"},{"Add":" sys::path::append(Filename, \"data.yaml\");"},{"Add":" errs() << Filename << \"-------\\n\";"},{"Add":" ExitOnErr(ToDisk.writeYaml(State, Filename));"},{"Add":""},{"Add":" {"},{"Add":" // One-element version."},{"Add":" const auto FromDisk ="},{"Add":" ExitOnErr(InstructionBenchmark::readYaml(State, Filename));"},{"Add":""},{"Add":" EXPECT_THAT(FromDisk.Key.Instructions,"},{"Add":" Pointwise(EqMCInst(), ToDisk.Key.Instructions));"},{"Add":" EXPECT_EQ(FromDisk.Key.Config, ToDisk.Key.Config);"},{"Add":" EXPECT_EQ(FromDisk.Mode, ToDisk.Mode);"},{"Add":" EXPECT_EQ(FromDisk.CpuName, ToDisk.CpuName);"},{"Add":" EXPECT_EQ(FromDisk.LLVMTriple, ToDisk.LLVMTriple);"},{"Add":" EXPECT_EQ(FromDisk.NumRepetitions, ToDisk.NumRepetitions);"},{"Add":" EXPECT_THAT(FromDisk.Measurements, ToDisk.Measurements);"},{"Add":" EXPECT_THAT(FromDisk.Error, ToDisk.Error);"},{"Add":" EXPECT_EQ(FromDisk.Info, ToDisk.Info);"},{"Add":" }"},{"Add":" {"},{"Add":" // Vector version."},{"Add":" const auto FromDiskVector ="},{"Add":" ExitOnErr(InstructionBenchmark::readYamls(State, Filename));"},{"Add":" ASSERT_EQ(FromDiskVector.size(), size_t{1});"},{"Add":" const auto FromDisk = FromDiskVector[0];"},{"Add":" EXPECT_THAT(FromDisk.Key.Instructions,"},{"Add":" Pointwise(EqMCInst(), ToDisk.Key.Instructions));"},{"Add":" EXPECT_EQ(FromDisk.Key.Config, ToDisk.Key.Config);"},{"Add":" EXPECT_EQ(FromDisk.Mode, ToDisk.Mode);"},{"Add":" EXPECT_EQ(FromDisk.CpuName, ToDisk.CpuName);"},{"Add":" EXPECT_EQ(FromDisk.LLVMTriple, ToDisk.LLVMTriple);"},{"Add":" EXPECT_EQ(FromDisk.NumRepetitions, ToDisk.NumRepetitions);"},{"Add":" EXPECT_THAT(FromDisk.Measurements, ToDisk.Measurements);"},{"Add":" EXPECT_THAT(FromDisk.Error, ToDisk.Error);"},{"Add":" EXPECT_EQ(FromDisk.Info, ToDisk.Info);"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST(BenchmarkResultTest, PerInstructionStats) {"},{"Add":" PerInstructionStats Stats;"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 0.5, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 1.5, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", -1.0, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 0.0, 0.0});"},{"Add":" EXPECT_EQ(Stats.min(), -1.0);"},{"Add":" EXPECT_EQ(Stats.max(), 1.5);"},{"Add":" EXPECT_EQ(Stats.avg(), 0.25); // (0.5+1.5-1.0+0.0) / 4"},{"Add":"}"},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"AssemblerTest.cpp","metadata":0},"context":[{"change":0,"pos":18753}],"contents":[{"Add":"//===-- AssemblerTest.cpp ---------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"X86InstrInfo.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeX86ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using X86::EAX;"},{"Add":"using X86::MOV32ri;"},{"Add":"using X86::MOV64ri32;"},{"Add":"using X86::RAX;"},{"Add":"using X86::XOR32rr;"},{"Add":""},{"Add":"class X86MachineFunctionGeneratorTest"},{"Add":" : public MachineFunctionGeneratorBaseTest {"},{"Add":"protected:"},{"Add":" X86MachineFunctionGeneratorTest()"},{"Add":" : MachineFunctionGeneratorBaseTest(\"x86_64-unknown-linux\", \"haswell\") {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeX86TargetInfo();"},{"Add":" LLVMInitializeX86TargetMC();"},{"Add":" LLVMInitializeX86Target();"},{"Add":" LLVMInitializeX86AsmPrinter();"},{"Add":" InitializeX86ExegesisTarget();"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunction) {"},{"Add":" Check({}, MCInst(), 0xc3);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_X86) {"},{"Add":" Check({{EAX, APInt(32, 1)}},"},{"Add":" MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),"},{"Add":" // mov eax, 1"},{"Add":" 0xb8, 0x01, 0x00, 0x00, 0x00,"},{"Add":" // xor eax, eax"},{"Add":" 0x31, 0xc0, 0xc3);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV64ri) {"},{"Add":" Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0,"},{"Add":" 0x2a, 0x00, 0x00, 0x00, 0xc3);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV32ri) {"},{"Add":" Check({}, MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00,"},{"Add":" 0x00, 0x00, 0xc3);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"RegisterValueTest.cpp","metadata":0},"context":[{"change":0,"pos":18726}],"contents":[{"Add":"//===-- RegisterValueTest.cpp -----------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"RegisterValue.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"#define CHECK(EXPECTED, ACTUAL) \\"},{"Add":" EXPECT_EQ(APInt(SizeInBits, EXPECTED, 16), \\"},{"Add":" bitcastFloatValue(Semantic, PredefinedValues::ACTUAL))"},{"Add":""},{"Add":"TEST(RegisterValueTest, Half) {"},{"Add":" const size_t SizeInBits = 16;"},{"Add":" const auto &Semantic = APFloatBase::IEEEhalf();"},{"Add":" CHECK(\"0000\", POS_ZERO);"},{"Add":" CHECK(\"8000\", NEG_ZERO);"},{"Add":" CHECK(\"3C00\", ONE);"},{"Add":" CHECK(\"4000\", TWO);"},{"Add":" CHECK(\"7C00\", INF);"},{"Add":" CHECK(\"7E00\", QNAN);"},{"Add":" CHECK(\"7BFF\", LARGEST);"},{"Add":" CHECK(\"0400\", SMALLEST_NORM);"},{"Add":" CHECK(\"0001\", SMALLEST);"},{"Add":" CHECK(\"0001\", ULP);"},{"Add":" CHECK(\"3C01\", ONE_PLUS_ULP);"},{"Add":"}"},{"Add":""},{"Add":"TEST(RegisterValueTest, Single) {"},{"Add":" const size_t SizeInBits = 32;"},{"Add":" const auto &Semantic = APFloatBase::IEEEsingle();"},{"Add":" CHECK(\"00000000\", POS_ZERO);"},{"Add":" CHECK(\"80000000\", NEG_ZERO);"},{"Add":" CHECK(\"3F800000\", ONE);"},{"Add":" CHECK(\"40000000\", TWO);"},{"Add":" CHECK(\"7F800000\", INF);"},{"Add":" CHECK(\"7FC00000\", QNAN);"},{"Add":" CHECK(\"7F7FFFFF\", LARGEST);"},{"Add":" CHECK(\"00800000\", SMALLEST_NORM);"},{"Add":" CHECK(\"00000001\", SMALLEST);"},{"Add":" CHECK(\"00000001\", ULP);"},{"Add":" CHECK(\"3F800001\", ONE_PLUS_ULP);"},{"Add":"}"},{"Add":""},{"Add":"TEST(RegisterValueTest, Double) {"},{"Add":" const size_t SizeInBits = 64;"},{"Add":" const auto &Semantic = APFloatBase::IEEEdouble();"},{"Add":" CHECK(\"0000000000000000\", POS_ZERO);"},{"Add":" CHECK(\"8000000000000000\", NEG_ZERO);"},{"Add":" CHECK(\"3FF0000000000000\", ONE);"},{"Add":" CHECK(\"4000000000000000\", TWO);"},{"Add":" CHECK(\"7FF0000000000000\", INF);"},{"Add":" CHECK(\"7FF8000000000000\", QNAN);"},{"Add":" CHECK(\"7FEFFFFFFFFFFFFF\", LARGEST);"},{"Add":" CHECK(\"0010000000000000\", SMALLEST_NORM);"},{"Add":" CHECK(\"0000000000000001\", SMALLEST);"},{"Add":" CHECK(\"0000000000000001\", ULP);"},{"Add":" CHECK(\"3FF0000000000001\", ONE_PLUS_ULP);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"PowerPC","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"TestBase.h","metadata":0},"context":[{"change":0,"pos":76506}],"contents":[{"Add":"//===-- TestBase.h ----------------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"// Test fixture common to all PowerPC tests."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_POWERPC_TESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_POWERPC_TESTBASE_H"},{"Add":""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializePowerPCExegesisTarget();"},{"Add":""},{"Add":"class PPCTestBase : public ::testing::Test {"},{"Add":"protected:"},{"Add":" PPCTestBase() : State(\"powerpc64le-unknown-linux\", \"ppc64le\") {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializePowerPCTargetInfo();"},{"Add":" LLVMInitializePowerPCTargetMC();"},{"Add":" LLVMInitializePowerPCTarget();"},{"Add":" InitializePowerPCExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" const LLVMState State;"},{"Add":"};"},{"Add":""},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"},{"Add":""},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"TargetTest.cpp","metadata":0},"context":[{"change":0,"pos":76506}],"contents":[{"Add":"//===-- TargetTest.cpp ---------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Target.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"MCTargetDesc/PPCMCTargetDesc.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm{"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializePowerPCExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::NotNull;"},{"Add":"using testing::IsEmpty;"},{"Add":"using testing::Not;"},{"Add":""},{"Add":"constexpr const char kTriple[] = \"powerpc64le-unknown-linux\";"},{"Add":""},{"Add":"class PowerPCTargetTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" PowerPCTargetTest()"},{"Add":" : ExegesisTarget_(ExegesisTarget::lookup(Triple(kTriple))) {"},{"Add":" EXPECT_THAT(ExegesisTarget_, NotNull());"},{"Add":" std::string error;"},{"Add":" Target_ = TargetRegistry::lookupTarget(kTriple, error);"},{"Add":" EXPECT_THAT(Target_, NotNull());"},{"Add":" }"},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializePowerPCTargetInfo();"},{"Add":" LLVMInitializePowerPCTarget();"},{"Add":" LLVMInitializePowerPCTargetMC();"},{"Add":" InitializePowerPCExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" const Target *Target_;"},{"Add":" const ExegesisTarget *const ExegesisTarget_;"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(PowerPCTargetTest, SetRegToConstant) {"},{"Add":" const std::unique_ptr STI("},{"Add":" Target_->createMCSubtargetInfo(kTriple, \"generic\", \"\"));"},{"Add":" const auto Insts = ExegesisTarget_->setRegTo(*STI, PPC::X0, APInt());"},{"Add":" EXPECT_THAT(Insts, Not(IsEmpty()));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(PowerPCTargetTest, DefaultPfmCounters) {"},{"Add":" const std::string Expected = \"CYCLES\";"},{"Add":" EXPECT_EQ(ExegesisTarget_->getPfmCounters(\"\").CycleCounter, Expected);"},{"Add":" EXPECT_EQ(ExegesisTarget_->getPfmCounters(\"unknown_cpu\").CycleCounter,"},{"Add":" Expected);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SnippetGeneratorTest.cpp","metadata":0},"context":[{"change":0,"pos":76506}],"contents":[{"Add":"//===-- SnippetGeneratorTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"MCInstrDescView.h\""},{"Add":"#include \"PPCInstrInfo.h\""},{"Add":"#include \"ParallelSnippetGenerator.h\""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":"#include \"SerialSnippetGenerator.h\""},{"Add":"#include \"TestBase.h\""},{"Add":""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AnyOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::HasSubstr;"},{"Add":"using testing::SizeIs;"},{"Add":""},{"Add":"MATCHER(IsInvalid, \"\") { return !arg.isValid(); }"},{"Add":"MATCHER(IsReg, \"\") { return arg.isReg(); }"},{"Add":""},{"Add":"template "},{"Add":"class PPCSnippetGeneratorTest : public PPCTestBase {"},{"Add":"protected:"},{"Add":" PPCSnippetGeneratorTest() : Generator(State, SnippetGenerator::Options()) {}"},{"Add":""},{"Add":" std::vector checkAndGetCodeTemplates(unsigned Opcode) {"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" auto CodeTemplateOrError = Generator.generateCodeTemplates("},{"Add":" &Instr, State.getRATC().emptyRegisters());"},{"Add":" EXPECT_FALSE(CodeTemplateOrError.takeError()); // Valid configuration."},{"Add":" return std::move(CodeTemplateOrError.get());"},{"Add":" }"},{"Add":""},{"Add":" SnippetGeneratorT Generator;"},{"Add":"};"},{"Add":""},{"Add":"using PPCSerialSnippetGeneratorTest = PPCSnippetGeneratorTest;"},{"Add":""},{"Add":"using PPCParallelSnippetGeneratorTest ="},{"Add":" PPCSnippetGeneratorTest;"},{"Add":""},{"Add":"TEST_F(PPCSerialSnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) {"},{"Add":" // - ADD8"},{"Add":" // - Op0 Explicit Def RegClass(G8RC)"},{"Add":" // - Op1 Explicit Use RegClass(G8RC)"},{"Add":" // - Op2 Explicit Use RegClass(G8RC)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = PPC::ADD8;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_EXPLICIT_REGS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" EXPECT_THAT(IT.getVariableValues(),"},{"Add":" AnyOf(ElementsAre(IsReg(), IsInvalid(), IsReg()),"},{"Add":" ElementsAre(IsReg(), IsReg(), IsInvalid())))"},{"Add":" << \"Op0 is either set to Op1 or to Op2\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(PPCSerialSnippetGeneratorTest, ImplicitSelfDependencyThroughTiedRegs) {"},{"Add":""},{"Add":" // - RLDIMI"},{"Add":" // - Op0 Explicit Def RegClass(G8RC)"},{"Add":" // - Op1 Explicit Use RegClass(G8RC) TiedToOp0"},{"Add":" // - Op2 Explicit Use RegClass(G8RC)"},{"Add":" // - Op3 Explicit Use Immediate"},{"Add":" // - Op4 Explicit Use Immediate"},{"Add":" // - Var0 [Op0,Op1]"},{"Add":" // - Var1 [Op2]"},{"Add":" // - Var2 [Op3]"},{"Add":" // - Var3 [Op4]"},{"Add":" // - hasTiedRegisters (execution is always serial)"},{"Add":" // - hasAliasingRegisters"},{"Add":" // - RLDIMI"},{"Add":" const unsigned Opcode = PPC::RLDIMI;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::ALWAYS_SERIAL_TIED_REGS_ALIAS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(4));"},{"Add":" EXPECT_THAT(IT.getVariableValues()[2], IsInvalid()) << \"Operand 1 is not set\";"},{"Add":" EXPECT_THAT(IT.getVariableValues()[3], IsInvalid()) << \"Operand 2 is not set\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(PPCParallelSnippetGeneratorTest, MemoryUse) {"},{"Add":" // - LDX"},{"Add":" // - Op0 Explicit Def RegClass(G8RC)"},{"Add":" // - Op1 Explicit Use Memory RegClass(GPRC)"},{"Add":" // - Op2 Explicit Use Memory RegClass(VSSRC)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasMemoryOperands"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = PPC::LDX;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info, HasSubstr(\"instruction has no tied variables picking \""},{"Add":" \"Uses different from defs\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" ASSERT_THAT(CT.Instructions,"},{"Add":" SizeIs(ParallelSnippetGenerator::kMinNumDifferentAddresses));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" EXPECT_EQ(IT.getVariableValues()[1].getReg(), PPC::X1);"},{"Add":" EXPECT_EQ(IT.getVariableValues()[2].getReg(), PPC::X13);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":76506}],"contents":[{"Add":"add_llvm_exegesis_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/PowerPC"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/PowerPC"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_components("},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" PowerPC"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_sources("},{"Add":" AnalysisTest.cpp"},{"Add":" SnippetGeneratorTest.cpp"},{"Add":" TargetTest.cpp"},{"Add":" )"},{"Add":"add_llvm_exegesis_unittest_link_libraries("},{"Add":" LLVMExegesisPowerPC)"}]}},{"FileAdd":{"meta":{"basename":"AnalysisTest.cpp","metadata":0},"context":[{"change":0,"pos":76506}],"contents":[{"Add":"//===-- PPCAnalysisTest.cpp ---------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Analysis.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm{"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::Pair;"},{"Add":"using testing::UnorderedElementsAre;"},{"Add":""},{"Add":"class PPCAnalysisTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" PPCAnalysisTest() {"},{"Add":" const std::string TT = \"powerpc64le-unknown-linux\";"},{"Add":" std::string error;"},{"Add":" const Target *const TheTarget = TargetRegistry::lookupTarget(TT, error);"},{"Add":" if (!TheTarget) {"},{"Add":" errs() << error << \"\\n\";"},{"Add":" return;"},{"Add":" }"},{"Add":" STI.reset(TheTarget->createMCSubtargetInfo(TT, \"pwr9\", \"\"));"},{"Add":""},{"Add":" // Compute the ProxResIdx of ports uses in tests."},{"Add":" const auto &SM = STI->getSchedModel();"},{"Add":" for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {"},{"Add":" const std::string Name = SM.getProcResource(I)->Name;"},{"Add":" if (Name == \"ALU\") {"},{"Add":" ALUIdx = I;"},{"Add":" } else if (Name == \"ALUE\") {"},{"Add":" ALUEIdx = I;"},{"Add":" } else if (Name == \"ALUO\") {"},{"Add":" ALUOIdx = I;"},{"Add":" } else if (Name == \"IP_AGEN\") {"},{"Add":" IPAGENIdx = I;"},{"Add":" }"},{"Add":" }"},{"Add":" EXPECT_NE(ALUIdx, 0);"},{"Add":" EXPECT_NE(ALUEIdx, 0);"},{"Add":" EXPECT_NE(ALUOIdx, 0);"},{"Add":" EXPECT_NE(IPAGENIdx, 0);"},{"Add":" }"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializePowerPCTargetInfo();"},{"Add":" LLVMInitializePowerPCTarget();"},{"Add":" LLVMInitializePowerPCTargetMC();"},{"Add":" }"},{"Add":""},{"Add":"protected:"},{"Add":" std::unique_ptr STI;"},{"Add":" uint16_t ALUIdx = 0;"},{"Add":" uint16_t ALUEIdx = 0;"},{"Add":" uint16_t ALUOIdx = 0;"},{"Add":" uint16_t IPAGENIdx = 0;"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_2ALU) {"},{"Add":" const auto Pressure ="},{"Add":" computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2}});"},{"Add":" EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 2.0)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALUE) {"},{"Add":" const auto Pressure ="},{"Add":" computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2}});"},{"Add":" EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUEIdx, 2.0)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALU1IPAGEN) {"},{"Add":" const auto Pressure ="},{"Add":" computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 1}, {IPAGENIdx, 1}});"},{"Add":" EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 1.0),Pair(IPAGENIdx, 1)));"},{"Add":"}"},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"PerfHelperTest.cpp","metadata":0},"context":[{"change":0,"pos":18726}],"contents":[{"Add":"//===-- PerfHelperTest.cpp --------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"PerfHelper.h\""},{"Add":"#include \"llvm/Config/config.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace pfm {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::IsEmpty;"},{"Add":"using ::testing::Not;"},{"Add":""},{"Add":"TEST(PerfHelperTest, FunctionalTest) {"},{"Add":"#ifdef HAVE_LIBPFM"},{"Add":" ASSERT_FALSE(pfmInitialize());"},{"Add":" PerfEvent Event(\"CYCLES:u\");"},{"Add":" ASSERT_TRUE(Event.valid());"},{"Add":" EXPECT_EQ(Event.name(), \"CYCLES:u\");"},{"Add":" EXPECT_THAT(Event.getPfmEventString(), Not(IsEmpty()));"},{"Add":" Counter Cnt(std::move(Event));"},{"Add":" Cnt.start();"},{"Add":" Cnt.stop();"},{"Add":" Cnt.read();"},{"Add":" pfmTerminate();"},{"Add":"#else"},{"Add":" ASSERT_TRUE(pfmInitialize());"},{"Add":"#endif"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace pfm"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"Mips","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"TestBase.h","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"//===-- TestBase.h ----------------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"// Test fixture common to all Mips tests."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_MIPS_TESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_MIPS_TESTBASE_H"},{"Add":""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeMipsExegesisTarget();"},{"Add":""},{"Add":"class MipsTestBase : public ::testing::Test {"},{"Add":"protected:"},{"Add":" MipsTestBase() : State(\"mips-unknown-linux\", \"mips32\") {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeMipsTargetInfo();"},{"Add":" LLVMInitializeMipsTargetMC();"},{"Add":" LLVMInitializeMipsTarget();"},{"Add":" InitializeMipsExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" const LLVMState State;"},{"Add":"};"},{"Add":""},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"},{"Add":""},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"TargetTest.cpp","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"//===-- TargetTest.cpp ------------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Target.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"MCTargetDesc/MipsMCTargetDesc.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AllOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::Eq;"},{"Add":"using testing::Matcher;"},{"Add":"using testing::Property;"},{"Add":""},{"Add":"Matcher IsImm(int64_t Value) {"},{"Add":" return AllOf(Property(&MCOperand::isImm, Eq(true)),"},{"Add":" Property(&MCOperand::getImm, Eq(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsReg(unsigned Reg) {"},{"Add":" return AllOf(Property(&MCOperand::isReg, Eq(true)),"},{"Add":" Property(&MCOperand::getReg, Eq(Reg)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher OpcodeIs(unsigned Opcode) {"},{"Add":" return Property(&MCInst::getOpcode, Eq(Opcode));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsLoadLow16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) {"},{"Add":" const unsigned ZeroReg = IsGPR32 ? Mips::ZERO : Mips::ZERO_64;"},{"Add":" const unsigned ORi = IsGPR32 ? Mips::ORi : Mips::ORi64;"},{"Add":" return AllOf(OpcodeIs(ORi),"},{"Add":" ElementsAre(IsReg(Reg), IsReg(ZeroReg), IsImm(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsLoadHigh16BitImm(unsigned Reg, int64_t Value, bool IsGPR32) {"},{"Add":" const unsigned LUi = IsGPR32 ? Mips::LUi : Mips::LUi64;"},{"Add":" return AllOf(OpcodeIs(LUi), ElementsAre(IsReg(Reg), IsImm(Value)));"},{"Add":"}"},{"Add":""},{"Add":"Matcher IsShift(unsigned Reg, uint16_t Amount, bool IsGPR32) {"},{"Add":" const unsigned SLL = IsGPR32 ? Mips::SLL : Mips::SLL64_64;"},{"Add":" return AllOf(OpcodeIs(SLL),"},{"Add":" ElementsAre(IsReg(Reg), IsReg(Reg), IsImm(Amount)));"},{"Add":"}"},{"Add":""},{"Add":"class MipsTargetTest : public MipsTestBase {"},{"Add":"protected:"},{"Add":" std::vector setRegTo(unsigned Reg, const APInt &Value) {"},{"Add":" return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg,"},{"Add":" Value);"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(MipsTargetTest, SetGPR32RegTo16BitValue) {"},{"Add":" const uint16_t Value = 0xFFFFU;"},{"Add":" const unsigned Reg = Mips::T0;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),"},{"Add":" ElementsAre(IsLoadLow16BitImm(Reg, Value, true)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsTargetTest, SetGPR64RegTo16BitValue) {"},{"Add":" const uint16_t Value = 0xFFFFU;"},{"Add":" const unsigned Reg = Mips::T0_64;"},{"Add":" EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),"},{"Add":" ElementsAre(IsLoadLow16BitImm(Reg, Value, false)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsTargetTest, SetGPR32RegTo32BitValue) {"},{"Add":" const uint32_t Value0 = 0xFFFF0000UL;"},{"Add":" const unsigned Reg0 = Mips::T0;"},{"Add":" EXPECT_THAT(setRegTo(Reg0, APInt(32, Value0)),"},{"Add":" ElementsAre(IsLoadHigh16BitImm(Reg0, 0xFFFFU, true)));"},{"Add":" const uint32_t Value1 = 0xFFFFFFFFUL;"},{"Add":" const unsigned Reg1 = Mips::T1;"},{"Add":" EXPECT_THAT(setRegTo(Reg1, APInt(32, Value1)),"},{"Add":" ElementsAre(IsLoadHigh16BitImm(Reg1, 0xFFFFU, true),"},{"Add":" IsLoadLow16BitImm(Reg1, 0xFFFFU, true)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsTargetTest, SetGPR64RegTo32BitValue) {"},{"Add":" const uint32_t Value0 = 0x7FFF0000UL;"},{"Add":" const unsigned Reg0 = Mips::T0_64;"},{"Add":" EXPECT_THAT(setRegTo(Reg0, APInt(32, Value0)),"},{"Add":" ElementsAre(IsLoadHigh16BitImm(Reg0, 0x7FFFU, false)));"},{"Add":" const uint32_t Value1 = 0x7FFFFFFFUL;"},{"Add":" const unsigned Reg1 = Mips::T1_64;"},{"Add":" EXPECT_THAT(setRegTo(Reg1, APInt(32, Value1)),"},{"Add":" ElementsAre(IsLoadHigh16BitImm(Reg1, 0x7FFFU, false),"},{"Add":" IsLoadLow16BitImm(Reg1, 0xFFFFU, false)));"},{"Add":" const uint32_t Value2 = 0xFFFF0000UL;"},{"Add":" const unsigned Reg2 = Mips::T2_64;"},{"Add":" EXPECT_THAT(setRegTo(Reg2, APInt(32, Value2)),"},{"Add":" ElementsAre(IsLoadLow16BitImm(Reg2, 0xFFFFU, false),"},{"Add":" IsShift(Reg2, 16, false)));"},{"Add":" const uint32_t Value3 = 0xFFFFFFFFUL;"},{"Add":" const unsigned Reg3 = Mips::T3_64;"},{"Add":" EXPECT_THAT(setRegTo(Reg3, APInt(32, Value3)),"},{"Add":" ElementsAre(IsLoadLow16BitImm(Reg3, 0xFFFFU, false),"},{"Add":" IsShift(Reg3, 16, false),"},{"Add":" IsLoadLow16BitImm(Reg3, 0xFFFFU, false)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsTargetTest, DefaultPfmCounters) {"},{"Add":" const std::string Expected = \"CYCLES\";"},{"Add":" EXPECT_EQ(State.getExegesisTarget().getPfmCounters(\"\").CycleCounter,"},{"Add":" Expected);"},{"Add":" EXPECT_EQ("},{"Add":" State.getExegesisTarget().getPfmCounters(\"unknown_cpu\").CycleCounter,"},{"Add":" Expected);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"SnippetGeneratorTest.cpp","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"//===-- SnippetGeneratorTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"LlvmState.h\""},{"Add":"#include \"MCInstrDescView.h\""},{"Add":"#include \"MipsInstrInfo.h\""},{"Add":"#include \"ParallelSnippetGenerator.h\""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":"#include \"SerialSnippetGenerator.h\""},{"Add":"#include \"TestBase.h\""},{"Add":""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::AnyOf;"},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::HasSubstr;"},{"Add":"using testing::SizeIs;"},{"Add":""},{"Add":"MATCHER(IsInvalid, \"\") { return !arg.isValid(); }"},{"Add":"MATCHER(IsReg, \"\") { return arg.isReg(); }"},{"Add":""},{"Add":"template "},{"Add":"class MipsSnippetGeneratorTest : public MipsTestBase {"},{"Add":"protected:"},{"Add":" MipsSnippetGeneratorTest() : Generator(State, SnippetGenerator::Options()) {}"},{"Add":""},{"Add":" std::vector checkAndGetCodeTemplates(unsigned Opcode) {"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Opcode);"},{"Add":" auto CodeTemplateOrError = Generator.generateCodeTemplates("},{"Add":" &Instr, State.getRATC().emptyRegisters());"},{"Add":" EXPECT_FALSE(CodeTemplateOrError.takeError()); // Valid configuration."},{"Add":" return std::move(CodeTemplateOrError.get());"},{"Add":" }"},{"Add":""},{"Add":" SnippetGeneratorT Generator;"},{"Add":"};"},{"Add":""},{"Add":"using MipsSerialSnippetGeneratorTest = MipsSnippetGeneratorTest;"},{"Add":""},{"Add":"using MipsParallelSnippetGeneratorTest ="},{"Add":" MipsSnippetGeneratorTest;"},{"Add":""},{"Add":"TEST_F(MipsSerialSnippetGeneratorTest, ImplicitSelfDependencyThroughExplicitRegs) {"},{"Add":" // - ADD"},{"Add":" // - Op0 Explicit Def RegClass(GPR32)"},{"Add":" // - Op1 Explicit Use RegClass(GPR32)"},{"Add":" // - Op2 Explicit Use RegClass(GPR32)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasAliasingRegisters"},{"Add":" const unsigned Opcode = Mips::ADD;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_EXPLICIT_REGS);"},{"Add":" ASSERT_THAT(CT.Instructions, SizeIs(1));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" EXPECT_THAT(IT.getVariableValues(),"},{"Add":" AnyOf(ElementsAre(IsReg(), IsInvalid(), IsReg()),"},{"Add":" ElementsAre(IsReg(), IsReg(), IsInvalid())))"},{"Add":" << \"Op0 is either set to Op1 or to Op2\";"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsSerialSnippetGeneratorTest,"},{"Add":" ImplicitSelfDependencyThroughExplicitRegsForbidAll) {"},{"Add":" // - XOR"},{"Add":" // - Op0 Explicit Def RegClass(GPR32)"},{"Add":" // - Op1 Explicit Use RegClass(GPR32)"},{"Add":" // - Op2 Explicit Use RegClass(GPR32)"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasAliasingRegisters"},{"Add":" randomGenerator().seed(0); // Initialize seed."},{"Add":" const Instruction &Instr = State.getIC().getInstr(Mips::XOR);"},{"Add":" auto AllRegisters = State.getRATC().emptyRegisters();"},{"Add":" AllRegisters.flip();"},{"Add":" auto Error ="},{"Add":" Generator.generateCodeTemplates(&Instr, AllRegisters).takeError();"},{"Add":" EXPECT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsParallelSnippetGeneratorTest, MemoryUse) {"},{"Add":" // LB reads from memory."},{"Add":" // - LB"},{"Add":" // - Op0 Explicit Def RegClass(GPR32)"},{"Add":" // - Op1 Explicit Use Memory RegClass(MSA128F16)"},{"Add":" // - Op2 Explicit Use Memory"},{"Add":" // - Var0 [Op0]"},{"Add":" // - Var1 [Op1]"},{"Add":" // - Var2 [Op2]"},{"Add":" // - hasMemoryOperands"},{"Add":" const unsigned Opcode = Mips::LB;"},{"Add":" const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);"},{"Add":" ASSERT_THAT(CodeTemplates, SizeIs(1));"},{"Add":" const auto &CT = CodeTemplates[0];"},{"Add":" EXPECT_THAT(CT.Info,"},{"Add":" HasSubstr(\"instruction is parallel, repeating a random one.\"));"},{"Add":" EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);"},{"Add":" ASSERT_THAT(CT.Instructions,"},{"Add":" SizeIs(ParallelSnippetGenerator::kMinNumDifferentAddresses));"},{"Add":" const InstructionTemplate &IT = CT.Instructions[0];"},{"Add":" EXPECT_THAT(IT.getOpcode(), Opcode);"},{"Add":" ASSERT_THAT(IT.getVariableValues(), SizeIs(3));"},{"Add":" EXPECT_EQ(IT.getVariableValues()[0].getReg(), 0u);"},{"Add":" EXPECT_EQ(IT.getVariableValues()[2].getImm(), 0);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"RegisterAliasingTest.cpp","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"//===-- RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"RegisterAliasing.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"MipsInstrInfo.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"class MipsRegisterAliasingTest : public MipsTestBase {};"},{"Add":""},{"Add":"TEST_F(MipsRegisterAliasingTest, TrackSimpleRegister) {"},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const RegisterAliasingTracker tracker(RegInfo, Mips::T0_64);"},{"Add":" std::set ActualAliasedRegisters;"},{"Add":" for (unsigned I : tracker.aliasedBits().set_bits())"},{"Add":" ActualAliasedRegisters.insert(static_cast(I));"},{"Add":" const std::set ExpectedAliasedRegisters = {Mips::T0, Mips::T0_64};"},{"Add":" ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);"},{"Add":" for (MCPhysReg aliased : ExpectedAliasedRegisters) {"},{"Add":" ASSERT_THAT(tracker.getOrigin(aliased), Mips::T0_64);"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsRegisterAliasingTest, TrackRegisterClass) {"},{"Add":" // The alias bits for"},{"Add":" // GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID"},{"Add":" // are the union of the alias bits for ZERO_64, V0_64, V1_64 and S1_64."},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const BitVector NoReservedReg(RegInfo.getNumRegs());"},{"Add":""},{"Add":" const RegisterAliasingTracker RegClassTracker("},{"Add":" RegInfo, NoReservedReg,"},{"Add":" RegInfo.getRegClass("},{"Add":" Mips::GPR64_with_sub_32_in_GPRMM16MoveP_and_GPRMM16ZeroRegClassID));"},{"Add":""},{"Add":" BitVector sum(RegInfo.getNumRegs());"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, Mips::ZERO_64).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, Mips::V0_64).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, Mips::V1_64).aliasedBits();"},{"Add":" sum |= RegisterAliasingTracker(RegInfo, Mips::S1_64).aliasedBits();"},{"Add":""},{"Add":" ASSERT_THAT(RegClassTracker.aliasedBits(), sum);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsRegisterAliasingTest, TrackRegisterClassCache) {"},{"Add":" // Fetching the same tracker twice yields the same pointers."},{"Add":" const auto &RegInfo = State.getRegInfo();"},{"Add":" const BitVector NoReservedReg(RegInfo.getNumRegs());"},{"Add":" RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);"},{"Add":" ASSERT_THAT(&Cache.getRegister(Mips::T0), &Cache.getRegister(Mips::T0));"},{"Add":""},{"Add":" ASSERT_THAT(&Cache.getRegisterClass(Mips::ACC64RegClassID),"},{"Add":" &Cache.getRegisterClass(Mips::ACC64RegClassID));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"add_llvm_exegesis_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/Mips"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/Mips"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_components("},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" Mips"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_sources("},{"Add":" BenchmarkResultTest.cpp"},{"Add":" RegisterAliasingTest.cpp"},{"Add":" SnippetGeneratorTest.cpp"},{"Add":" TargetTest.cpp"},{"Add":" )"},{"Add":"add_llvm_exegesis_unittest_link_libraries("},{"Add":" LLVMExegesisMips)"}]}},{"FileAdd":{"meta":{"basename":"BenchmarkResultTest.cpp","metadata":0},"context":[{"change":0,"pos":89088}],"contents":[{"Add":"//===-- BenchmarkResultTest.cpp ---------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"BenchmarkResult.h\""},{"Add":"#include \"MipsInstrInfo.h\""},{"Add":"#include \"TestBase.h\""},{"Add":"#include \"llvm/ADT/SmallString.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/Path.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"llvm/Support/YAMLTraits.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"llvm/Testing/Support/SupportHelpers.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"using ::testing::AllOf;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::get;"},{"Add":"using ::testing::Pointwise;"},{"Add":"using ::testing::Property;"},{"Add":""},{"Add":"using llvm::unittest::TempDir;"},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"static std::string Dump(const MCInst &McInst) {"},{"Add":" std::string Buffer;"},{"Add":" raw_string_ostream OS(Buffer);"},{"Add":" McInst.print(OS);"},{"Add":" return Buffer;"},{"Add":"}"},{"Add":""},{"Add":"MATCHER(EqMCInst, \"\") {"},{"Add":" const std::string Lhs = Dump(get<0>(arg));"},{"Add":" const std::string Rhs = Dump(get<1>(arg));"},{"Add":" if (Lhs != Rhs) {"},{"Add":" *result_listener << Lhs << \" <=> \" << Rhs;"},{"Add":" return false;"},{"Add":" }"},{"Add":" return true;"},{"Add":"}"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"class MipsBenchmarkResultTest : public MipsTestBase {};"},{"Add":""},{"Add":"TEST_F(MipsBenchmarkResultTest, WriteToAndReadFromDisk) {"},{"Add":" ExitOnError ExitOnErr;"},{"Add":""},{"Add":" InstructionBenchmark ToDisk;"},{"Add":""},{"Add":" ToDisk.Key.Instructions.push_back(MCInstBuilder(Mips::XOR)"},{"Add":" .addReg(Mips::T0)"},{"Add":" .addReg(Mips::T1)"},{"Add":" .addReg(Mips::T2));"},{"Add":" ToDisk.Key.Config = \"config\";"},{"Add":" ToDisk.Key.RegisterInitialValues = {"},{"Add":" RegisterValue{Mips::T1, APInt(8, \"123\", 10)},"},{"Add":" RegisterValue{Mips::T2, APInt(8, \"456\", 10)}};"},{"Add":" ToDisk.Mode = InstructionBenchmark::Latency;"},{"Add":" ToDisk.CpuName = \"cpu_name\";"},{"Add":" ToDisk.LLVMTriple = \"llvm_triple\";"},{"Add":" ToDisk.NumRepetitions = 1;"},{"Add":" ToDisk.Measurements.push_back(BenchmarkMeasure{\"a\", 1, 1});"},{"Add":" ToDisk.Measurements.push_back(BenchmarkMeasure{\"b\", 2, 2});"},{"Add":" ToDisk.Error = \"error\";"},{"Add":" ToDisk.Info = \"info\";"},{"Add":""},{"Add":" TempDir TestDirectory(\"BenchmarkResultTestDir\", /*Unique*/ true);"},{"Add":" SmallString<64> Filename(TestDirectory.path());"},{"Add":" sys::path::append(Filename, \"data.yaml\");"},{"Add":" errs() << Filename << \"-------\\n\";"},{"Add":" ExitOnErr(ToDisk.writeYaml(State, Filename));"},{"Add":""},{"Add":" {"},{"Add":" // One-element version."},{"Add":" const auto FromDisk ="},{"Add":" ExitOnErr(InstructionBenchmark::readYaml(State, Filename));"},{"Add":""},{"Add":" EXPECT_THAT(FromDisk.Key.Instructions,"},{"Add":" Pointwise(EqMCInst(), ToDisk.Key.Instructions));"},{"Add":" EXPECT_EQ(FromDisk.Key.Config, ToDisk.Key.Config);"},{"Add":" EXPECT_EQ(FromDisk.Mode, ToDisk.Mode);"},{"Add":" EXPECT_EQ(FromDisk.CpuName, ToDisk.CpuName);"},{"Add":" EXPECT_EQ(FromDisk.LLVMTriple, ToDisk.LLVMTriple);"},{"Add":" EXPECT_EQ(FromDisk.NumRepetitions, ToDisk.NumRepetitions);"},{"Add":" EXPECT_THAT(FromDisk.Measurements, ToDisk.Measurements);"},{"Add":" EXPECT_THAT(FromDisk.Error, ToDisk.Error);"},{"Add":" EXPECT_EQ(FromDisk.Info, ToDisk.Info);"},{"Add":" }"},{"Add":" {"},{"Add":" // Vector version."},{"Add":" const auto FromDiskVector ="},{"Add":" ExitOnErr(InstructionBenchmark::readYamls(State, Filename));"},{"Add":" ASSERT_EQ(FromDiskVector.size(), size_t{1});"},{"Add":" const auto FromDisk = FromDiskVector[0];"},{"Add":" EXPECT_THAT(FromDisk.Key.Instructions,"},{"Add":" Pointwise(EqMCInst(), ToDisk.Key.Instructions));"},{"Add":" EXPECT_EQ(FromDisk.Key.Config, ToDisk.Key.Config);"},{"Add":" EXPECT_EQ(FromDisk.Mode, ToDisk.Mode);"},{"Add":" EXPECT_EQ(FromDisk.CpuName, ToDisk.CpuName);"},{"Add":" EXPECT_EQ(FromDisk.LLVMTriple, ToDisk.LLVMTriple);"},{"Add":" EXPECT_EQ(FromDisk.NumRepetitions, ToDisk.NumRepetitions);"},{"Add":" EXPECT_THAT(FromDisk.Measurements, ToDisk.Measurements);"},{"Add":" EXPECT_THAT(FromDisk.Error, ToDisk.Error);"},{"Add":" EXPECT_EQ(FromDisk.Info, ToDisk.Info);"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(MipsBenchmarkResultTest, PerInstructionStats) {"},{"Add":" PerInstructionStats Stats;"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 0.5, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 1.5, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", -1.0, 0.0});"},{"Add":" Stats.push(BenchmarkMeasure{\"a\", 0.0, 0.0});"},{"Add":" EXPECT_EQ(Stats.min(), -1.0);"},{"Add":" EXPECT_EQ(Stats.max(), 1.5);"},{"Add":" EXPECT_EQ(Stats.avg(), 0.25); // (0.5+1.5-1.0+0.0) / 4"},{"Add":"}"},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"Common","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"AssemblerUtils.h","metadata":0},"context":[{"change":0,"pos":107152}],"contents":[{"Add":"//===-- AssemblerUtils.h ----------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#ifndef LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_ASSEMBLERUTILS_H"},{"Add":"#define LLVM_UNITTESTS_TOOLS_LLVMEXEGESIS_ASSEMBLERUTILS_H"},{"Add":""},{"Add":"#include \"Assembler.h\""},{"Add":"#include \"BenchmarkRunner.h\""},{"Add":"#include \"Target.h\""},{"Add":"#include \"llvm/ADT/ArrayRef.h\""},{"Add":"#include \"llvm/CodeGen/MachineInstrBuilder.h\""},{"Add":"#include \"llvm/CodeGen/TargetInstrInfo.h\""},{"Add":"#include \"llvm/CodeGen/TargetSubtargetInfo.h\""},{"Add":"#include \"llvm/MC/MCInstBuilder.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/Host.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"class MachineFunctionGeneratorBaseTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" MachineFunctionGeneratorBaseTest(const std::string &TT,"},{"Add":" const std::string &CpuName)"},{"Add":" : TT(TT), CpuName(CpuName),"},{"Add":" CanExecute(Triple(TT).getArch() =="},{"Add":" Triple(sys::getProcessTriple()).getArch()),"},{"Add":" ET(ExegesisTarget::lookup(Triple(TT))) {"},{"Add":" assert(ET);"},{"Add":" if (!CanExecute) {"},{"Add":" outs() << \"Skipping execution, host:\" << sys::getProcessTriple()"},{"Add":" << \", target:\" << TT << \"\\n\";"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" template "},{"Add":" inline void Check(ArrayRef RegisterInitialValues, MCInst Inst,"},{"Add":" Bs... Bytes) {"},{"Add":" ExecutableFunction Function ="},{"Add":" (Inst.getOpcode() == 0)"},{"Add":" ? assembleToFunction(RegisterInitialValues, [](FunctionFiller &) {})"},{"Add":" : assembleToFunction(RegisterInitialValues,"},{"Add":" [Inst](FunctionFiller &Filler) {"},{"Add":" Filler.getEntry().addInstruction(Inst);"},{"Add":" });"},{"Add":" ASSERT_THAT(Function.getFunctionBytes().str(),"},{"Add":" testing::ElementsAre(Bytes...));"},{"Add":" if (CanExecute) {"},{"Add":" BenchmarkRunner::ScratchSpace Scratch;"},{"Add":" Function(Scratch.ptr());"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":"private:"},{"Add":" std::unique_ptr createTargetMachine() {"},{"Add":" std::string Error;"},{"Add":" const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);"},{"Add":" EXPECT_TRUE(TheTarget) << Error << \" \" << TT;"},{"Add":" const TargetOptions Options;"},{"Add":" TargetMachine *TM = TheTarget->createTargetMachine(TT, CpuName, \"\", Options,"},{"Add":" Reloc::Model::Static);"},{"Add":" EXPECT_TRUE(TM) << TT << \" \" << CpuName;"},{"Add":" return std::unique_ptr("},{"Add":" static_cast(TM));"},{"Add":" }"},{"Add":""},{"Add":" ExecutableFunction"},{"Add":" assembleToFunction(ArrayRef RegisterInitialValues,"},{"Add":" FillFunction Fill) {"},{"Add":" SmallString<256> Buffer;"},{"Add":" raw_svector_ostream AsmStream(Buffer);"},{"Add":" EXPECT_FALSE(assembleToStream(*ET, createTargetMachine(), /*LiveIns=*/{},"},{"Add":" RegisterInitialValues, Fill, AsmStream));"},{"Add":" return ExecutableFunction(createTargetMachine(),"},{"Add":" getObjectFromBuffer(AsmStream.str()));"},{"Add":" }"},{"Add":""},{"Add":" const std::string TT;"},{"Add":" const std::string CpuName;"},{"Add":" const bool CanExecute;"},{"Add":" const ExegesisTarget *const ET;"},{"Add":"};"},{"Add":""},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"},{"Add":""},{"Add":"#endif"}]}},{"FileAdd":{"meta":{"basename":"ClusteringTest.cpp","metadata":0},"context":[{"change":0,"pos":18726}],"contents":[{"Add":"//===-- ClusteringTest.cpp --------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Clustering.h\""},{"Add":"#include \"BenchmarkResult.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::Field;"},{"Add":"using testing::UnorderedElementsAre;"},{"Add":"using testing::UnorderedElementsAreArray;"},{"Add":""},{"Add":"static const auto HasPoints = [](const std::vector &Indices) {"},{"Add":" return Field(&InstructionBenchmarkClustering::Cluster::PointIndices,"},{"Add":" UnorderedElementsAreArray(Indices));"},{"Add":"};"},{"Add":""},{"Add":"TEST(ClusteringTest, Clusters3D) {"},{"Add":" std::vector Points(6);"},{"Add":""},{"Add":" // Cluster around (x=0, y=1, z=2): points {0, 3}."},{"Add":" Points[0].Measurements = {"},{"Add":" {\"x\", 0.01, 0.0}, {\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" Points[3].Measurements = {"},{"Add":" {\"x\", -0.01, 0.0}, {\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" // Cluster around (x=1, y=1, z=2): points {1, 4}."},{"Add":" Points[1].Measurements = {"},{"Add":" {\"x\", 1.01, 0.0}, {\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" Points[4].Measurements = {"},{"Add":" {\"x\", 0.99, 0.0}, {\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" // Cluster around (x=0, y=0, z=0): points {5}, marked as noise."},{"Add":" Points[5].Measurements = {"},{"Add":" {\"x\", 0.0, 0.0}, {\"y\", 0.01, 0.0}, {\"z\", -0.02, 0.0}};"},{"Add":" // Error cluster: points {2}"},{"Add":" Points[2].Error = \"oops\";"},{"Add":""},{"Add":" auto Clustering = InstructionBenchmarkClustering::create("},{"Add":" Points, InstructionBenchmarkClustering::ModeE::Dbscan, 2, 0.25);"},{"Add":" ASSERT_TRUE((bool)Clustering);"},{"Add":" EXPECT_THAT(Clustering.get().getValidClusters(),"},{"Add":" UnorderedElementsAre(HasPoints({0, 3}), HasPoints({1, 4})));"},{"Add":" EXPECT_THAT(Clustering.get().getCluster("},{"Add":" InstructionBenchmarkClustering::ClusterId::noise()),"},{"Add":" HasPoints({5}));"},{"Add":" EXPECT_THAT(Clustering.get().getCluster("},{"Add":" InstructionBenchmarkClustering::ClusterId::error()),"},{"Add":" HasPoints({2}));"},{"Add":""},{"Add":" EXPECT_EQ(Clustering.get().getClusterIdForPoint(2),"},{"Add":" InstructionBenchmarkClustering::ClusterId::error());"},{"Add":" EXPECT_EQ(Clustering.get().getClusterIdForPoint(5),"},{"Add":" InstructionBenchmarkClustering::ClusterId::noise());"},{"Add":" EXPECT_EQ(Clustering.get().getClusterIdForPoint(0),"},{"Add":" Clustering.get().getClusterIdForPoint(3));"},{"Add":" EXPECT_EQ(Clustering.get().getClusterIdForPoint(1),"},{"Add":" Clustering.get().getClusterIdForPoint(4));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ClusteringTest, Clusters3D_InvalidSize) {"},{"Add":" std::vector Points(6);"},{"Add":" Points[0].Measurements = {"},{"Add":" {\"x\", 0.01, 0.0}, {\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" Points[1].Measurements = {{\"y\", 1.02, 0.0}, {\"z\", 1.98, 0.0}};"},{"Add":" auto Error ="},{"Add":" InstructionBenchmarkClustering::create("},{"Add":" Points, InstructionBenchmarkClustering::ModeE::Dbscan, 2, 0.25)"},{"Add":" .takeError();"},{"Add":" ASSERT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ClusteringTest, Clusters3D_InvalidOrder) {"},{"Add":" std::vector Points(6);"},{"Add":" Points[0].Measurements = {{\"x\", 0.01, 0.0}, {\"y\", 1.02, 0.0}};"},{"Add":" Points[1].Measurements = {{\"y\", 1.02, 0.0}, {\"x\", 1.98, 0.0}};"},{"Add":" auto Error ="},{"Add":" InstructionBenchmarkClustering::create("},{"Add":" Points, InstructionBenchmarkClustering::ModeE::Dbscan, 2, 0.25)"},{"Add":" .takeError();"},{"Add":" ASSERT_TRUE((bool)Error);"},{"Add":" consumeError(std::move(Error));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ClusteringTest, Ordering) {"},{"Add":" ASSERT_LT(InstructionBenchmarkClustering::ClusterId::makeValid(1),"},{"Add":" InstructionBenchmarkClustering::ClusterId::makeValid(2));"},{"Add":""},{"Add":" ASSERT_LT(InstructionBenchmarkClustering::ClusterId::makeValid(2),"},{"Add":" InstructionBenchmarkClustering::ClusterId::noise());"},{"Add":""},{"Add":" ASSERT_LT(InstructionBenchmarkClustering::ClusterId::makeValid(2),"},{"Add":" InstructionBenchmarkClustering::ClusterId::error());"},{"Add":""},{"Add":" ASSERT_LT(InstructionBenchmarkClustering::ClusterId::noise(),"},{"Add":" InstructionBenchmarkClustering::ClusterId::error());"},{"Add":"}"},{"Add":""},{"Add":"TEST(ClusteringTest, Ordering1) {"},{"Add":" std::vector Points(3);"},{"Add":""},{"Add":" Points[0].Measurements = {"},{"Add":" {\"x\", 0.0, 0.0}};"},{"Add":" Points[1].Measurements = {"},{"Add":" {\"x\", 1.0, 0.0}};"},{"Add":" Points[2].Measurements = {"},{"Add":" {\"x\", 2.0, 0.0}};"},{"Add":""},{"Add":" auto Clustering = InstructionBenchmarkClustering::create("},{"Add":" Points, InstructionBenchmarkClustering::ModeE::Dbscan, 2, 1.1);"},{"Add":" ASSERT_TRUE((bool)Clustering);"},{"Add":" EXPECT_THAT(Clustering.get().getValidClusters(),"},{"Add":" UnorderedElementsAre(HasPoints({0, 1, 2})));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ClusteringTest, Ordering2) {"},{"Add":" std::vector Points(3);"},{"Add":""},{"Add":" Points[0].Measurements = {"},{"Add":" {\"x\", 0.0, 0.0}};"},{"Add":" Points[1].Measurements = {"},{"Add":" {\"x\", 2.0, 0.0}};"},{"Add":" Points[2].Measurements = {"},{"Add":" {\"x\", 1.0, 0.0}};"},{"Add":""},{"Add":" auto Clustering = InstructionBenchmarkClustering::create("},{"Add":" Points, InstructionBenchmarkClustering::ModeE::Dbscan, 2, 1.1);"},{"Add":" ASSERT_TRUE((bool)Clustering);"},{"Add":" EXPECT_THAT(Clustering.get().getValidClusters(),"},{"Add":" UnorderedElementsAre(HasPoints({0, 1, 2})));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":18726}],"contents":[{"Add":"set(exegesis_includes"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"set(LLVM_LINK_COMPONENTS"},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" )"},{"Add":""},{"Add":"set(exegesis_sources"},{"Add":" BenchmarkRunnerTest.cpp"},{"Add":" ClusteringTest.cpp"},{"Add":" PerfHelperTest.cpp"},{"Add":" RegisterValueTest.cpp"},{"Add":" )"},{"Add":""},{"Add":"set(exegesis_link_libraries LLVMExegesis)"},{"Add":""},{"Add":"function(add_llvm_exegesis_unittest_includes)"},{"Add":" set(exegesis_includes ${exegesis_includes} ${ARGV} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"function(add_llvm_exegesis_unittest_sources)"},{"Add":" set(sources ${ARGV})"},{"Add":" list(TRANSFORM sources PREPEND \"${CMAKE_CURRENT_LIST_DIR}/\")"},{"Add":" set(exegesis_sources ${exegesis_sources} ${sources} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"function(add_llvm_exegesis_unittest_link_components comps)"},{"Add":" set(LLVM_LINK_COMPONENTS ${LLVM_LINK_COMPONENTS} ${ARGV} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":"function(add_llvm_exegesis_unittest_link_libraries libs)"},{"Add":" set(exegesis_link_libraries ${exegesis_link_libraries} ${ARGV} PARENT_SCOPE)"},{"Add":"endfunction()"},{"Add":""},{"Add":""},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"X86\")"},{"Add":" include(X86/CMakeLists.txt)"},{"Add":"endif()"},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"ARM\")"},{"Add":" include(ARM/CMakeLists.txt)"},{"Add":"endif()"},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"AArch64\")"},{"Add":" include(AArch64/CMakeLists.txt)"},{"Add":"endif()"},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"PowerPC\")"},{"Add":" include(PowerPC/CMakeLists.txt)"},{"Add":"endif()"},{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"Mips\")"},{"Add":" include(Mips/CMakeLists.txt)"},{"Add":"endif()"},{"Add":""},{"Add":"include_directories(${exegesis_includes})"},{"Add":""},{"Add":"list(REMOVE_DUPLICATES LLVM_LINK_COMPONENTS)"},{"Add":""},{"Add":"add_llvm_target_unittest(LLVMExegesisTests"},{"Add":" ${exegesis_sources}"},{"Add":" )"},{"Add":"target_link_libraries(LLVMExegesisTests PRIVATE ${exegesis_link_libraries})"},{"Add":""},{"Add":"set_property(TARGET LLVMExegesisTests PROPERTY FOLDER \"Tests/UnitTests/ToolTests\")"}]}},{"FileAdd":{"meta":{"basename":"BenchmarkRunnerTest.cpp","metadata":0},"context":[{"change":0,"pos":18726}],"contents":[{"Add":"//===-- BenchmarkRunnerTest.cpp ---------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"BenchmarkRunner.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"TEST(ScratchSpaceTest, Works) {"},{"Add":" BenchmarkRunner::ScratchSpace Space;"},{"Add":" EXPECT_EQ(reinterpret_cast(Space.ptr()) %"},{"Add":" BenchmarkRunner::ScratchSpace::kAlignment,"},{"Add":" 0u);"},{"Add":" Space.ptr()[0] = 42;"},{"Add":" Space.ptr()[BenchmarkRunner::ScratchSpace::kSize - 1] = 43;"},{"Add":" Space.clear();"},{"Add":" EXPECT_EQ(Space.ptr()[0], 0);"},{"Add":" EXPECT_EQ(Space.ptr()[BenchmarkRunner::ScratchSpace::kSize - 1], 0);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"ARM","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":118736}],"contents":[{"Add":"add_llvm_exegesis_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/ARM"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/ARM"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_components("},{"Add":" Core"},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" ARM"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_sources("},{"Add":" AssemblerTest.cpp"},{"Add":" )"}]}},{"FileAdd":{"meta":{"basename":"AssemblerTest.cpp","metadata":0},"context":[{"change":0,"pos":118736}],"contents":[{"Add":"//===-- AssemblerTest.cpp ---------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../Common/AssemblerUtils.h\""},{"Add":"#include \"ARMInstrInfo.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":"namespace {"},{"Add":""},{"Add":"class ARMMachineFunctionGeneratorTest"},{"Add":" : public MachineFunctionGeneratorBaseTest {"},{"Add":"protected:"},{"Add":" ARMMachineFunctionGeneratorTest()"},{"Add":" : MachineFunctionGeneratorBaseTest(\"armv7-none-linux-gnueabi\", \"\") {}"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeARMTargetInfo();"},{"Add":" LLVMInitializeARMTargetMC();"},{"Add":" LLVMInitializeARMTarget();"},{"Add":" LLVMInitializeARMAsmPrinter();"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(ARMMachineFunctionGeneratorTest, DISABLED_JitFunction) {"},{"Add":" Check({}, MCInst(), 0x1e, 0xff, 0x2f, 0xe1);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(ARMMachineFunctionGeneratorTest, DISABLED_JitFunctionADDrr) {"},{"Add":" Check({{ARM::R0, APInt()}},"},{"Add":" MCInstBuilder(ARM::ADDrr)"},{"Add":" .addReg(ARM::R0)"},{"Add":" .addReg(ARM::R0)"},{"Add":" .addReg(ARM::R0)"},{"Add":" .addImm(ARMCC::AL)"},{"Add":" .addReg(0)"},{"Add":" .addReg(0),"},{"Add":" 0x00, 0x00, 0x80, 0xe0, 0x1e, 0xff, 0x2f, 0xe1);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"AArch64","metadata":576},"context":[{"change":0,"pos":18726}],"contents":[]}},{"FileAdd":{"meta":{"basename":"TargetTest.cpp","metadata":0},"context":[{"change":0,"pos":120573}],"contents":[{"Add":"//===-- TargetTest.cpp ------------------------------------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"Target.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"#include \"MCTargetDesc/AArch64MCTargetDesc.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace exegesis {"},{"Add":""},{"Add":"void InitializeAArch64ExegesisTarget();"},{"Add":""},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::Gt;"},{"Add":"using testing::IsEmpty;"},{"Add":"using testing::Not;"},{"Add":"using testing::NotNull;"},{"Add":""},{"Add":"constexpr const char kTriple[] = \"aarch64-unknown-linux\";"},{"Add":""},{"Add":"class AArch64TargetTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" AArch64TargetTest()"},{"Add":" : ExegesisTarget_(ExegesisTarget::lookup(Triple(kTriple))) {"},{"Add":" EXPECT_THAT(ExegesisTarget_, NotNull());"},{"Add":" std::string error;"},{"Add":" Target_ = TargetRegistry::lookupTarget(kTriple, error);"},{"Add":" EXPECT_THAT(Target_, NotNull());"},{"Add":" STI_.reset("},{"Add":" Target_->createMCSubtargetInfo(kTriple, \"generic\", /*no features*/ \"\"));"},{"Add":" }"},{"Add":""},{"Add":" static void SetUpTestCase() {"},{"Add":" LLVMInitializeAArch64TargetInfo();"},{"Add":" LLVMInitializeAArch64Target();"},{"Add":" LLVMInitializeAArch64TargetMC();"},{"Add":" InitializeAArch64ExegesisTarget();"},{"Add":" }"},{"Add":""},{"Add":" std::vector setRegTo(unsigned Reg, const APInt &Value) {"},{"Add":" return ExegesisTarget_->setRegTo(*STI_, Reg, Value);"},{"Add":" }"},{"Add":""},{"Add":" const Target *Target_;"},{"Add":" const ExegesisTarget *const ExegesisTarget_;"},{"Add":" std::unique_ptr STI_;"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(AArch64TargetTest, SetRegToConstant) {"},{"Add":" // The AArch64 target currently doesn't know how to set register values."},{"Add":" const auto Insts = setRegTo(AArch64::X0, APInt());"},{"Add":" EXPECT_THAT(Insts, Not(IsEmpty()));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(AArch64TargetTest, DefaultPfmCounters) {"},{"Add":" const std::string Expected = \"CPU_CYCLES\";"},{"Add":" EXPECT_EQ(ExegesisTarget_->getPfmCounters(\"\").CycleCounter, Expected);"},{"Add":" EXPECT_EQ(ExegesisTarget_->getPfmCounters(\"unknown_cpu\").CycleCounter,"},{"Add":" Expected);"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace exegesis"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":120573}],"contents":[{"Add":"add_llvm_exegesis_unittest_includes("},{"Add":" ${LLVM_MAIN_SRC_DIR}/lib/Target/AArch64"},{"Add":" ${LLVM_BINARY_DIR}/lib/Target/AArch64"},{"Add":" ${LLVM_MAIN_SRC_DIR}/tools/llvm-exegesis/lib"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_link_components("},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" AArch64"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_exegesis_unittest_sources("},{"Add":" TargetTest.cpp"},{"Add":" )"},{"Add":"add_llvm_exegesis_unittest_link_libraries("},{"Add":" LLVMExegesisAArch64)"}]}},{"FileAdd":{"meta":{"basename":"llvm-cfi-verify","metadata":576},"context":[{"change":0,"pos":71}],"contents":[]}},{"FileAdd":{"meta":{"basename":"GraphBuilder.cpp","metadata":0},"context":[{"change":0,"pos":123309}],"contents":[{"Add":"//===- llvm/unittests/llvm-cfi-verify/GraphBuilder.cpp --------------===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../tools/llvm-cfi-verify/lib/GraphBuilder.h\""},{"Add":"#include \"../tools/llvm-cfi-verify/lib/FileAnalysis.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"#include \"llvm/BinaryFormat/ELF.h\""},{"Add":"#include \"llvm/DebugInfo/Symbolize/SymbolizableModule.h\""},{"Add":"#include \"llvm/MC/MCAsmInfo.h\""},{"Add":"#include \"llvm/MC/MCContext.h\""},{"Add":"#include \"llvm/MC/MCDisassembler/MCDisassembler.h\""},{"Add":"#include \"llvm/MC/MCInst.h\""},{"Add":"#include \"llvm/MC/MCInstPrinter.h\""},{"Add":"#include \"llvm/MC/MCInstrAnalysis.h\""},{"Add":"#include \"llvm/MC/MCInstrDesc.h\""},{"Add":"#include \"llvm/MC/MCInstrInfo.h\""},{"Add":"#include \"llvm/MC/MCObjectFileInfo.h\""},{"Add":"#include \"llvm/MC/MCRegisterInfo.h\""},{"Add":"#include \"llvm/MC/MCSubtargetInfo.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Object/Binary.h\""},{"Add":"#include \"llvm/Object/COFF.h\""},{"Add":"#include \"llvm/Object/ELFObjectFile.h\""},{"Add":"#include \"llvm/Object/ObjectFile.h\""},{"Add":"#include \"llvm/Support/Casting.h\""},{"Add":"#include \"llvm/Support/CommandLine.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/MemoryBuffer.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"using Instr = ::llvm::cfi_verify::FileAnalysis::Instr;"},{"Add":"using ::testing::AllOf;"},{"Add":"using ::testing::Each;"},{"Add":"using ::testing::ElementsAre;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::Field;"},{"Add":"using ::testing::IsEmpty;"},{"Add":"using ::testing::Matches;"},{"Add":"using ::testing::Pair;"},{"Add":"using ::testing::PrintToString;"},{"Add":"using ::testing::Property;"},{"Add":"using ::testing::SizeIs;"},{"Add":"using ::testing::UnorderedElementsAre;"},{"Add":"using ::testing::Value;"},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace cfi_verify {"},{"Add":"// Printing helpers for gtest."},{"Add":"std::string HexStringifyContainer(const std::vector &C) {"},{"Add":" std::stringstream Stream;"},{"Add":" if (C.empty()) {"},{"Add":" return \"{ }\";"},{"Add":" }"},{"Add":""},{"Add":" Stream << \"{ \";"},{"Add":" const auto &LastElemIt = std::end(C) - 1;"},{"Add":""},{"Add":" for (auto It = std::begin(C); It != LastElemIt; ++It) {"},{"Add":" Stream << \"0x\" << std::hex << *It << \", \";"},{"Add":" }"},{"Add":" Stream << \"0x\" << std::hex << *LastElemIt << \" }\";"},{"Add":" return Stream.str();"},{"Add":"}"},{"Add":""},{"Add":"void PrintTo(const ConditionalBranchNode &BranchNode, ::std::ostream *os) {"},{"Add":" *os << \"ConditionalBranchNode\";"},{"Add":"}"},{"Add":""},{"Add":"void PrintTo(const GraphResult &Result, ::std::ostream *os) {"},{"Add":" *os << \"Result BaseAddress: 0x\" << std::hex << Result.BaseAddress << \"\\n\";"},{"Add":""},{"Add":" if (Result.ConditionalBranchNodes.empty())"},{"Add":" *os << \" (No conditional branch nodes)\\n\";"},{"Add":""},{"Add":" for (const auto &Node : Result.ConditionalBranchNodes) {"},{"Add":" *os << \" \";"},{"Add":" PrintTo(Node, os);"},{"Add":" *os << \"\\n Fallthrough Path: \" << std::hex"},{"Add":" << HexStringifyContainer(Result.flattenAddress(Node.Fallthrough))"},{"Add":" << \"\\n\";"},{"Add":" *os << \" Target Path: \" << std::hex"},{"Add":" << HexStringifyContainer(Result.flattenAddress(Node.Target)) << \"\\n\";"},{"Add":" }"},{"Add":""},{"Add":" if (Result.OrphanedNodes.empty())"},{"Add":" *os << \" (No orphaned nodes)\";"},{"Add":""},{"Add":" for (const auto &Orphan : Result.OrphanedNodes) {"},{"Add":" *os << \" Orphan (0x\" << std::hex << Orphan"},{"Add":" << \") Path: \" << HexStringifyContainer(Result.flattenAddress(Orphan))"},{"Add":" << \"\\n\";"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"namespace {"},{"Add":"class ELFx86TestFileAnalysis : public FileAnalysis {"},{"Add":"public:"},{"Add":" ELFx86TestFileAnalysis()"},{"Add":" : FileAnalysis(Triple(\"x86_64--\"), SubtargetFeatures()) {}"},{"Add":""},{"Add":" // Expose this method publicly for testing."},{"Add":" void parseSectionContents(ArrayRef SectionBytes,"},{"Add":" object::SectionedAddress Address) {"},{"Add":" FileAnalysis::parseSectionContents(SectionBytes, Address);"},{"Add":" }"},{"Add":""},{"Add":" Error initialiseDisassemblyMembers() {"},{"Add":" return FileAnalysis::initialiseDisassemblyMembers();"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"class BasicGraphBuilderTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" void SetUp() override {"},{"Add":" IgnoreDWARFFlag = true;"},{"Add":" SuccessfullyInitialised = true;"},{"Add":" if (auto Err = Analysis.initialiseDisassemblyMembers()) {"},{"Add":" handleAllErrors(std::move(Err), [&](const UnsupportedDisassembly &E) {"},{"Add":" SuccessfullyInitialised = false;"},{"Add":" outs()"},{"Add":" << \"Note: CFIVerifyTests are disabled due to lack of x86 support \""},{"Add":" \"on this build.\\n\";"},{"Add":" });"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" bool SuccessfullyInitialised;"},{"Add":" ELFx86TestFileAnalysis Analysis;"},{"Add":"};"},{"Add":""},{"Add":"MATCHER_P2(HasPath, Result, Matcher, \"has path \" + PrintToString(Matcher)) {"},{"Add":" const auto &Path = Result.flattenAddress(arg);"},{"Add":" *result_listener << \"the path is \" << PrintToString(Path);"},{"Add":" return Matches(Matcher)(Path);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphTestSinglePathFallthroughUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0x0f, 0x0b, // 2: ud2"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" const auto Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":""},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(1));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Each(Field(&ConditionalBranchNode::CFIProtection, Eq(true))));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf(Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 4))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphTestSinglePathJumpUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 4: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" const auto Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":""},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(1));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Each(Field(&ConditionalBranchNode::CFIProtection, Eq(true))));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf(Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 4))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphTestDualPathDualUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x03, // 0: jne 5 [+3]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0xff, 0x10, // 3: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 5: ud2"},{"Add":" 0x75, 0xf9, // 7: jne 2 [-7]"},{"Add":" 0x0f, 0x0b, // 9: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" const auto Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":""},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(2));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Each(Field(&ConditionalBranchNode::CFIProtection, Eq(true))));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 5))))))"},{"Add":" << PrintToString(Result);"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF + 7)),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 9))),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphTestDualPathSingleUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x05, // 0: jne 7 [+5]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0xff, 0x10, // 3: callq *(%rax)"},{"Add":" 0x75, 0xfb, // 5: jne 2 [-5]"},{"Add":" 0x0f, 0x0b, // 7: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":""},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(2));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Each(Field(&ConditionalBranchNode::CFIProtection, Eq(true))));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 7))))))"},{"Add":" << PrintToString(Result);"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF + 5)),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 7))),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphFailures) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0x75, 0xfe, // 1: jne 1 [-2]"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":""},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 1, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":""},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0xDEADC0DE, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphNoXrefs) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0xeb, 0xfe, // 0: jmp 0 [-2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, ElementsAre(0xDEADBEEF + 2));"},{"Add":" EXPECT_THAT(Result.IntermediateNodes, IsEmpty());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphConditionalInfiniteLoop) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0xfe, // 0: jne 0 [-2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(1));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Each(AllOf(Field(&ConditionalBranchNode::CFIProtection, Eq(false)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphUnconditionalInfiniteLoop) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0xeb, 0xfc, // 2: jmp 0 [-4]"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(1));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains("},{"Add":" AllOf(Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF))),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 4))))))"},{"Add":" << PrintToString(Result);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphNoFlowsToIndirection) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x00, // 0: jne 2 [+0]"},{"Add":" 0xeb, 0xfc, // 2: jmp 0 [-4]"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, ElementsAre(0xDEADBEEF + 4));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphLengthExceededUpwards) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x06, // 0: jne 8 [+6]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0x90, // 3: nop"},{"Add":" 0x90, // 4: nop"},{"Add":" 0x90, // 5: nop"},{"Add":" 0xff, 0x10, // 6: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 8: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" uint64_t PrevSearchLengthForConditionalBranch ="},{"Add":" SearchLengthForConditionalBranch;"},{"Add":" SearchLengthForConditionalBranch = 2;"},{"Add":""},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 6, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, SizeIs(1));"},{"Add":" EXPECT_THAT(Result.OrphanedNodes,"},{"Add":" Each(HasPath(Result, ElementsAre(0xDEADBEEF + 4, 0xDEADBEEF + 5,"},{"Add":" 0xDEADBEEF + 6))))"},{"Add":" << PrintToString(Result);"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, IsEmpty());"},{"Add":""},{"Add":" SearchLengthForConditionalBranch = PrevSearchLengthForConditionalBranch;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphLengthExceededDownwards) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" 0x90, // 4: nop"},{"Add":" 0x90, // 5: nop"},{"Add":" 0x90, // 6: nop"},{"Add":" 0x90, // 7: nop"},{"Add":" 0x0f, 0x0b, // 8: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 2;"},{"Add":""},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Each(AllOf("},{"Add":" Field(&ConditionalBranchNode::CFIProtection, Eq(false)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 4, 0xDEADBEEF + 5))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2))))))"},{"Add":" << PrintToString(Result);"},{"Add":""},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"// This test ensures when avoiding doing repeated work we still generate the"},{"Add":"// paths correctly. We don't need to recalculate the flow from 0x2 -> 0x3 as it"},{"Add":"// should only need to be generated once."},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphWithRepeatedWork) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x05, // 0: jne 7 [+5]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0xff, 0x10, // 3: callq *(%rax)"},{"Add":" 0x75, 0xfb, // 5: jne 2 [-5]"},{"Add":" 0x0f, 0x0b, // 7: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":" EXPECT_THAT(Result.OrphanedNodes, IsEmpty());"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(2));"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::CFIProtection, Eq(true)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 7))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))))))"},{"Add":" << PrintToString(Result);"},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::CFIProtection, Eq(true)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0xDEADBEEF + 5)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 2, 0xDEADBEEF + 3))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0xDEADBEEF + 7))))))"},{"Add":" << PrintToString(Result);"},{"Add":" EXPECT_THAT(Result.IntermediateNodes, SizeIs(1));"},{"Add":" EXPECT_THAT(Result.IntermediateNodes,"},{"Add":" UnorderedElementsAre(Pair(0xDEADBEEF + 2, 0xDEADBEEF + 3)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicGraphBuilderTest, BuildFlowGraphComplexExample) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" // The following code has this graph:"},{"Add":" // +----------+ +--------------+"},{"Add":" // | 20 | <--- | 0 |"},{"Add":" // +----------+ +--------------+"},{"Add":" // | |"},{"Add":" // v v"},{"Add":" // +----------+ +--------------+"},{"Add":" // | 21 | | 2 |"},{"Add":" // +----------+ +--------------+"},{"Add":" // | |"},{"Add":" // v v"},{"Add":" // +----------+ +--------------+"},{"Add":" // | 22 (ud2) | +-> | 7 |"},{"Add":" // +----------+ | +--------------+"},{"Add":" // ^ | |"},{"Add":" // | | v"},{"Add":" // +----------+ | +--------------+"},{"Add":" // | 4 | | | 8 |"},{"Add":" // +----------+ | +--------------+"},{"Add":" // | | |"},{"Add":" // v | v"},{"Add":" // +----------+ | +--------------+ +------------+"},{"Add":" // | 6 | -+ | 9 (indirect) | <- | 13 |"},{"Add":" // +----------+ +--------------+ +------------+"},{"Add":" // ^ |"},{"Add":" // | v"},{"Add":" // +--------------+ +------------+"},{"Add":" // | 11 | | 15 (error) |"},{"Add":" // +--------------+ +------------+"},{"Add":" // Or, in image format: https://i.imgur.com/aX5fCoi.png"},{"Add":""},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x12, // 0: jne 20 [+18]"},{"Add":" 0xeb, 0x03, // 2: jmp 7 [+3]"},{"Add":" 0x75, 0x10, // 4: jne 22 [+16]"},{"Add":" 0x90, // 6: nop"},{"Add":" 0x90, // 7: nop"},{"Add":" 0x90, // 8: nop"},{"Add":" 0xff, 0x10, // 9: callq *(%rax)"},{"Add":" 0xeb, 0xfc, // 11: jmp 9 [-4]"},{"Add":" 0x75, 0xfa, // 13: jne 9 [-6]"},{"Add":" 0xe8, 0x78, 0x56, 0x34, 0x12, // 15: callq OUTOFBOUNDS [+0x12345678]"},{"Add":" 0x90, // 20: nop"},{"Add":" 0x90, // 21: nop"},{"Add":" 0x0f, 0x0b, // 22: ud2"},{"Add":" },"},{"Add":" {0x1000, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 5;"},{"Add":""},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0x1000 + 9, 0x0});"},{"Add":""},{"Add":" EXPECT_THAT(Result.OrphanedNodes, SizeIs(1));"},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes, SizeIs(3));"},{"Add":""},{"Add":" EXPECT_THAT("},{"Add":" Result.OrphanedNodes,"},{"Add":" Each(AllOf(Eq(0x1000u + 11),"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 11, 0x1000 + 9)))))"},{"Add":" << PrintToString(Result);"},{"Add":""},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::CFIProtection, Eq(true)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0x1000u)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 20, 0x1000 + 21,"},{"Add":" 0x1000 + 22))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 2, 0x1000 + 7,"},{"Add":" 0x1000 + 8, 0x1000 + 9))))))"},{"Add":" << PrintToString(Result);"},{"Add":""},{"Add":" EXPECT_THAT(Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf("},{"Add":" Field(&ConditionalBranchNode::CFIProtection, Eq(true)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0x1000u + 4)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 22))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 6, 0x1000 + 7,"},{"Add":" 0x1000 + 8, 0x1000 + 9))))))"},{"Add":" << PrintToString(Result);"},{"Add":""},{"Add":" EXPECT_THAT("},{"Add":" Result.ConditionalBranchNodes,"},{"Add":" Contains(AllOf(Field(&ConditionalBranchNode::CFIProtection, Eq(false)),"},{"Add":" Field(&ConditionalBranchNode::Address, Eq(0x1000u + 13)),"},{"Add":" Field(&ConditionalBranchNode::Target,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 9))),"},{"Add":" Field(&ConditionalBranchNode::Fallthrough,"},{"Add":" HasPath(Result, ElementsAre(0x1000 + 15))))))"},{"Add":" << PrintToString(Result);"},{"Add":""},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"} // anonymous namespace"},{"Add":"} // end namespace cfi_verify"},{"Add":"} // end namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FileAnalysis.cpp","metadata":0},"context":[{"change":0,"pos":123309}],"contents":[{"Add":"//===- llvm/unittests/tools/llvm-cfi-verify/FileAnalysis.cpp --------------===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"../tools/llvm-cfi-verify/lib/FileAnalysis.h\""},{"Add":"#include \"../tools/llvm-cfi-verify/lib/GraphBuilder.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"#include \"llvm/BinaryFormat/ELF.h\""},{"Add":"#include \"llvm/DebugInfo/Symbolize/SymbolizableModule.h\""},{"Add":"#include \"llvm/MC/MCAsmInfo.h\""},{"Add":"#include \"llvm/MC/MCContext.h\""},{"Add":"#include \"llvm/MC/MCDisassembler/MCDisassembler.h\""},{"Add":"#include \"llvm/MC/MCInst.h\""},{"Add":"#include \"llvm/MC/MCInstPrinter.h\""},{"Add":"#include \"llvm/MC/MCInstrAnalysis.h\""},{"Add":"#include \"llvm/MC/MCInstrDesc.h\""},{"Add":"#include \"llvm/MC/MCInstrInfo.h\""},{"Add":"#include \"llvm/MC/MCObjectFileInfo.h\""},{"Add":"#include \"llvm/MC/MCRegisterInfo.h\""},{"Add":"#include \"llvm/MC/MCSubtargetInfo.h\""},{"Add":"#include \"llvm/MC/TargetRegistry.h\""},{"Add":"#include \"llvm/Object/Binary.h\""},{"Add":"#include \"llvm/Object/COFF.h\""},{"Add":"#include \"llvm/Object/ELFObjectFile.h\""},{"Add":"#include \"llvm/Object/ObjectFile.h\""},{"Add":"#include \"llvm/Support/Casting.h\""},{"Add":"#include \"llvm/Support/CommandLine.h\""},{"Add":"#include \"llvm/Support/Error.h\""},{"Add":"#include \"llvm/Support/MemoryBuffer.h\""},{"Add":"#include \"llvm/Support/TargetSelect.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":""},{"Add":"#include "},{"Add":""},{"Add":"using Instr = ::llvm::cfi_verify::FileAnalysis::Instr;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::Field;"},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace cfi_verify {"},{"Add":"namespace {"},{"Add":"class ELFTestFileAnalysis : public FileAnalysis {"},{"Add":"public:"},{"Add":" ELFTestFileAnalysis(StringRef Trip)"},{"Add":" : FileAnalysis(Triple(Trip), SubtargetFeatures()) {}"},{"Add":""},{"Add":" // Expose this method publicly for testing."},{"Add":" void parseSectionContents(ArrayRef SectionBytes,"},{"Add":" object::SectionedAddress Address) {"},{"Add":" FileAnalysis::parseSectionContents(SectionBytes, Address);"},{"Add":" }"},{"Add":""},{"Add":" Error initialiseDisassemblyMembers() {"},{"Add":" return FileAnalysis::initialiseDisassemblyMembers();"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"class BasicFileAnalysisTest : public ::testing::Test {"},{"Add":"public:"},{"Add":" BasicFileAnalysisTest(StringRef Trip)"},{"Add":" : SuccessfullyInitialised(false), Analysis(Trip) {}"},{"Add":"protected:"},{"Add":" void SetUp() override {"},{"Add":" IgnoreDWARFFlag = true;"},{"Add":" SuccessfullyInitialised = true;"},{"Add":" if (auto Err = Analysis.initialiseDisassemblyMembers()) {"},{"Add":" handleAllErrors(std::move(Err), [&](const UnsupportedDisassembly &E) {"},{"Add":" SuccessfullyInitialised = false;"},{"Add":" outs()"},{"Add":" << \"Note: CFIVerifyTests are disabled due to lack of support \""},{"Add":" \"on this build.\\n\";"},{"Add":" });"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" bool SuccessfullyInitialised;"},{"Add":" ELFTestFileAnalysis Analysis;"},{"Add":"};"},{"Add":""},{"Add":"class BasicX86FileAnalysisTest : public BasicFileAnalysisTest {"},{"Add":"public:"},{"Add":" BasicX86FileAnalysisTest() : BasicFileAnalysisTest(\"x86_64--\") {}"},{"Add":"};"},{"Add":""},{"Add":"class BasicAArch64FileAnalysisTest : public BasicFileAnalysisTest {"},{"Add":"public:"},{"Add":" BasicAArch64FileAnalysisTest() : BasicFileAnalysisTest(\"aarch64--\") {}"},{"Add":"};"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, BasicDisassemblyTraversalTest) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0xb0, 0x00, // 1: mov $0x0, %al"},{"Add":" 0x48, 0x89, 0xe5, // 3: mov %rsp, %rbp"},{"Add":" 0x48, 0x83, 0xec, 0x18, // 6: sub $0x18, %rsp"},{"Add":" 0x48, 0xbe, 0xc4, 0x07, 0x40,"},{"Add":" 0x00, 0x00, 0x00, 0x00, 0x00, // 10: movabs $0x4007c4, %rsi"},{"Add":" 0x2f, // 20: (bad)"},{"Add":" 0x41, 0x0e, // 21: rex.B (bad)"},{"Add":" 0x62, 0x72, 0x65, 0x61, 0x6b, // 23: (bad) {%k1}"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":""},{"Add":" EXPECT_EQ(nullptr, Analysis.getInstruction(0x0));"},{"Add":" EXPECT_EQ(nullptr, Analysis.getInstruction(0x1000));"},{"Add":""},{"Add":" // 0xDEADBEEF: nop"},{"Add":" const auto *InstrMeta = Analysis.getInstruction(0xDEADBEEF);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(1u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_TRUE(InstrMeta->Valid);"},{"Add":""},{"Add":" const auto *NextInstrMeta = Analysis.getNextInstructionSequential(*InstrMeta);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":" const auto *PrevInstrMeta = InstrMeta;"},{"Add":""},{"Add":" // 0xDEADBEEF + 1: mov $0x0, %al"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 1);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(NextInstrMeta, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 1, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(2u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_TRUE(InstrMeta->Valid);"},{"Add":""},{"Add":" NextInstrMeta = Analysis.getNextInstructionSequential(*InstrMeta);"},{"Add":" EXPECT_EQ(PrevInstrMeta, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":" PrevInstrMeta = InstrMeta;"},{"Add":""},{"Add":" // 0xDEADBEEF + 3: mov %rsp, %rbp"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 3);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(NextInstrMeta, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 3, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(3u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_TRUE(InstrMeta->Valid);"},{"Add":""},{"Add":" NextInstrMeta = Analysis.getNextInstructionSequential(*InstrMeta);"},{"Add":" EXPECT_EQ(PrevInstrMeta, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":" PrevInstrMeta = InstrMeta;"},{"Add":""},{"Add":" // 0xDEADBEEF + 6: sub $0x18, %rsp"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 6);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(NextInstrMeta, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 6, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(4u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_TRUE(InstrMeta->Valid);"},{"Add":""},{"Add":" NextInstrMeta = Analysis.getNextInstructionSequential(*InstrMeta);"},{"Add":" EXPECT_EQ(PrevInstrMeta, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":" PrevInstrMeta = InstrMeta;"},{"Add":""},{"Add":" // 0xDEADBEEF + 10: movabs $0x4007c4, %rsi"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 10);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(NextInstrMeta, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 10, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(10u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_TRUE(InstrMeta->Valid);"},{"Add":""},{"Add":" EXPECT_EQ(nullptr, Analysis.getNextInstructionSequential(*InstrMeta));"},{"Add":" EXPECT_EQ(PrevInstrMeta, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":" PrevInstrMeta = InstrMeta;"},{"Add":""},{"Add":" // 0xDEADBEEF + 20: (bad)"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 20);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 20, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(1u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_FALSE(InstrMeta->Valid);"},{"Add":""},{"Add":" EXPECT_EQ(nullptr, Analysis.getNextInstructionSequential(*InstrMeta));"},{"Add":" EXPECT_EQ(PrevInstrMeta, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":""},{"Add":" // 0xDEADBEEF + 21: rex.B (bad)"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 21);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 21, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(2u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_FALSE(InstrMeta->Valid);"},{"Add":""},{"Add":" EXPECT_EQ(nullptr, Analysis.getNextInstructionSequential(*InstrMeta));"},{"Add":" EXPECT_EQ(nullptr, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":""},{"Add":" // 0xDEADBEEF + 6: (bad) {%k1}"},{"Add":" InstrMeta = Analysis.getInstruction(0xDEADBEEF + 23);"},{"Add":" EXPECT_NE(nullptr, InstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 23, InstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(5u, InstrMeta->InstructionSize);"},{"Add":" EXPECT_FALSE(InstrMeta->Valid);"},{"Add":""},{"Add":" EXPECT_EQ(nullptr, Analysis.getNextInstructionSequential(*InstrMeta));"},{"Add":" EXPECT_EQ(nullptr, Analysis.getPrevInstructionSequential(*InstrMeta));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, PrevAndNextFromBadInst) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0x2f, // 1: (bad)"},{"Add":" 0x90 // 2: nop"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" const auto &BadInstrMeta = Analysis.getInstructionOrDie(0xDEADBEEF + 1);"},{"Add":" const auto *GoodInstrMeta ="},{"Add":" Analysis.getPrevInstructionSequential(BadInstrMeta);"},{"Add":" EXPECT_NE(nullptr, GoodInstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF, GoodInstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(1u, GoodInstrMeta->InstructionSize);"},{"Add":""},{"Add":" GoodInstrMeta = Analysis.getNextInstructionSequential(BadInstrMeta);"},{"Add":" EXPECT_NE(nullptr, GoodInstrMeta);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 2, GoodInstrMeta->VMAddress);"},{"Add":" EXPECT_EQ(1u, GoodInstrMeta->InstructionSize);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFITrapTest) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0xb0, 0x00, // 1: mov $0x0, %al"},{"Add":" 0x48, 0x89, 0xe5, // 3: mov %rsp, %rbp"},{"Add":" 0x48, 0x83, 0xec, 0x18, // 6: sub $0x18, %rsp"},{"Add":" 0x48, 0xbe, 0xc4, 0x07, 0x40,"},{"Add":" 0x00, 0x00, 0x00, 0x00, 0x00, // 10: movabs $0x4007c4, %rsi"},{"Add":" 0x2f, // 20: (bad)"},{"Add":" 0x41, 0x0e, // 21: rex.B (bad)"},{"Add":" 0x62, 0x72, 0x65, 0x61, 0x6b, // 23: (bad) {%k1}"},{"Add":" 0x0f, 0x0b // 28: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":""},{"Add":" EXPECT_FALSE(Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 3)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 6)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 10)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 20)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 21)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 23)));"},{"Add":" EXPECT_TRUE("},{"Add":" Analysis.isCFITrap(Analysis.getInstructionOrDie(0xDEADBEEF + 28)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, FallThroughTest) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0xb0, 0x00, // 1: mov $0x0, %al"},{"Add":" 0x2f, // 3: (bad)"},{"Add":" 0x0f, 0x0b, // 4: ud2"},{"Add":" 0xff, 0x20, // 6: jmpq *(%rax)"},{"Add":" 0xeb, 0x00, // 8: jmp +0"},{"Add":" 0xe8, 0x45, 0xfe, 0xff, 0xff, // 10: callq [some loc]"},{"Add":" 0xff, 0x10, // 15: callq *(rax)"},{"Add":" 0x75, 0x00, // 17: jne +0"},{"Add":" 0xc3, // 19: retq"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":""},{"Add":" EXPECT_TRUE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF)));"},{"Add":" EXPECT_TRUE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 1)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 3)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 4)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 6)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 8)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 10)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 15)));"},{"Add":" EXPECT_TRUE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 17)));"},{"Add":" EXPECT_FALSE("},{"Add":" Analysis.canFallThrough(Analysis.getInstructionOrDie(0xDEADBEEF + 19)));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, DefiniteNextInstructionTest) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0xb0, 0x00, // 1: mov $0x0, %al"},{"Add":" 0x2f, // 3: (bad)"},{"Add":" 0x0f, 0x0b, // 4: ud2"},{"Add":" 0xff, 0x20, // 6: jmpq *(%rax)"},{"Add":" 0xeb, 0x00, // 8: jmp 10 [+0]"},{"Add":" 0xeb, 0x05, // 10: jmp 17 [+5]"},{"Add":" 0xe8, 0x00, 0x00, 0x00, 0x00, // 12: callq 17 [+0]"},{"Add":" 0xe8, 0x78, 0x56, 0x34, 0x12, // 17: callq 0x1234569f [+0x12345678]"},{"Add":" 0xe8, 0x04, 0x00, 0x00, 0x00, // 22: callq 31 [+4]"},{"Add":" 0xff, 0x10, // 27: callq *(rax)"},{"Add":" 0x75, 0x00, // 29: jne 31 [+0]"},{"Add":" 0x75, 0xe0, // 31: jne 1 [-32]"},{"Add":" 0xc3, // 33: retq"},{"Add":" 0xeb, 0xdd, // 34: jmp 1 [-35]"},{"Add":" 0xeb, 0xdd, // 36: jmp 3 [-35]"},{"Add":" 0xeb, 0xdc, // 38: jmp 4 [-36]"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":""},{"Add":" const auto *Current = Analysis.getInstruction(0xDEADBEEF);"},{"Add":" const auto *Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 1, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 1);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 3);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 4);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 6);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 8);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 10, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 10);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 17, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 12);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 17, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 17);"},{"Add":" // Note, definite next instruction address is out of range and should fail."},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 22);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 31, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 27);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 29);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 31);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 33);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 34);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 1, Next->VMAddress);"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 36);"},{"Add":" EXPECT_EQ(nullptr, Analysis.getDefiniteNextInstruction(*Current));"},{"Add":""},{"Add":" Current = Analysis.getInstruction(0xDEADBEEF + 38);"},{"Add":" Next = Analysis.getDefiniteNextInstruction(*Current);"},{"Add":" EXPECT_NE(nullptr, Next);"},{"Add":" EXPECT_EQ(0xDEADBEEF + 4, Next->VMAddress);"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, ControlFlowXRefsTest) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0xb0, 0x00, // 1: mov $0x0, %al"},{"Add":" 0x2f, // 3: (bad)"},{"Add":" 0x0f, 0x0b, // 4: ud2"},{"Add":" 0xff, 0x20, // 6: jmpq *(%rax)"},{"Add":" 0xeb, 0x00, // 8: jmp 10 [+0]"},{"Add":" 0xeb, 0x05, // 10: jmp 17 [+5]"},{"Add":" 0xe8, 0x00, 0x00, 0x00, 0x00, // 12: callq 17 [+0]"},{"Add":" 0xe8, 0x78, 0x56, 0x34, 0x12, // 17: callq 0x1234569f [+0x12345678]"},{"Add":" 0xe8, 0x04, 0x00, 0x00, 0x00, // 22: callq 31 [+4]"},{"Add":" 0xff, 0x10, // 27: callq *(rax)"},{"Add":" 0x75, 0x00, // 29: jne 31 [+0]"},{"Add":" 0x75, 0xe0, // 31: jne 1 [-32]"},{"Add":" 0xc3, // 33: retq"},{"Add":" 0xeb, 0xdd, // 34: jmp 1 [-35]"},{"Add":" 0xeb, 0xdd, // 36: jmp 3 [-35]"},{"Add":" 0xeb, 0xdc, // 38: jmp 4 [-36]"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" const auto *InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF);"},{"Add":" std::set XRefs ="},{"Add":" Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(XRefs.empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 1);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF)),"},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 31)),"},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 34))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 3);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 1)),"},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 36))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 4);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 38))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 6);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 8);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 10);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 8))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 12);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 17);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 10)),"},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 12))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 22);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 27);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 29);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 31);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 22)),"},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 29))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 33);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_THAT(XRefs, UnorderedElementsAre("},{"Add":" Field(&Instr::VMAddress, Eq(0xDEADBEEF + 31))));"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 34);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 36);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":""},{"Add":" InstrMetaPtr = &Analysis.getInstructionOrDie(0xDEADBEEF + 38);"},{"Add":" XRefs = Analysis.getDirectControlFlowXRefs(*InstrMetaPtr);"},{"Add":" EXPECT_TRUE(Analysis.getDirectControlFlowXRefs(*InstrMetaPtr).empty());"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionInvalidTargets) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x90, // 0: nop"},{"Add":" 0x0f, 0x0b, // 1: ud2"},{"Add":" 0x75, 0x00, // 3: jne 5 [+0]"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_NOT_INDIRECT_CF,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 1, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_NOT_INDIRECT_CF,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_NOT_INDIRECT_CF,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0x12345678, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_INVALID_INSTRUCTION,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionBasicFallthroughToUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0x0f, 0x0b, // 2: ud2"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionBasicJumpToUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 4: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionDualPathUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x03, // 0: jne 5 [+3]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0xff, 0x10, // 3: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 5: ud2"},{"Add":" 0x75, 0xf9, // 7: jne 2 [-7]"},{"Add":" 0x0f, 0x0b, // 9: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionDualPathSingleUd2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x05, // 0: jne 7 [+5]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0xff, 0x10, // 3: callq *(%rax)"},{"Add":" 0x75, 0xfb, // 5: jne 2 [-5]"},{"Add":" 0x0f, 0x0b, // 7: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 3, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionDualFailLimitUpwards) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x06, // 0: jne 8 [+6]"},{"Add":" 0x90, // 2: nop"},{"Add":" 0x90, // 3: nop"},{"Add":" 0x90, // 4: nop"},{"Add":" 0x90, // 5: nop"},{"Add":" 0xff, 0x10, // 6: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 8: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" uint64_t PrevSearchLengthForConditionalBranch ="},{"Add":" SearchLengthForConditionalBranch;"},{"Add":" SearchLengthForConditionalBranch = 2;"},{"Add":""},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 6, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_ORPHANS,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":""},{"Add":" SearchLengthForConditionalBranch = PrevSearchLengthForConditionalBranch;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionDualFailLimitDownwards) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0xff, 0x10, // 2: callq *(%rax)"},{"Add":" 0x90, // 4: nop"},{"Add":" 0x90, // 5: nop"},{"Add":" 0x90, // 6: nop"},{"Add":" 0x90, // 7: nop"},{"Add":" 0x0f, 0x0b, // 8: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 2;"},{"Add":""},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 2, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_BAD_CONDITIONAL_BRANCH,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":""},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionGoodAndBadPaths) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0xeb, 0x02, // 0: jmp 4 [+2]"},{"Add":" 0x75, 0x02, // 2: jne 6 [+2]"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 6: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_ORPHANS,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionWithUnconditionalJumpInFallthrough) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x04, // 0: jne 6 [+4]"},{"Add":" 0xeb, 0x00, // 2: jmp 4 [+0]"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 6: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionComplexExample) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" // See unittests/GraphBuilder.cpp::BuildFlowGraphComplexExample for this"},{"Add":" // graph."},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x12, // 0: jne 20 [+18]"},{"Add":" 0xeb, 0x03, // 2: jmp 7 [+3]"},{"Add":" 0x75, 0x10, // 4: jne 22 [+16]"},{"Add":" 0x90, // 6: nop"},{"Add":" 0x90, // 7: nop"},{"Add":" 0x90, // 8: nop"},{"Add":" 0xff, 0x10, // 9: callq *(%rax)"},{"Add":" 0xeb, 0xfc, // 11: jmp 9 [-4]"},{"Add":" 0x75, 0xfa, // 13: jne 9 [-6]"},{"Add":" 0xe8, 0x78, 0x56, 0x34, 0x12, // 15: callq OUTOFBOUNDS [+0x12345678]"},{"Add":" 0x90, // 20: nop"},{"Add":" 0x90, // 21: nop"},{"Add":" 0x0f, 0x0b, // 22: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 5;"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 9, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_ORPHANS,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, UndefSearchLengthOneTest) {"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x77, 0x0d, // 0x688118: ja 0x688127 [+12]"},{"Add":" 0x48, 0x89, 0xdf, // 0x68811a: mov %rbx, %rdi"},{"Add":" 0xff, 0xd0, // 0x68811d: callq *%rax"},{"Add":" 0x48, 0x89, 0xdf, // 0x68811f: mov %rbx, %rdi"},{"Add":" 0xe8, 0x09, 0x00, 0x00, 0x00, // 0x688122: callq 0x688130"},{"Add":" 0x0f, 0x0b, // 0x688127: ud2"},{"Add":" },"},{"Add":" {0x688118, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 1;"},{"Add":" GraphResult Result = GraphBuilder::buildFlowGraph(Analysis, {0x68811d, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, UndefSearchLengthOneTestFarAway) {"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x74, 0x73, // 0x7759eb: je 0x775a60"},{"Add":" 0xe9, 0x1c, 0x04, 0x00, 0x00, 0x00, // 0x7759ed: jmpq 0x775e0e"},{"Add":" },"},{"Add":" {0x7759eb, 0x0});"},{"Add":""},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x0f, 0x85, 0xb2, 0x03, 0x00, 0x00, // 0x775a56: jne 0x775e0e"},{"Add":" 0x48, 0x83, 0xc3, 0xf4, // 0x775a5c: add $0xfffffffffffffff4,%rbx"},{"Add":" 0x48, 0x8b, 0x7c, 0x24, 0x10, // 0x775a60: mov 0x10(%rsp),%rdi"},{"Add":" 0x48, 0x89, 0xde, // 0x775a65: mov %rbx,%rsi"},{"Add":" 0xff, 0xd1, // 0x775a68: callq *%rcx"},{"Add":" },"},{"Add":" {0x775a56, 0x0});"},{"Add":""},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x0f, 0x0b, // 0x775e0e: ud2"},{"Add":" },"},{"Add":" {0x775e0e, 0x0});"},{"Add":" uint64_t PrevSearchLengthForUndef = SearchLengthForUndef;"},{"Add":" SearchLengthForUndef = 1;"},{"Add":" GraphResult Result = GraphBuilder::buildFlowGraph(Analysis, {0x775a68, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_BAD_CONDITIONAL_BRANCH,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" SearchLengthForUndef = 2;"},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0x775a68, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" SearchLengthForUndef = 3;"},{"Add":" Result = GraphBuilder::buildFlowGraph(Analysis, {0x775a68, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":" SearchLengthForUndef = PrevSearchLengthForUndef;"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionClobberSinglePathExplicit) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0x0f, 0x0b, // 2: ud2"},{"Add":" 0x48, 0x05, 0x00, 0x00, 0x00, 0x00, // 4: add $0x0, %rax"},{"Add":" 0xff, 0x10, // 10: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 10, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionClobberSinglePathExplicit2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0x0f, 0x0b, // 2: ud2"},{"Add":" 0x48, 0x83, 0xc0, 0x00, // 4: add $0x0, %rax"},{"Add":" 0xff, 0x10, // 8: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 8, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionClobberSinglePathImplicit) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x02, // 0: jne 4 [+2]"},{"Add":" 0x0f, 0x0b, // 2: ud2"},{"Add":" 0x05, 0x00, 0x00, 0x00, 0x00, // 4: add $0x0, %eax"},{"Add":" 0xff, 0x10, // 9: callq *(%rax)"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 9, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicX86FileAnalysisTest, CFIProtectionClobberDualPathImplicit) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x75, 0x04, // 0: jne 6 [+4]"},{"Add":" 0x0f, 0x31, // 2: rdtsc (note: affects eax)"},{"Add":" 0xff, 0x10, // 4: callq *(%rax)"},{"Add":" 0x0f, 0x0b, // 6: ud2"},{"Add":" 0x75, 0xf9, // 8: jne 2 [-7]"},{"Add":" 0x0f, 0x0b, // 10: ud2"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 4, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64BasicUnprotected) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x00, 0x01, 0x3f, 0xd6, // 0: blr x8"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_ORPHANS,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64BasicProtected) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x00, 0x01, 0x3f, 0xd6, // 8: blr x8"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 8, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberBasic) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x08, 0x05, 0x00, 0x91, // 8: add x8, x8, #1"},{"Add":" 0x00, 0x01, 0x3f, 0xd6, // 12: blr x8"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 12, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberOneLoad) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 8: ldr x1, [x9,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 12: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 12, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberLoadAddGood) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x21, 0x04, 0x00, 0x91, // 8: add x1, x1, #1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 12: ldr x1, [x9,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberLoadAddBad) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 8: ldr x1, [x9,#16]"},{"Add":" 0x21, 0x04, 0x00, 0x91, // 12: add x1, x1, #1"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberLoadAddBad2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x29, 0x04, 0x00, 0x91, // 16: add x9, x1, #1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 12: ldr x1, [x9,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberTwoLoads) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 8: ldr x1, [x9,#16]"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 12: ldr x1, [x1,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberUnrelatedSecondLoad) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 8: ldr x1, [x9,#16]"},{"Add":" 0x21, 0x09, 0x40, 0xf9, // 12: ldr x1, [x9,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64ClobberUnrelatedLoads) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 0: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 4: brk #0x1"},{"Add":" 0x22, 0x09, 0x40, 0xf9, // 8: ldr x2, [x9,#16]"},{"Add":" 0x22, 0x08, 0x40, 0xf9, // 12: ldr x2, [x1,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 16: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 16, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64GoodAndBadPaths) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0x03, 0x00, 0x00, 0x14, // 0: b 12"},{"Add":" 0x49, 0x00, 0x00, 0x54, // 4: b.ls 8"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 8: brk #0x1"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 12: br x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 12, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_ORPHANS,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64TwoPaths) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0xc9, 0x00, 0x00, 0x54, // 0: b.ls 24"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 4: ldr x1, [x1,#16]"},{"Add":" 0x03, 0x00, 0x00, 0x14, // 8: b 12"},{"Add":" 0x69, 0x00, 0x00, 0x54, // 12: b.ls 12"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 16: ldr x1, [x1,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 20: br x1"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 24: brk #0x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 20, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::PROTECTED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64TwoPathsBadLoad1) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0xe9, 0x00, 0x00, 0x54, // 0: b.ls 28"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 4: ldr x1, [x1,#16]"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 8: ldr x1, [x1,#16]"},{"Add":" 0x03, 0x00, 0x00, 0x14, // 12: b 12"},{"Add":" 0x69, 0x00, 0x00, 0x54, // 16: b.ls 12"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 20: ldr x1, [x1,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 24: br x1"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 28: brk #0x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 24, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"TEST_F(BasicAArch64FileAnalysisTest, AArch64TwoPathsBadLoad2) {"},{"Add":" if (!SuccessfullyInitialised)"},{"Add":" return;"},{"Add":" Analysis.parseSectionContents("},{"Add":" {"},{"Add":" 0xe9, 0x00, 0x00, 0x54, // 0: b.ls 28"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 4: ldr x1, [x1,#16]"},{"Add":" 0x03, 0x00, 0x00, 0x14, // 8: b 12"},{"Add":" 0x89, 0x00, 0x00, 0x54, // 12: b.ls 16"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 16: ldr x1, [x1,#16]"},{"Add":" 0x21, 0x08, 0x40, 0xf9, // 20: ldr x1, [x1,#16]"},{"Add":" 0x20, 0x00, 0x1f, 0xd6, // 24: br x1"},{"Add":" 0x20, 0x00, 0x20, 0xd4, // 28: brk #0x1"},{"Add":" },"},{"Add":" {0xDEADBEEF, 0x0});"},{"Add":" GraphResult Result ="},{"Add":" GraphBuilder::buildFlowGraph(Analysis, {0xDEADBEEF + 24, 0x0});"},{"Add":" EXPECT_EQ(CFIProtectionStatus::FAIL_REGISTER_CLOBBERED,"},{"Add":" Analysis.validateCFIProtection(Result));"},{"Add":"}"},{"Add":""},{"Add":"} // anonymous namespace"},{"Add":"} // end namespace cfi_verify"},{"Add":"} // end namespace llvm"},{"Add":""},{"Add":"int main(int argc, char **argv) {"},{"Add":" ::testing::InitGoogleTest(&argc, argv);"},{"Add":" llvm::cl::ParseCommandLineOptions(argc, argv);"},{"Add":""},{"Add":" llvm::InitializeAllTargetInfos();"},{"Add":" llvm::InitializeAllTargetMCs();"},{"Add":" llvm::InitializeAllAsmParsers();"},{"Add":" llvm::InitializeAllDisassemblers();"},{"Add":""},{"Add":" return RUN_ALL_TESTS();"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":123309}],"contents":[{"Add":"set(LLVM_LINK_COMPONENTS"},{"Add":" AllTargetsAsmParsers"},{"Add":" AllTargetsDescs"},{"Add":" AllTargetsDisassemblers"},{"Add":" AllTargetsInfos"},{"Add":" MC"},{"Add":" MCParser"},{"Add":" Object"},{"Add":" Support"},{"Add":" Symbolize"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_unittest(CFIVerifyTests"},{"Add":" FileAnalysis.cpp"},{"Add":" GraphBuilder.cpp"},{"Add":" )"},{"Add":"target_link_libraries(CFIVerifyTests PRIVATE LLVMCFIVerify)"},{"Add":""},{"Add":"set_property(TARGET CFIVerifyTests PROPERTY FOLDER \"Tests/UnitTests/ToolTests\")"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":71}],"contents":[{"Add":"if(LLVM_TARGETS_TO_BUILD MATCHES \"X86\")"},{"Add":" add_subdirectory("},{"Add":" llvm-cfi-verify"},{"Add":" )"},{"Add":"endif()"},{"Add":""},{"Add":"add_subdirectory("},{"Add":" llvm-exegesis"},{"Add":")"},{"Add":"add_subdirectory(llvm-profgen)"},{"Add":"add_subdirectory(llvm-mca)"}]}},{"FileAdd":{"meta":{"basename":"XRay","metadata":576},"context":[{"change":2,"pos":7008862}],"contents":[]}},{"FileAdd":{"meta":{"basename":"ProfileTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- ProfileTest.cpp - XRay Profile unit tests ----------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/XRay/Profile.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::AllOf;"},{"Add":"using ::testing::ElementsAre;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::Field;"},{"Add":"using ::testing::Not;"},{"Add":"using ::testing::Pair;"},{"Add":"using ::testing::UnorderedElementsAre;"},{"Add":""},{"Add":"TEST(ProfileTest, CreateProfile) { Profile P; }"},{"Add":""},{"Add":"TEST(ProfileTest, InternPath) {"},{"Add":" Profile P;"},{"Add":" auto Path0 = P.internPath({3, 2, 1});"},{"Add":" auto Path1 = P.internPath({3, 2, 1});"},{"Add":" auto Path2 = P.internPath({2, 1});"},{"Add":" EXPECT_THAT(Path0, Eq(Path1));"},{"Add":" EXPECT_THAT(Path0, Not(Eq(Path2)));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, ExpandPath) {"},{"Add":" Profile P;"},{"Add":" auto PathID = P.internPath({3, 2, 1});"},{"Add":" auto PathOrError = P.expandPath(PathID);"},{"Add":" if (!PathOrError)"},{"Add":" FAIL() << \"Error: \" << PathOrError.takeError();"},{"Add":" EXPECT_THAT(PathOrError.get(), ElementsAre(3, 2, 1));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, AddBlocks) {"},{"Add":" Profile P;"},{"Add":" // Expect an error on adding empty blocks."},{"Add":" EXPECT_TRUE(errorToBool(P.addBlock({})));"},{"Add":""},{"Add":" // Thread blocks may not be empty."},{"Add":" EXPECT_TRUE(errorToBool(P.addBlock({1, {}})));"},{"Add":""},{"Add":" // Thread blocks with data must succeed."},{"Add":" EXPECT_FALSE(errorToBool(P.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {"},{"Add":" {P.internPath({2, 1}), Profile::Data{1, 1000}},"},{"Add":" {P.internPath({3, 2, 1}), Profile::Data{10, 100}},"},{"Add":" }})));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, CopyProfile) {"},{"Add":" Profile P0, P1;"},{"Add":" EXPECT_FALSE(errorToBool(P0.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {"},{"Add":" {P0.internPath({2, 1}), Profile::Data{1, 1000}},"},{"Add":" {P0.internPath({3, 2, 1}), Profile::Data{10, 100}},"},{"Add":" }})));"},{"Add":" P1 = P0;"},{"Add":" EXPECT_THAT("},{"Add":" P1, UnorderedElementsAre(AllOf("},{"Add":" Field(&Profile::Block::Thread, Eq(Profile::ThreadID{1})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(P1.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u)))),"},{"Add":" Pair(P1.internPath({3, 2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(10u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(100u)))))))));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, MoveProfile) {"},{"Add":" Profile P0, P1;"},{"Add":" EXPECT_FALSE(errorToBool(P0.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {"},{"Add":" {P0.internPath({2, 1}), Profile::Data{1, 1000}},"},{"Add":" {P0.internPath({3, 2, 1}), Profile::Data{10, 100}},"},{"Add":" }})));"},{"Add":" P1 = std::move(P0);"},{"Add":" EXPECT_THAT("},{"Add":" P1, UnorderedElementsAre(AllOf("},{"Add":" Field(&Profile::Block::Thread, Eq(Profile::ThreadID{1})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(P1.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u)))),"},{"Add":" Pair(P1.internPath({3, 2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(10u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(100u)))))))));"},{"Add":" EXPECT_THAT(P0, UnorderedElementsAre());"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, MergeProfilesByThread) {"},{"Add":" Profile P0, P1;"},{"Add":""},{"Add":" // Set up the blocks for two different threads in P0."},{"Add":" EXPECT_FALSE(errorToBool(P0.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {{P0.internPath({2, 1}), Profile::Data{1, 1000}},"},{"Add":" {P0.internPath({4, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(P0.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{2},"},{"Add":" {{P0.internPath({3, 1}), Profile::Data{1, 1000}}}})));"},{"Add":""},{"Add":" // Set up the blocks for two different threads in P1."},{"Add":" EXPECT_FALSE(errorToBool(P1.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {{P1.internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(P1.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{2},"},{"Add":" {{P1.internPath({3, 1}), Profile::Data{1, 1000}},"},{"Add":" {P1.internPath({4, 1}), Profile::Data{1, 1000}}}})));"},{"Add":""},{"Add":" Profile Merged = mergeProfilesByThread(P0, P1);"},{"Add":" EXPECT_THAT("},{"Add":" Merged,"},{"Add":" UnorderedElementsAre("},{"Add":" // We want to see two threads after the merge."},{"Add":" AllOf(Field(&Profile::Block::Thread, Eq(Profile::ThreadID{1})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(Merged.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(2u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(2000u)))),"},{"Add":" Pair(Merged.internPath({4, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u))))))),"},{"Add":" AllOf(Field(&Profile::Block::Thread, Eq(Profile::ThreadID{2})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(Merged.internPath({3, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(2u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(2000u)))),"},{"Add":" Pair(Merged.internPath({4, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u)))))))));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, MergeProfilesByStack) {"},{"Add":" Profile P0, P1;"},{"Add":" EXPECT_FALSE(errorToBool(P0.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{1},"},{"Add":" {{P0.internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(P1.addBlock("},{"Add":" Profile::Block{Profile::ThreadID{2},"},{"Add":" {{P1.internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":""},{"Add":" Profile Merged = mergeProfilesByStack(P0, P1);"},{"Add":" EXPECT_THAT(Merged,"},{"Add":" ElementsAre(AllOf("},{"Add":" // We expect that we lose the ThreadID dimension in this"},{"Add":" // algorithm."},{"Add":" Field(&Profile::Block::Thread, Eq(Profile::ThreadID{0})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" ElementsAre(Pair("},{"Add":" Merged.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(2u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(2000u)))))))));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, MergeProfilesByStackAccumulate) {"},{"Add":" std::vector Profiles(3);"},{"Add":" EXPECT_FALSE(errorToBool(Profiles[0].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{1},"},{"Add":" {{Profiles[0].internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(Profiles[1].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{2},"},{"Add":" {{Profiles[1].internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(Profiles[2].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{3},"},{"Add":" {{Profiles[2].internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" Profile Merged = std::accumulate(Profiles.begin(), Profiles.end(), Profile(),"},{"Add":" mergeProfilesByStack);"},{"Add":" EXPECT_THAT(Merged,"},{"Add":" ElementsAre(AllOf("},{"Add":" // We expect that we lose the ThreadID dimension in this"},{"Add":" // algorithm."},{"Add":" Field(&Profile::Block::Thread, Eq(Profile::ThreadID{0})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" ElementsAre(Pair("},{"Add":" Merged.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(3u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(3000u)))))))));"},{"Add":"}"},{"Add":""},{"Add":"TEST(ProfileTest, MergeProfilesByThreadAccumulate) {"},{"Add":" std::vector Profiles(2);"},{"Add":""},{"Add":" // Set up the blocks for two different threads in Profiles[0]."},{"Add":" EXPECT_FALSE(errorToBool(Profiles[0].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{1},"},{"Add":" {{Profiles[0].internPath({2, 1}), Profile::Data{1, 1000}},"},{"Add":" {Profiles[0].internPath({4, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(Profiles[0].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{2},"},{"Add":" {{Profiles[0].internPath({3, 1}), Profile::Data{1, 1000}}}})));"},{"Add":""},{"Add":" // Set up the blocks for two different threads in Profiles[1]."},{"Add":" EXPECT_FALSE(errorToBool(Profiles[1].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{1},"},{"Add":" {{Profiles[1].internPath({2, 1}), Profile::Data{1, 1000}}}})));"},{"Add":" EXPECT_FALSE(errorToBool(Profiles[1].addBlock(Profile::Block{"},{"Add":" Profile::ThreadID{2},"},{"Add":" {{Profiles[1].internPath({3, 1}), Profile::Data{1, 1000}},"},{"Add":" {Profiles[1].internPath({4, 1}), Profile::Data{1, 1000}}}})));"},{"Add":""},{"Add":" Profile Merged = std::accumulate(Profiles.begin(), Profiles.end(), Profile(),"},{"Add":" mergeProfilesByThread);"},{"Add":" EXPECT_THAT("},{"Add":" Merged,"},{"Add":" UnorderedElementsAre("},{"Add":" // We want to see two threads after the merge."},{"Add":" AllOf(Field(&Profile::Block::Thread, Eq(Profile::ThreadID{1})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(Merged.internPath({2, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(2u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(2000u)))),"},{"Add":" Pair(Merged.internPath({4, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u))))))),"},{"Add":" AllOf(Field(&Profile::Block::Thread, Eq(Profile::ThreadID{2})),"},{"Add":" Field(&Profile::Block::PathData,"},{"Add":" UnorderedElementsAre("},{"Add":" Pair(Merged.internPath({3, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(2u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(2000u)))),"},{"Add":" Pair(Merged.internPath({4, 1}),"},{"Add":" AllOf(Field(&Profile::Data::CallCount, Eq(1u)),"},{"Add":" Field(&Profile::Data::CumulativeLocalTime,"},{"Add":" Eq(1000u)))))))));"},{"Add":"}"},{"Add":"// FIXME: Add a test creating a Trace and generating a Profile"},{"Add":"// FIXME: Add tests for ranking/sorting profile blocks by dimension"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"GraphTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/GraphTest.cpp - XRay Graph unit tests -*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":""},{"Add":"#include \"llvm/XRay/Graph.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":"#include "},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"using namespace llvm;"},{"Add":"using namespace xray;"},{"Add":""},{"Add":"namespace {"},{"Add":"struct VAttr {"},{"Add":" unsigned VA;"},{"Add":"};"},{"Add":"struct EAttr {"},{"Add":" unsigned EA;"},{"Add":"};"},{"Add":"typedef Graph GraphT;"},{"Add":"typedef typename GraphT::VertexIdentifier VI;"},{"Add":"typedef typename GraphT::EdgeIdentifier EI;"},{"Add":""},{"Add":"// Test Fixture"},{"Add":"template class GraphTest : public testing::Test {"},{"Add":"protected:"},{"Add":" T Graph = getTestGraph();"},{"Add":""},{"Add":"private:"},{"Add":" static T getTestGraph() {"},{"Add":" using std::make_pair;"},{"Add":" std::remove_const_t G;"},{"Add":" G.insert(make_pair(1u, VAttr({3u})));"},{"Add":" G.insert(make_pair(2u, VAttr({5u})));"},{"Add":" G.insert(make_pair(3u, VAttr({7u})));"},{"Add":" G.insert(make_pair(4u, VAttr({11u})));"},{"Add":" G.insert(make_pair(5u, VAttr({13u})));"},{"Add":" G.insert(make_pair(6u, VAttr({17u})));"},{"Add":""},{"Add":" G.insert(std::make_pair(EI(1u, 2u), EAttr({3u * 5u})));"},{"Add":" G.insert(std::make_pair(EI(2u, 3u), EAttr({5u * 7u})));"},{"Add":" G.insert(std::make_pair(EI(6u, 3u), EAttr({2u * 7u * 17u})));"},{"Add":" G.insert(std::make_pair(EI(4u, 6u), EAttr({11u * 17u})));"},{"Add":" G.insert(std::make_pair(EI(2u, 4u), EAttr({5u * 11u})));"},{"Add":" G.insert(std::make_pair(EI(2u, 5u), EAttr({5u * 13u})));"},{"Add":" G.insert(std::make_pair(EI(4u, 5u), EAttr({11u * 13u})));"},{"Add":""},{"Add":" return G;"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"typedef ::testing::Types GraphTestTypes;"},{"Add":""},{"Add":"using VVT = typename GraphT::VertexValueType;"},{"Add":"using EVT = typename GraphT::EdgeValueType;"},{"Add":""},{"Add":"TYPED_TEST_SUITE(GraphTest, GraphTestTypes, );"},{"Add":""},{"Add":"template void graphVertexTester(T &G) {"},{"Add":" std::set V({1u, 2u, 3u, 4u, 5u, 6u});"},{"Add":" std::vector VA({0u, 3u, 5u, 7u, 11u, 13u, 17u});"},{"Add":""},{"Add":" EXPECT_EQ(V.size(), G.vertices().size());"},{"Add":" EXPECT_FALSE(G.vertices().empty());"},{"Add":" for (unsigned u : V) {"},{"Add":" auto EVV = G.at(u);"},{"Add":" ASSERT_TRUE(!!EVV);"},{"Add":" EXPECT_EQ(1u, G.count(u));"},{"Add":" EXPECT_EQ(VA[u], EVV->VA);"},{"Add":" EXPECT_NE(G.vertices().end(),"},{"Add":" std::find_if(G.vertices().begin(), G.vertices().end(),"},{"Add":" [&](const VVT &VV) { return VV.first == u; }));"},{"Add":" consumeError(EVV.takeError());"},{"Add":" }"},{"Add":""},{"Add":" for (auto &VVT : G.vertices()) {"},{"Add":" EXPECT_EQ(1u, V.count(VVT.first));"},{"Add":" EXPECT_EQ(VA[VVT.first], VVT.second.VA);"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"template void graphEdgeTester(T &G) {"},{"Add":" std::set V({1u, 2u, 3u, 4u, 5u, 6u});"},{"Add":""},{"Add":" std::set> E("},{"Add":" {{1u, 2u}, {2u, 3u}, {6u, 3u}, {4u, 6u}, {2u, 4u}, {2u, 5u}, {4u, 5u}});"},{"Add":" std::vector VA({0u, 3u, 5u, 7u, 11u, 13u, 17u});"},{"Add":""},{"Add":" EXPECT_EQ(E.size(), G.edges().size());"},{"Add":" EXPECT_FALSE(G.edges().empty());"},{"Add":" for (std::pair u : E) {"},{"Add":" auto EEV = G.at(u);"},{"Add":" ASSERT_TRUE(!!EEV);"},{"Add":" EXPECT_EQ(1u, G.count(u));"},{"Add":" EXPECT_EQ(VA[u.first] * VA[u.second] * ((u.first > u.second) ? 2 : 1),"},{"Add":" EEV->EA);"},{"Add":" auto Pred = [&](const EVT &EV) { return EV.first == u; };"},{"Add":" EXPECT_NE(G.edges().end(),"},{"Add":" std::find_if(G.edges().begin(), G.edges().end(), Pred));"},{"Add":" consumeError(EEV.takeError());"},{"Add":" }"},{"Add":""},{"Add":" for (auto &EV : G.edges()) {"},{"Add":" EXPECT_EQ(1u, E.count(EV.first));"},{"Add":" EXPECT_EQ(VA[EV.first.first] * VA[EV.first.second] *"},{"Add":" ((EV.first.first > EV.first.second) ? 2 : 1),"},{"Add":" EV.second.EA);"},{"Add":" const auto &IE = G.inEdges(EV.first.second);"},{"Add":" const auto &OE = G.outEdges(EV.first.first);"},{"Add":" EXPECT_NE(IE.size(), 0u);"},{"Add":" EXPECT_NE(OE.size(), 0u);"},{"Add":" EXPECT_NE(IE.begin(), IE.end());"},{"Add":" EXPECT_NE(OE.begin(), OE.end());"},{"Add":" {"},{"Add":" auto It = std::find_if("},{"Add":" G.inEdges(EV.first.second).begin(), G.inEdges(EV.first.second).end(),"},{"Add":" [&](const EVT &EVI) { return EVI.first == EV.first; });"},{"Add":" EXPECT_NE(G.inEdges(EV.first.second).end(), It);"},{"Add":" }"},{"Add":" {"},{"Add":" auto It = std::find_if("},{"Add":" G.inEdges(EV.first.first).begin(), G.inEdges(EV.first.first).end(),"},{"Add":" [&](const EVT &EVI) { return EVI.first == EV.first; });"},{"Add":" EXPECT_EQ(G.inEdges(EV.first.first).end(), It);"},{"Add":" }"},{"Add":" {"},{"Add":" auto It ="},{"Add":" std::find_if(G.outEdges(EV.first.second).begin(),"},{"Add":" G.outEdges(EV.first.second).end(),"},{"Add":" [&](const EVT &EVI) { return EVI.first == EV.first; });"},{"Add":" EXPECT_EQ(G.outEdges(EV.first.second).end(), It);"},{"Add":" }"},{"Add":" {"},{"Add":" auto It = std::find_if("},{"Add":" G.outEdges(EV.first.first).begin(), G.outEdges(EV.first.first).end(),"},{"Add":" [&](const EVT &EVI) { return EVI.first == EV.first; });"},{"Add":" EXPECT_NE(G.outEdges(EV.first.first).end(), It);"},{"Add":" }"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TYPED_TEST(GraphTest, TestGraphEdge) {"},{"Add":" auto &G = this->Graph;"},{"Add":""},{"Add":" graphEdgeTester(G);"},{"Add":"}"},{"Add":""},{"Add":"TYPED_TEST(GraphTest, TestGraphVertex) {"},{"Add":" auto &G = this->Graph;"},{"Add":""},{"Add":" graphVertexTester(G);"},{"Add":"}"},{"Add":""},{"Add":"TYPED_TEST(GraphTest, TestCopyConstructor) {"},{"Add":" TypeParam G(this->Graph);"},{"Add":""},{"Add":" graphEdgeTester(G);"},{"Add":" graphVertexTester(G);"},{"Add":"}"},{"Add":""},{"Add":"TYPED_TEST(GraphTest, TestCopyAssign) {"},{"Add":" TypeParam G = this->Graph;"},{"Add":""},{"Add":" graphEdgeTester(G);"},{"Add":" graphVertexTester(G);"},{"Add":"}"},{"Add":""},{"Add":"TYPED_TEST(GraphTest, TestMoveConstructor) {"},{"Add":" TypeParam G(std::move(this->Graph));"},{"Add":""},{"Add":" graphEdgeTester(G);"},{"Add":" graphVertexTester(G);"},{"Add":"}"},{"Add":""},{"Add":"// Tests the incremental Construction of a graph"},{"Add":"TEST(GraphTest, TestConstruction) {"},{"Add":" GraphT MG;"},{"Add":" const GraphT &G = MG;"},{"Add":" EXPECT_EQ(0u, G.count(0u));"},{"Add":" EXPECT_EQ(0u, G.count({0u, 1u}));"},{"Add":" auto VE = G.at(0);"},{"Add":" auto EE = G.at({0, 0});"},{"Add":" EXPECT_FALSE(VE); // G.at[0] returns an error"},{"Add":" EXPECT_FALSE(EE); // G.at[{0,0}] returns an error"},{"Add":" consumeError(VE.takeError());"},{"Add":" consumeError(EE.takeError());"},{"Add":" EXPECT_TRUE(G.vertices().empty());"},{"Add":" EXPECT_TRUE(G.edges().empty());"},{"Add":" EXPECT_EQ(G.vertices().begin(), G.vertices().end());"},{"Add":" EXPECT_EQ(G.edges().begin(), G.edges().end());"},{"Add":"}"},{"Add":""},{"Add":"TEST(GraphTest, TestiVertexAccessOperator) {"},{"Add":" GraphT MG;"},{"Add":" const GraphT &G = MG;"},{"Add":""},{"Add":" MG[0u] = {1u};"},{"Add":" EXPECT_EQ(1u, MG[0u].VA);"},{"Add":" EXPECT_EQ(1u, G.count(0u));"},{"Add":" EXPECT_EQ(0u, G.count(1u));"},{"Add":" EXPECT_EQ(1u, MG[0u].VA);"},{"Add":" auto T = G.at(0u);"},{"Add":" EXPECT_TRUE(!!T);"},{"Add":" EXPECT_EQ(1u, T->VA);"},{"Add":""},{"Add":" EXPECT_EQ(1u, G.vertices().size());"},{"Add":" EXPECT_EQ(0u, G.edges().size());"},{"Add":" EXPECT_FALSE(G.vertices().empty());"},{"Add":" EXPECT_TRUE(G.edges().empty());"},{"Add":" EXPECT_NE(G.vertices().begin(), G.vertices().end());"},{"Add":" EXPECT_EQ(G.edges().begin(), G.edges().end());"},{"Add":" EXPECT_EQ(1u, G.vertices().begin()->second.VA);"},{"Add":" EXPECT_EQ(0u, G.vertices().begin()->first);"},{"Add":" EXPECT_EQ(0u, G.outEdges(0u).size());"},{"Add":" EXPECT_TRUE(G.outEdges(0u).empty());"},{"Add":" EXPECT_EQ(G.outEdges(0u).begin(), G.outEdges(0u).end());"},{"Add":" EXPECT_EQ(0u, G.inEdges(0u).size());"},{"Add":" EXPECT_TRUE(G.inEdges(0u).empty());"},{"Add":" EXPECT_EQ(G.inEdges(0u).begin(), G.inEdges(0u).end());"},{"Add":"}"},{"Add":""},{"Add":"TEST(GraphTest, TestEdgeAccessOperator) {"},{"Add":" GraphT MG;"},{"Add":" const GraphT &G = MG;"},{"Add":""},{"Add":" MG[{0u, 0u}] = {2u};"},{"Add":" EI EdgeIdent({0u, 0u});"},{"Add":" EXPECT_EQ(2u, MG[EdgeIdent].EA);"},{"Add":" EXPECT_EQ(1u, G.count({0u, 0u}));"},{"Add":" EXPECT_EQ(0u, G.count({0u, 1u}));"},{"Add":" EXPECT_EQ(1u, G.count(0u));"},{"Add":" EXPECT_NE(1u, G.count(1u));"},{"Add":" auto T = G.at({0u, 0u});"},{"Add":" EXPECT_TRUE(T && T->EA == 2u);"},{"Add":" EXPECT_EQ(1u, G.edges().size());"},{"Add":" EXPECT_EQ(1u, G.vertices().size());"},{"Add":" EXPECT_FALSE(G.edges().empty());"},{"Add":" EXPECT_FALSE(G.vertices().empty());"},{"Add":" EXPECT_NE(G.edges().begin(), G.edges().end());"},{"Add":" EXPECT_EQ(EI(0u, 0u), G.edges().begin()->first);"},{"Add":" EXPECT_EQ(2u, G.edges().begin()->second.EA);"},{"Add":" EXPECT_EQ(1u, G.outEdges(0u).size());"},{"Add":" EXPECT_FALSE(G.outEdges(0u).empty());"},{"Add":" EXPECT_NE(G.outEdges(0u).begin(), G.outEdges(0u).end());"},{"Add":" EXPECT_EQ(EI(0u, 0u), G.outEdges(0u).begin()->first);"},{"Add":" EXPECT_EQ(2u, G.outEdges(0u).begin()->second.EA);"},{"Add":" EXPECT_EQ(++(G.outEdges(0u).begin()), G.outEdges(0u).end());"},{"Add":" EXPECT_EQ(1u, G.inEdges(0u).size());"},{"Add":" EXPECT_FALSE(G.inEdges(0u).empty());"},{"Add":" EXPECT_NE(G.inEdges(0u).begin(), G.inEdges(0u).end());"},{"Add":" EXPECT_EQ(EI(0u, 0u), G.inEdges(0u).begin()->first);"},{"Add":" EXPECT_EQ(2u, G.inEdges(0u).begin()->second.EA);"},{"Add":" EXPECT_EQ(++(G.inEdges(0u).begin()), G.inEdges(0u).end());"},{"Add":"}"},{"Add":"}"}]}},{"FileAdd":{"meta":{"basename":"FDRTraceWriterTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/FDRTraceWriterTest.cpp ----------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"//"},{"Add":"// Test a utility that can write out XRay FDR Mode formatted trace files."},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/XRay/FDRTraceWriter.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"llvm/XRay/FDRLogBuilder.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"llvm/XRay/Trace.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using testing::ElementsAre;"},{"Add":"using testing::Eq;"},{"Add":"using testing::Field;"},{"Add":"using testing::IsEmpty;"},{"Add":"using testing::Not;"},{"Add":""},{"Add":"// We want to be able to create an instance of an FDRTraceWriter and associate"},{"Add":"// it with a stream, which could be loaded and turned into a Trace instance."},{"Add":"// This test writes out version 3 trace logs."},{"Add":"TEST(FDRTraceWriterTest, WriteToStringBufferVersion3) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" XRayFileHeader H;"},{"Add":" H.Version = 3;"},{"Add":" H.Type = 1;"},{"Add":" H.ConstantTSC = true;"},{"Add":" H.NonstopTSC = true;"},{"Add":" H.CycleFrequency = 3e9;"},{"Add":" FDRTraceWriter Writer(OS, H);"},{"Add":" auto L = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" for (auto &P : L)"},{"Add":" ASSERT_FALSE(errorToBool(P->apply(Writer)));"},{"Add":" OS.flush();"},{"Add":""},{"Add":" // Then from here we load the Trace file."},{"Add":" DataExtractor DE(Data, sys::IsLittleEndianHost, 8);"},{"Add":" auto TraceOrErr = loadTrace(DE, true);"},{"Add":" if (!TraceOrErr)"},{"Add":" FAIL() << TraceOrErr.takeError();"},{"Add":" auto &Trace = TraceOrErr.get();"},{"Add":""},{"Add":" ASSERT_THAT(Trace, Not(IsEmpty()));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::FuncId, Eq(1)),"},{"Add":" Field(&XRayRecord::FuncId, Eq(1))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::TId, Eq(1u)),"},{"Add":" Field(&XRayRecord::TId, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::PId, Eq(1u)),"},{"Add":" Field(&XRayRecord::PId, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::CPU, Eq(1u)),"},{"Add":" Field(&XRayRecord::CPU, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace,"},{"Add":" ElementsAre(Field(&XRayRecord::Type, Eq(RecordTypes::ENTER)),"},{"Add":" Field(&XRayRecord::Type, Eq(RecordTypes::EXIT))));"},{"Add":"}"},{"Add":""},{"Add":"// This version is almost exactly the same as above, except writing version 2"},{"Add":"// logs, without the PID records."},{"Add":"TEST(FDRTraceWriterTest, WriteToStringBufferVersion2) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" XRayFileHeader H;"},{"Add":" H.Version = 2;"},{"Add":" H.Type = 1;"},{"Add":" H.ConstantTSC = true;"},{"Add":" H.NonstopTSC = true;"},{"Add":" H.CycleFrequency = 3e9;"},{"Add":" FDRTraceWriter Writer(OS, H);"},{"Add":" auto L = LogBuilder()"},{"Add":" .add(64)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" for (auto &P : L)"},{"Add":" ASSERT_FALSE(errorToBool(P->apply(Writer)));"},{"Add":" OS.flush();"},{"Add":""},{"Add":" // Then from here we load the Trace file."},{"Add":" DataExtractor DE(Data, sys::IsLittleEndianHost, 8);"},{"Add":" auto TraceOrErr = loadTrace(DE, true);"},{"Add":" if (!TraceOrErr)"},{"Add":" FAIL() << TraceOrErr.takeError();"},{"Add":" auto &Trace = TraceOrErr.get();"},{"Add":""},{"Add":" ASSERT_THAT(Trace, Not(IsEmpty()));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::FuncId, Eq(1)),"},{"Add":" Field(&XRayRecord::FuncId, Eq(1))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::TId, Eq(1u)),"},{"Add":" Field(&XRayRecord::TId, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::CPU, Eq(1u)),"},{"Add":" Field(&XRayRecord::CPU, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace,"},{"Add":" ElementsAre(Field(&XRayRecord::Type, Eq(RecordTypes::ENTER)),"},{"Add":" Field(&XRayRecord::Type, Eq(RecordTypes::EXIT))));"},{"Add":"}"},{"Add":""},{"Add":"// This covers version 1 of the log, without a BufferExtents record but has an"},{"Add":"// explicit EndOfBuffer record."},{"Add":"TEST(FDRTraceWriterTest, WriteToStringBufferVersion1) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" XRayFileHeader H;"},{"Add":" H.Version = 1;"},{"Add":" H.Type = 1;"},{"Add":" H.ConstantTSC = true;"},{"Add":" H.NonstopTSC = true;"},{"Add":" H.CycleFrequency = 3e9;"},{"Add":" // Write the size of buffers out, arbitrarily it's 4k."},{"Add":" constexpr uint64_t BufferSize = 4096;"},{"Add":" std::memcpy(H.FreeFormData, reinterpret_cast(&BufferSize),"},{"Add":" sizeof(BufferSize));"},{"Add":" FDRTraceWriter Writer(OS, H);"},{"Add":" OS.flush();"},{"Add":""},{"Add":" // Ensure that at this point the Data buffer has the file header serialized"},{"Add":" // size."},{"Add":" ASSERT_THAT(Data.size(), Eq(32u));"},{"Add":" auto L = LogBuilder()"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add()"},{"Add":" .consume();"},{"Add":" for (auto &P : L)"},{"Add":" ASSERT_FALSE(errorToBool(P->apply(Writer)));"},{"Add":""},{"Add":" // We need to pad the buffer with 4016 (4096 - 80) bytes of zeros."},{"Add":" OS.write_zeros(4016);"},{"Add":" OS.flush();"},{"Add":""},{"Add":" // For version 1 of the log, we need the whole buffer to be the size of the"},{"Add":" // file header plus 32."},{"Add":" ASSERT_THAT(Data.size(), Eq(BufferSize + 32));"},{"Add":""},{"Add":" // Then from here we load the Trace file."},{"Add":" DataExtractor DE(Data, sys::IsLittleEndianHost, 8);"},{"Add":" auto TraceOrErr = loadTrace(DE, true);"},{"Add":" if (!TraceOrErr)"},{"Add":" FAIL() << TraceOrErr.takeError();"},{"Add":" auto &Trace = TraceOrErr.get();"},{"Add":""},{"Add":" ASSERT_THAT(Trace, Not(IsEmpty()));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::FuncId, Eq(1)),"},{"Add":" Field(&XRayRecord::FuncId, Eq(1))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::TId, Eq(1u)),"},{"Add":" Field(&XRayRecord::TId, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace, ElementsAre(Field(&XRayRecord::CPU, Eq(1u)),"},{"Add":" Field(&XRayRecord::CPU, Eq(1u))));"},{"Add":" EXPECT_THAT(Trace,"},{"Add":" ElementsAre(Field(&XRayRecord::Type, Eq(RecordTypes::ENTER)),"},{"Add":" Field(&XRayRecord::Type, Eq(RecordTypes::EXIT))));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FDRRecordsTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- FDRRecords.cpp - Unit Tests for XRay FDR Record Loading ------------===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"#include \"llvm/XRay/BlockIndexer.h\""},{"Add":"#include \"llvm/XRay/BlockPrinter.h\""},{"Add":"#include \"llvm/XRay/BlockVerifier.h\""},{"Add":"#include \"llvm/XRay/FDRLogBuilder.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"llvm/XRay/RecordPrinter.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::Not;"},{"Add":""},{"Add":"TEST(XRayFDRTest, BuilderAndBlockIndexer) {"},{"Add":" // We recreate a single block of valid records, then ensure that we find all"},{"Add":" // of them belonging in the same index. We do this for three blocks, and"},{"Add":" // ensure we find the same records in the blocks we deduce."},{"Add":" auto Block0 = LogBuilder()"},{"Add":" .add(100)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":" auto Block1 = LogBuilder()"},{"Add":" .add(100)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":" auto Block2 = LogBuilder()"},{"Add":" .add(100)"},{"Add":" .add(2)"},{"Add":" .add(1, 3)"},{"Add":" .add(1)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":" BlockIndexer::Index Index;"},{"Add":" BlockIndexer Indexer(Index);"},{"Add":" for (auto B : {std::ref(Block0), std::ref(Block1), std::ref(Block2)}) {"},{"Add":" for (auto &R : B.get())"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Indexer)));"},{"Add":" ASSERT_FALSE(errorToBool(Indexer.flush()));"},{"Add":" }"},{"Add":""},{"Add":" // We have two threads worth of blocks."},{"Add":" ASSERT_THAT(Index.size(), Eq(2u));"},{"Add":" auto T1Blocks = Index.find({1, 1});"},{"Add":" ASSERT_THAT(T1Blocks, Not(Eq(Index.end())));"},{"Add":" ASSERT_THAT(T1Blocks->second.size(), Eq(2u));"},{"Add":" auto T2Blocks = Index.find({1, 2});"},{"Add":" ASSERT_THAT(T2Blocks, Not(Eq(Index.end())));"},{"Add":" ASSERT_THAT(T2Blocks->second.size(), Eq(1u));"},{"Add":"}"},{"Add":""},{"Add":"TEST(XRayFDRTest, BuilderAndBlockVerifier) {"},{"Add":" auto Block = LogBuilder()"},{"Add":" .add(48)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .consume();"},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &R : Block)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(XRayFDRTest, IndexAndVerifyBlocks) {"},{"Add":" auto Block0 = LogBuilder()"},{"Add":" .add(64)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":" auto Block1 = LogBuilder()"},{"Add":" .add(64)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":" auto Block2 = LogBuilder()"},{"Add":" .add(64)"},{"Add":" .add(1)"},{"Add":" .add(1, 1)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(1, 4, \"XRAY\")"},{"Add":" .add(1, 4, 2, \"XRAY\")"},{"Add":" .consume();"},{"Add":""},{"Add":" // First, index the records in different blocks."},{"Add":" BlockIndexer::Index Index;"},{"Add":" BlockIndexer Indexer(Index);"},{"Add":" for (auto B : {std::ref(Block0), std::ref(Block1), std::ref(Block2)}) {"},{"Add":" for (auto &R : B.get())"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Indexer)));"},{"Add":" ASSERT_FALSE(errorToBool(Indexer.flush()));"},{"Add":" }"},{"Add":""},{"Add":" // Next, verify that each block is consistently defined."},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &ProcessThreadBlocks : Index) {"},{"Add":" auto &Blocks = ProcessThreadBlocks.second;"},{"Add":" for (auto &B : Blocks) {"},{"Add":" for (auto *R : B.Records)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":" Verifier.reset();"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" // Then set up the printing mechanisms."},{"Add":" std::string Output;"},{"Add":" raw_string_ostream OS(Output);"},{"Add":" RecordPrinter RP(OS);"},{"Add":" BlockPrinter BP(OS, RP);"},{"Add":" for (auto &ProcessThreadBlocks : Index) {"},{"Add":" auto &Blocks = ProcessThreadBlocks.second;"},{"Add":" for (auto &B : Blocks) {"},{"Add":" for (auto *R : B.Records)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(BP)));"},{"Add":" BP.reset();"},{"Add":" }"},{"Add":" }"},{"Add":""},{"Add":" OS.flush();"},{"Add":" EXPECT_THAT(Output, Not(Eq(\"\")));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FDRRecordPrinterTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/FDRRecordPrinterTest.cpp --------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"llvm/XRay/RecordPrinter.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::Eq;"},{"Add":""},{"Add":"template struct Helper {};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1, 2);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1, 2);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(4, 1, 2, \"data\");"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() {"},{"Add":" return \"\";"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() {"},{"Add":" return \"\";"},{"Add":" }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique(1);"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template <> struct Helper {"},{"Add":" static std::unique_ptr construct() {"},{"Add":" return std::make_unique();"},{"Add":" }"},{"Add":""},{"Add":" static const char *expected() { return \"\"; }"},{"Add":"};"},{"Add":""},{"Add":"template class PrinterTest : public ::testing::Test {"},{"Add":"protected:"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS;"},{"Add":" RecordPrinter P;"},{"Add":" std::unique_ptr R;"},{"Add":""},{"Add":"public:"},{"Add":" PrinterTest() : Data(), OS(Data), P(OS), R(Helper::construct()) {}"},{"Add":"};"},{"Add":""},{"Add":"TYPED_TEST_SUITE_P(PrinterTest);"},{"Add":""},{"Add":"TYPED_TEST_P(PrinterTest, PrintsRecord) {"},{"Add":" ASSERT_NE(nullptr, this->R);"},{"Add":" ASSERT_FALSE(errorToBool(this->R->apply(this->P)));"},{"Add":" this->OS.flush();"},{"Add":" EXPECT_THAT(this->Data, Eq(Helper::expected()));"},{"Add":"}"},{"Add":""},{"Add":"REGISTER_TYPED_TEST_SUITE_P(PrinterTest, PrintsRecord);"},{"Add":"using FDRRecordTypes ="},{"Add":" ::testing::Types;"},{"Add":"INSTANTIATE_TYPED_TEST_SUITE_P(Records, PrinterTest, FDRRecordTypes, );"},{"Add":""},{"Add":"TEST(FDRRecordPrinterTest, WriteFunctionRecordEnter) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" RecordPrinter P(OS);"},{"Add":" FunctionRecord R(RecordTypes::ENTER, 1, 2);"},{"Add":" ASSERT_FALSE(errorToBool(R.apply(P)));"},{"Add":" OS.flush();"},{"Add":" EXPECT_THAT(Data, Eq(\"\"));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRRecordPrinterTest, WriteFunctionRecordExit) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" RecordPrinter P(OS);"},{"Add":" FunctionRecord R(RecordTypes::EXIT, 1, 2);"},{"Add":" ASSERT_FALSE(errorToBool(R.apply(P)));"},{"Add":" OS.flush();"},{"Add":" EXPECT_THAT(Data, Eq(\"\"));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRRecordPrinterTest, WriteFunctionRecordTailExit) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" RecordPrinter P(OS);"},{"Add":" FunctionRecord R(RecordTypes::TAIL_EXIT, 1, 2);"},{"Add":" ASSERT_FALSE(errorToBool(R.apply(P)));"},{"Add":" OS.flush();"},{"Add":" EXPECT_THAT(Data, Eq(\"\"));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRRecordPrinterTest, WriteFunctionRecordEnterArg) {"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS(Data);"},{"Add":" RecordPrinter P(OS);"},{"Add":" FunctionRecord R(RecordTypes::ENTER_ARG, 1, 2);"},{"Add":" ASSERT_FALSE(errorToBool(R.apply(P)));"},{"Add":" OS.flush();"},{"Add":" EXPECT_THAT(Data, Eq(\"\"));"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FDRProducerConsumerTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/FDRProducerConsumerTest.cpp -----------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"//"},{"Add":"// Test for round-trip record writing and reading."},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/Support/DataExtractor.h\""},{"Add":"#include \"llvm/Support/raw_ostream.h\""},{"Add":"#include \"llvm/XRay/FDRLogBuilder.h\""},{"Add":"#include \"llvm/XRay/FDRRecordConsumer.h\""},{"Add":"#include \"llvm/XRay/FDRRecordProducer.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"llvm/XRay/FDRTraceWriter.h\""},{"Add":"#include \"llvm/XRay/FileHeaderReader.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":"#include "},{"Add":"#include "},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::IsEmpty;"},{"Add":"using ::testing::Not;"},{"Add":"using ::testing::SizeIs;"},{"Add":""},{"Add":"template std::unique_ptr MakeRecord();"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1, 2);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1, 2);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(4, 1, 2, \"data\");"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(1);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(RecordTypes::ENTER, 1, 2);"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(4, 1, \"data\");"},{"Add":"}"},{"Add":""},{"Add":"template <> std::unique_ptr MakeRecord() {"},{"Add":" return std::make_unique(4, 1, 2, \"data\");"},{"Add":"}"},{"Add":""},{"Add":"template class RoundTripTest : public ::testing::Test {"},{"Add":"public:"},{"Add":" RoundTripTest() : Data(), OS(Data) {"},{"Add":" H.Version = 4;"},{"Add":" H.Type = 1;"},{"Add":" H.ConstantTSC = true;"},{"Add":" H.NonstopTSC = true;"},{"Add":" H.CycleFrequency = 3e9;"},{"Add":""},{"Add":" Writer = std::make_unique(OS, H);"},{"Add":" Rec = MakeRecord();"},{"Add":" }"},{"Add":""},{"Add":"protected:"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS;"},{"Add":" XRayFileHeader H;"},{"Add":" std::unique_ptr Writer;"},{"Add":" std::unique_ptr Rec;"},{"Add":"};"},{"Add":""},{"Add":"TYPED_TEST_SUITE_P(RoundTripTest);"},{"Add":""},{"Add":"template class RoundTripTestV5 : public ::testing::Test {"},{"Add":"public:"},{"Add":" RoundTripTestV5() : Data(), OS(Data) {"},{"Add":" H.Version = 5;"},{"Add":" H.Type = 1;"},{"Add":" H.ConstantTSC = true;"},{"Add":" H.NonstopTSC = true;"},{"Add":" H.CycleFrequency = 3e9;"},{"Add":""},{"Add":" Writer = std::make_unique(OS, H);"},{"Add":" Rec = MakeRecord();"},{"Add":" }"},{"Add":""},{"Add":"protected:"},{"Add":" std::string Data;"},{"Add":" raw_string_ostream OS;"},{"Add":" XRayFileHeader H;"},{"Add":" std::unique_ptr Writer;"},{"Add":" std::unique_ptr Rec;"},{"Add":"};"},{"Add":""},{"Add":"TYPED_TEST_SUITE_P(RoundTripTestV5);"},{"Add":""},{"Add":"// This test ensures that the writing and reading implementations are in sync --"},{"Add":"// that given write(read(write(R))) == R."},{"Add":"TYPED_TEST_P(RoundTripTest, RoundTripsSingleValue) {"},{"Add":" // Always write a buffer extents record which will cover the correct size of"},{"Add":" // the record, for version 3 and up."},{"Add":" BufferExtents BE(200);"},{"Add":" ASSERT_FALSE(errorToBool(BE.apply(*this->Writer)));"},{"Add":" auto &R = this->Rec;"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(*this->Writer)));"},{"Add":" this->OS.flush();"},{"Add":""},{"Add":" DataExtractor DE(this->Data, sys::IsLittleEndianHost, 8);"},{"Add":" uint64_t OffsetPtr = 0;"},{"Add":" auto HeaderOrErr = readBinaryFormatHeader(DE, OffsetPtr);"},{"Add":" if (!HeaderOrErr)"},{"Add":" FAIL() << HeaderOrErr.takeError();"},{"Add":""},{"Add":" FileBasedRecordProducer P(HeaderOrErr.get(), DE, OffsetPtr);"},{"Add":" std::vector> Records;"},{"Add":" LogBuilderConsumer C(Records);"},{"Add":" while (DE.isValidOffsetForDataOfSize(OffsetPtr, 1)) {"},{"Add":" auto R = P.produce();"},{"Add":" if (!R)"},{"Add":" FAIL() << R.takeError();"},{"Add":" if (auto E = C.consume(std::move(R.get())))"},{"Add":" FAIL() << E;"},{"Add":" }"},{"Add":" ASSERT_THAT(Records, Not(IsEmpty()));"},{"Add":" std::string Data2;"},{"Add":" raw_string_ostream OS2(Data2);"},{"Add":" FDRTraceWriter Writer2(OS2, this->H);"},{"Add":" for (auto &P : Records)"},{"Add":" ASSERT_FALSE(errorToBool(P->apply(Writer2)));"},{"Add":" OS2.flush();"},{"Add":""},{"Add":" EXPECT_EQ(Data2.substr(sizeof(XRayFileHeader)),"},{"Add":" this->Data.substr(sizeof(XRayFileHeader)));"},{"Add":" ASSERT_THAT(Records, SizeIs(2));"},{"Add":" EXPECT_THAT(Records[1]->getRecordType(), Eq(R->getRecordType()));"},{"Add":"}"},{"Add":""},{"Add":"REGISTER_TYPED_TEST_SUITE_P(RoundTripTest, RoundTripsSingleValue);"},{"Add":""},{"Add":"// We duplicate the above case for the V5 version using different types and"},{"Add":"// encodings."},{"Add":"TYPED_TEST_P(RoundTripTestV5, RoundTripsSingleValue) {"},{"Add":" BufferExtents BE(200);"},{"Add":" ASSERT_FALSE(errorToBool(BE.apply(*this->Writer)));"},{"Add":" auto &R = this->Rec;"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(*this->Writer)));"},{"Add":" this->OS.flush();"},{"Add":""},{"Add":" DataExtractor DE(this->Data, sys::IsLittleEndianHost, 8);"},{"Add":" uint64_t OffsetPtr = 0;"},{"Add":" auto HeaderOrErr = readBinaryFormatHeader(DE, OffsetPtr);"},{"Add":" if (!HeaderOrErr)"},{"Add":" FAIL() << HeaderOrErr.takeError();"},{"Add":""},{"Add":" FileBasedRecordProducer P(HeaderOrErr.get(), DE, OffsetPtr);"},{"Add":" std::vector> Records;"},{"Add":" LogBuilderConsumer C(Records);"},{"Add":" while (DE.isValidOffsetForDataOfSize(OffsetPtr, 1)) {"},{"Add":" auto R = P.produce();"},{"Add":" if (!R)"},{"Add":" FAIL() << R.takeError();"},{"Add":" if (auto E = C.consume(std::move(R.get())))"},{"Add":" FAIL() << E;"},{"Add":" }"},{"Add":" ASSERT_THAT(Records, Not(IsEmpty()));"},{"Add":" std::string Data2;"},{"Add":" raw_string_ostream OS2(Data2);"},{"Add":" FDRTraceWriter Writer2(OS2, this->H);"},{"Add":" for (auto &P : Records)"},{"Add":" ASSERT_FALSE(errorToBool(P->apply(Writer2)));"},{"Add":" OS2.flush();"},{"Add":""},{"Add":" EXPECT_EQ(Data2.substr(sizeof(XRayFileHeader)),"},{"Add":" this->Data.substr(sizeof(XRayFileHeader)));"},{"Add":" ASSERT_THAT(Records, SizeIs(2));"},{"Add":" EXPECT_THAT(Records[1]->getRecordType(), Eq(R->getRecordType()));"},{"Add":"}"},{"Add":""},{"Add":"REGISTER_TYPED_TEST_SUITE_P(RoundTripTestV5, RoundTripsSingleValue);"},{"Add":""},{"Add":"// These are the record types we support for v4 and below."},{"Add":"using RecordTypes ="},{"Add":" ::testing::Types;"},{"Add":"INSTANTIATE_TYPED_TEST_SUITE_P(Records, RoundTripTest, RecordTypes, );"},{"Add":""},{"Add":"// For V5, we have two new types we're supporting."},{"Add":"using RecordTypesV5 ="},{"Add":" ::testing::Types;"},{"Add":"INSTANTIATE_TYPED_TEST_SUITE_P(Records, RoundTripTestV5, RecordTypesV5, );"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FDRBlockVerifierTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/FDRBlockVerifierTest.cpp --------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/Testing/Support/Error.h\""},{"Add":"#include \"llvm/XRay/BlockIndexer.h\""},{"Add":"#include \"llvm/XRay/BlockVerifier.h\""},{"Add":"#include \"llvm/XRay/FDRLogBuilder.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::ElementsAre;"},{"Add":"using ::testing::Not;"},{"Add":"using ::testing::SizeIs;"},{"Add":""},{"Add":"TEST(FDRBlockVerifierTest, ValidBlocksV3) {"},{"Add":" auto Block0 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" auto Block1 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" auto Block2 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(2)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(2, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" BlockIndexer::Index Index;"},{"Add":" BlockIndexer Indexer(Index);"},{"Add":" for (auto B : {std::ref(Block0), std::ref(Block1), std::ref(Block2)}) {"},{"Add":" for (auto &R : B.get())"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Indexer)));"},{"Add":" ASSERT_FALSE(errorToBool(Indexer.flush()));"},{"Add":" }"},{"Add":""},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &ProcessThreadBlocks : Index) {"},{"Add":" auto &Blocks = ProcessThreadBlocks.second;"},{"Add":" for (auto &B : Blocks) {"},{"Add":" for (auto *R : B.Records)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":" Verifier.reset();"},{"Add":" }"},{"Add":" }"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRBlockVerifierTest, MissingPIDRecord) {"},{"Add":" auto Block = LogBuilder()"},{"Add":" .add(20)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &R : Block)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRBlockVerifierTest, MissingBufferExtents) {"},{"Add":" auto Block = LogBuilder()"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &R : Block)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRBlockVerifierTest, IgnoreRecordsAfterEOB) {"},{"Add":" auto Block = LogBuilder()"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1, 2)"},{"Add":" .add()"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" BlockVerifier Verifier;"},{"Add":" for (auto &R : Block)"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Verifier)));"},{"Add":" ASSERT_FALSE(errorToBool(Verifier.verify()));"},{"Add":"}"},{"Add":""},{"Add":"TEST(FDRBlockVerifierTest, MalformedV2) {"},{"Add":" auto Block = LogBuilder()"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .add(2)"},{"Add":" .consume();"},{"Add":" BlockVerifier Verifier;"},{"Add":""},{"Add":" ASSERT_THAT(Block, SizeIs(6u));"},{"Add":" EXPECT_THAT_ERROR(Block[0]->apply(Verifier), Succeeded());"},{"Add":" EXPECT_THAT_ERROR(Block[1]->apply(Verifier), Succeeded());"},{"Add":" EXPECT_THAT_ERROR(Block[2]->apply(Verifier), Succeeded());"},{"Add":" EXPECT_THAT_ERROR(Block[3]->apply(Verifier), Succeeded());"},{"Add":" EXPECT_THAT_ERROR(Block[4]->apply(Verifier), Succeeded());"},{"Add":" EXPECT_THAT_ERROR(Block[5]->apply(Verifier), Failed());"},{"Add":"}"},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"FDRBlockIndexerTest.cpp","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"//===- llvm/unittest/XRay/FDRTraceWriterTest.cpp ----------------*- C++ -*-===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#include \"llvm/XRay/BlockIndexer.h\""},{"Add":"#include \"llvm/XRay/FDRLogBuilder.h\""},{"Add":"#include \"llvm/XRay/FDRRecords.h\""},{"Add":"#include \"gmock/gmock.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":"namespace xray {"},{"Add":"namespace {"},{"Add":""},{"Add":"using ::testing::ElementsAre;"},{"Add":"using ::testing::Eq;"},{"Add":"using ::testing::Field;"},{"Add":"using ::testing::Not;"},{"Add":"using ::testing::SizeIs;"},{"Add":""},{"Add":"// This test ensures that we can index blocks that follow version 3 of the log"},{"Add":"// format."},{"Add":"TEST(FDRBlockIndexerTest, IndexBlocksV3) {"},{"Add":" auto Block0 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" auto Block1 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(1, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" auto Block2 = LogBuilder()"},{"Add":" .add(80)"},{"Add":" .add(2)"},{"Add":" .add(1, 2)"},{"Add":" .add(1)"},{"Add":" .add(2, 2)"},{"Add":" .add(RecordTypes::ENTER, 1, 1)"},{"Add":" .add(RecordTypes::EXIT, 1, 100)"},{"Add":" .consume();"},{"Add":" BlockIndexer::Index Index;"},{"Add":" BlockIndexer Indexer(Index);"},{"Add":" // Iterate through the contrived blocks we have created above."},{"Add":" for (auto B : {std::ref(Block0), std::ref(Block1), std::ref(Block2)}) {"},{"Add":" // For each record in the block, we apply the indexer."},{"Add":" for (auto &R : B.get())"},{"Add":" ASSERT_FALSE(errorToBool(R->apply(Indexer)));"},{"Add":" ASSERT_FALSE(errorToBool(Indexer.flush()));"},{"Add":" }"},{"Add":""},{"Add":" ASSERT_THAT(Index.size(), Eq(2u));"},{"Add":" auto T1Blocks = Index.find({1, 1});"},{"Add":" ASSERT_THAT(T1Blocks, Not(Eq(Index.end())));"},{"Add":""},{"Add":" // Expect only six records, because we're ignoring the BufferExtents record."},{"Add":" EXPECT_THAT(T1Blocks->second,"},{"Add":" ElementsAre(Field(&BlockIndexer::Block::Records, SizeIs(6u)),"},{"Add":" Field(&BlockIndexer::Block::Records, SizeIs(6u))));"},{"Add":" auto T2Blocks = Index.find({1, 2});"},{"Add":" ASSERT_THAT(T2Blocks, Not(Eq(Index.end())));"},{"Add":" EXPECT_THAT(T2Blocks->second, ElementsAre(Field(&BlockIndexer::Block::Records,"},{"Add":" SizeIs(Eq(6u)))));"},{"Add":"}"},{"Add":""},{"Add":"// FIXME: Support indexing V2 and V1 blocks."},{"Add":""},{"Add":"} // namespace"},{"Add":"} // namespace xray"},{"Add":"} // namespace llvm"}]}},{"FileAdd":{"meta":{"basename":"CMakeLists.txt","metadata":0},"context":[{"change":0,"pos":188125}],"contents":[{"Add":"set(LLVM_LINK_COMPONENTS"},{"Add":" Support"},{"Add":" XRay"},{"Add":" )"},{"Add":""},{"Add":"add_llvm_unittest(XRayTests"},{"Add":" FDRBlockIndexerTest.cpp"},{"Add":" FDRBlockVerifierTest.cpp"},{"Add":" FDRProducerConsumerTest.cpp"},{"Add":" FDRRecordPrinterTest.cpp"},{"Add":" FDRRecordsTest.cpp"},{"Add":" FDRTraceWriterTest.cpp"},{"Add":" GraphTest.cpp"},{"Add":" ProfileTest.cpp"},{"Add":" )"},{"Add":""},{"Add":"add_dependencies(XRayTests intrinsics_gen)"},{"Add":"target_link_libraries(XRayTests PRIVATE LLVMTestingSupport)"}]}},{"FileAdd":{"meta":{"basename":"Transforms","metadata":576},"context":[{"change":2,"pos":7008862}],"contents":[]}},{"FileAdd":{"meta":{"basename":"Vectorize","metadata":576},"context":[{"change":0,"pos":242356}],"contents":[]}},{"FileAdd":{"meta":{"basename":"VPlanTestBase.h","metadata":0},"context":[{"change":0,"pos":242380}],"contents":[{"Add":"//===- llvm/unittest/Transforms/Vectorize/VPlanTestBase.h -----------------===//"},{"Add":"//"},{"Add":"// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions."},{"Add":"// See https://llvm.org/LICENSE.txt for license information."},{"Add":"// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception"},{"Add":"//"},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"/// \\file"},{"Add":"/// This file defines a VPlanTestBase class, which provides helpers to parse"},{"Add":"/// a LLVM IR string and create VPlans given a loop entry block."},{"Add":"//===----------------------------------------------------------------------===//"},{"Add":"#ifndef LLVM_UNITTESTS_TRANSFORMS_VECTORIZE_VPLANTESTBASE_H"},{"Add":"#define LLVM_UNITTESTS_TRANSFORMS_VECTORIZE_VPLANTESTBASE_H"},{"Add":""},{"Add":"#include \"../lib/Transforms/Vectorize/VPlan.h\""},{"Add":"#include \"../lib/Transforms/Vectorize/VPlanHCFGBuilder.h\""},{"Add":"#include \"llvm/Analysis/AssumptionCache.h\""},{"Add":"#include \"llvm/Analysis/BasicAliasAnalysis.h\""},{"Add":"#include \"llvm/Analysis/LoopInfo.h\""},{"Add":"#include \"llvm/Analysis/TargetLibraryInfo.h\""},{"Add":"#include \"llvm/AsmParser/Parser.h\""},{"Add":"#include \"llvm/IR/Dominators.h\""},{"Add":"#include \"llvm/Support/SourceMgr.h\""},{"Add":"#include \"gtest/gtest.h\""},{"Add":""},{"Add":"namespace llvm {"},{"Add":""},{"Add":"/// Helper class to create a module from an assembly string and VPlans for a"},{"Add":"/// given loop entry block."},{"Add":"class VPlanTestBase : public testing::Test {"},{"Add":"protected:"},{"Add":" TargetLibraryInfoImpl TLII;"},{"Add":" TargetLibraryInfo TLI;"},{"Add":" DataLayout DL;"},{"Add":""},{"Add":" std::unique_ptr Ctx;"},{"Add":" std::unique_ptr

…

Dependencies

Change contents