{"owner":"nuudlman","repo":"llvm","channel":"main","channels":["main"],"can_delete":true,"inode":{"File":{"path":[{"basename":"clang","pos":"7OVOGA6QKF5OI.EJBFAJQ","meta":576},{"basename":"test","pos":"7OVOGA6QKF5OI.RXSO6JQ","meta":576},{"basename":"OpenMP","pos":"7OVOGA6QKF5OI.T5I3CJY","meta":576},{"basename":"teams_distribute_parallel_for_codegen.cpp","pos":"7OVOGA6QKF5OI.RUZUWKA","meta":0}],"file":"// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex \"__omp_offloading_[0-9a-z]+_[0-9a-z]+\" \"reduction_size[.].+[.]\" \"pl_cond[.].+[.|,]\" --prefix-filecheck-ir-name _\n// expected-no-diagnostics\n#ifndef HEADER\n#define HEADER\n// Test host codegen.\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3\n\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n#ifdef CK1\n\nint a[100];\n\nint teams_argument_global(int n){\n int te = n / 128;\n int th = 128;\n // discard n_addr\n\n #pragma omp target\n #pragma omp teams distribute parallel for num_teams(te), thread_limit(th)\n for(int i = 0; i < n; i++) {\n a[i] = 0;\n #pragma omp cancel for\n }\n\n #pragma omp target\n {{{\n #pragma omp teams distribute parallel for\n for(int i = 0; i < n; i++) {\n a[i] = 0;\n }\n }}}\n\n // outlined target regions\n\n\n\n\n return a[0];\n}\n\n#endif // CK1\n\n// Test host codegen.\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11\n\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n#ifdef CK2\n\nint teams_local_arg(void) {\n int n = 100;\n int a[n];\n\n #pragma omp target\n #pragma omp teams distribute parallel for\n for(int i = 0; i < n; i++) {\n a[i] = 0;\n }\n\n // outlined target region\n\n\n return a[0];\n}\n#endif // CK2\n\n// Test host codegen.\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19\n\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n#ifdef CK3\n\n\ntemplate \nstruct SS{\n T a[X];\n float b;\n int foo(void) {\n\n #pragma omp target\n #pragma omp teams distribute parallel for\n for(int i = 0; i < X; i++) {\n a[i] = (T)0;\n }\n\n // outlined target region\n\n\n return a[0];\n }\n};\n\nint teams_template_struct(void) {\n SS V;\n return V.foo();\n\n}\n#endif // CK3\n\n// Test host codegen.\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK25\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK27\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27\n\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s\n// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not=\"{{__kmpc|__tgt}}\"\n\n#ifdef CK4\n\ntemplate \nint tmain(T argc) {\n T a[n];\n int te = n/128;\n int th = 128;\n#pragma omp target\n#pragma omp teams distribute parallel for num_teams(te) thread_limit(th)\n for(int i = 0; i < n; i++) {\n a[i] = (T)0;\n }\n return 0;\n}\n\nint main (int argc, char **argv) {\n int n = 100;\n int a[n];\n#pragma omp target\n#pragma omp teams distribute parallel for\n for(int i = 0; i < n; i++) {\n a[i] = 0;\n }\n return tmain(argc);\n}\n\n\n\n\n\n\n\n#endif // CK4\n#endif\n// CHECK1-LABEL: define {{[^@]+}}@_Z21teams_argument_globali\n// CHECK1-SAME: (i32 noundef signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TE:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TH:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8\n// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[N_CASTED6:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8\n// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8\n// CHECK1-NEXT: [[_TMP11:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128\n// CHECK1-NEXT: store i32 [[DIV]], i32* [[TE]], align 4\n// CHECK1-NEXT: store i32 128, i32* [[TH]], align 4\n// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*\n// CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4\n// CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[TE_CASTED]], align 8\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4\n// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*\n// CHECK1-NEXT: store i32 [[TMP3]], i32* [[CONV1]], align 4\n// CHECK1-NEXT: [[TMP4:%.*]] = load i64, i64* [[TH_CASTED]], align 8\n// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_CASTED]] to i32*\n// CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV2]], align 4\n// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[N_CASTED]], align 8\n// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*\n// CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP8]], align 8\n// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*\n// CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP10]], align 8\n// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0\n// CHECK1-NEXT: store i8* null, i8** [[TMP11]], align 8\n// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK1-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*\n// CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP13]], align 8\n// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*\n// CHECK1-NEXT: store i64 [[TMP4]], i64* [[TMP15]], align 8\n// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1\n// CHECK1-NEXT: store i8* null, i8** [[TMP16]], align 8\n// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i64*\n// CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP18]], align 8\n// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i64*\n// CHECK1-NEXT: store i64 [[TMP6]], i64* [[TMP20]], align 8\n// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2\n// CHECK1-NEXT: store i8* null, i8** [[TMP21]], align 8\n// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3\n// CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**\n// CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 8\n// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3\n// CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**\n// CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 8\n// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3\n// CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8\n// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0\n// CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1\n// CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_3]], align 4\n// CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4\n// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1\n// CHECK1-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64\n// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4\n// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK1-NEXT: store i32 4, i32* [[TMP35]], align 4\n// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK1-NEXT: store i8** [[TMP27]], i8*** [[TMP36]], align 8\n// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK1-NEXT: store i8** [[TMP28]], i8*** [[TMP37]], align 8\n// CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK1-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8\n// CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK1-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8\n// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8\n// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8\n// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK1-NEXT: store i64 [[TMP33]], i64* [[TMP42]], align 8\n// CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP29]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0\n// CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK1: omp_offload.failed:\n// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i64 [[TMP2]], i64 [[TMP4]], i64 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]\n// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK1: omp_offload.cont:\n// CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: [[CONV7:%.*]] = bitcast i64* [[N_CASTED6]] to i32*\n// CHECK1-NEXT: store i32 [[TMP45]], i32* [[CONV7]], align 4\n// CHECK1-NEXT: [[TMP46:%.*]] = load i64, i64* [[N_CASTED6]], align 8\n// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*\n// CHECK1-NEXT: store i64 [[TMP46]], i64* [[TMP48]], align 8\n// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64*\n// CHECK1-NEXT: store i64 [[TMP46]], i64* [[TMP50]], align 8\n// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0\n// CHECK1-NEXT: store i8* null, i8** [[TMP51]], align 8\n// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1\n// CHECK1-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**\n// CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 8\n// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1\n// CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [100 x i32]**\n// CHECK1-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP55]], align 8\n// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1\n// CHECK1-NEXT: store i8* null, i8** [[TMP56]], align 8\n// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0\n// CHECK1-NEXT: [[TMP59:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK1-NEXT: store i32 [[TMP59]], i32* [[DOTCAPTURE_EXPR_12]], align 4\n// CHECK1-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_12]], align 4\n// CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i32 [[TMP60]], 0\n// CHECK1-NEXT: [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1\n// CHECK1-NEXT: [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1\n// CHECK1-NEXT: store i32 [[SUB16]], i32* [[DOTCAPTURE_EXPR_13]], align 4\n// CHECK1-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_13]], align 4\n// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP61]], 1\n// CHECK1-NEXT: [[TMP62:%.*]] = zext i32 [[ADD17]] to i64\n// CHECK1-NEXT: [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8\n// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 0\n// CHECK1-NEXT: store i32 1, i32* [[TMP63]], align 4\n// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 1\n// CHECK1-NEXT: store i32 2, i32* [[TMP64]], align 4\n// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 2\n// CHECK1-NEXT: store i8** [[TMP57]], i8*** [[TMP65]], align 8\n// CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 3\n// CHECK1-NEXT: store i8** [[TMP58]], i8*** [[TMP66]], align 8\n// CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 4\n// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP67]], align 8\n// CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 5\n// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP68]], align 8\n// CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 6\n// CHECK1-NEXT: store i8** null, i8*** [[TMP69]], align 8\n// CHECK1-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 7\n// CHECK1-NEXT: store i8** null, i8*** [[TMP70]], align 8\n// CHECK1-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]], i32 0, i32 8\n// CHECK1-NEXT: store i64 [[TMP62]], i64* [[TMP71]], align 8\n// CHECK1-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS18]])\n// CHECK1-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0\n// CHECK1-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]\n// CHECK1: omp_offload.failed19:\n// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i64 [[TMP46]], [100 x i32]* @a) #[[ATTR2]]\n// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT20]]\n// CHECK1: omp_offload.cont20:\n// CHECK1-NEXT: [[TMP74:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i64 0, i64 0), align 4\n// CHECK1-NEXT: ret i32 [[TMP74]]\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28\n// CHECK1-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])\n// CHECK1-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8\n// CHECK1-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8\n// CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*\n// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*\n// CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[N_ADDR]] to i32*\n// CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4\n// CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])\n// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]], [100 x i32]* [[TMP1]])\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK1: omp.precond.then:\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]\n// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK1: cond.true:\n// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: br label [[COND_END:%.*]]\n// CHECK1: cond.false:\n// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: br label [[COND_END]]\n// CHECK1: cond.end:\n// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]\n// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK1: omp.inner.for.cond:\n// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]\n// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK1: omp.inner.for.body:\n// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64\n// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64\n// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]])\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK1: omp.inner.for.inc:\n// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]\n// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK1: omp.inner.for.end:\n// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK1: omp.loop.exit:\n// CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK1-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK1: omp.precond.end:\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK1: omp.precond.then:\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32\n// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32\n// CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]\n// CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK1: cond.true:\n// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: br label [[COND_END:%.*]]\n// CHECK1: cond.false:\n// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: br label [[COND_END]]\n// CHECK1: cond.end:\n// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]\n// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK1: omp.inner.for.cond:\n// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]\n// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK1: omp.inner.for.body:\n// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1\n// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4\n// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4\n// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64\n// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]\n// CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4\n// CHECK1-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2)\n// CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0\n// CHECK1-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]]\n// CHECK1: .cancel.exit:\n// CHECK1-NEXT: br label [[CANCEL_EXIT:%.*]]\n// CHECK1: .cancel.continue:\n// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK1: omp.body.continue:\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK1: omp.inner.for.inc:\n// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], 1\n// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK1: omp.inner.for.end:\n// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK1: omp.loop.exit:\n// CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])\n// CHECK1-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK1: cancel.exit:\n// CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])\n// CHECK1-NEXT: br label [[CANCEL_CONT:%.*]]\n// CHECK1: omp.precond.end:\n// CHECK1-NEXT: br label [[CANCEL_CONT]]\n// CHECK1: cancel.cont:\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35\n// CHECK1-SAME: (i64 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*\n// CHECK1-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], [100 x i32]* [[TMP0]])\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2\n// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK1: omp.precond.then:\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]\n// CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK1: cond.true:\n// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: br label [[COND_END:%.*]]\n// CHECK1: cond.false:\n// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: br label [[COND_END]]\n// CHECK1: cond.end:\n// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]\n// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK1: omp.inner.for.cond:\n// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]\n// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK1: omp.inner.for.body:\n// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK1-NEXT: [[TMP16:%.*]] = zext i32 [[TMP15]] to i64\n// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK1-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64\n// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP16]], i64 [[TMP18]], i32* [[TMP0]], [100 x i32]* [[TMP1]])\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK1: omp.inner.for.inc:\n// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]\n// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK1: omp.inner.for.end:\n// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK1: omp.loop.exit:\n// CHECK1-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK1-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK1: omp.precond.end:\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3\n// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK1-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 8\n// CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: [[I4:%.*]] = alloca i32, align 4\n// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK1-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK1-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 8\n// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK1-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK1-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK1: omp.precond.then:\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP6]] to i32\n// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32\n// CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK1-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]\n// CHECK1-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK1: cond.true:\n// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK1-NEXT: br label [[COND_END:%.*]]\n// CHECK1: cond.false:\n// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: br label [[COND_END]]\n// CHECK1: cond.end:\n// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]\n// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK1: omp.inner.for.cond:\n// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]\n// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK1: omp.inner.for.body:\n// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1\n// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK1-NEXT: store i32 [[ADD]], i32* [[I4]], align 4\n// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[I4]], align 4\n// CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64\n// CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]]\n// CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK1: omp.body.continue:\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK1: omp.inner.for.inc:\n// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1\n// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4\n// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK1: omp.inner.for.end:\n// CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK1: omp.loop.exit:\n// CHECK1-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4\n// CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])\n// CHECK1-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK1: omp.precond.end:\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK1-SAME: () #[[ATTR3:[0-9]+]] {\n// CHECK1-NEXT: entry:\n// CHECK1-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK1-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@_Z21teams_argument_globali\n// CHECK3-SAME: (i32 noundef [[N:%.*]]) #[[ATTR0:[0-9]+]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TE:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TH:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4\n// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[N_CASTED4:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 4\n// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 4\n// CHECK3-NEXT: [[_TMP8:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP0]], 128\n// CHECK3-NEXT: store i32 [[DIV]], i32* [[TE]], align 4\n// CHECK3-NEXT: store i32 128, i32* [[TH]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK3-NEXT: store i32 [[TMP1]], i32* [[TE_CASTED]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_CASTED]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH]], align 4\n// CHECK3-NEXT: store i32 [[TMP3]], i32* [[TH_CASTED]], align 4\n// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TH_CASTED]], align 4\n// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP5]], i32* [[N_CASTED]], align 4\n// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[N_CASTED]], align 4\n// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP8]], align 4\n// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP10]], align 4\n// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0\n// CHECK3-NEXT: store i8* null, i8** [[TMP11]], align 4\n// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK3-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*\n// CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP13]], align 4\n// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*\n// CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP15]], align 4\n// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1\n// CHECK3-NEXT: store i8* null, i8** [[TMP16]], align 4\n// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*\n// CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP18]], align 4\n// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*\n// CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP20]], align 4\n// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2\n// CHECK3-NEXT: store i8* null, i8** [[TMP21]], align 4\n// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3\n// CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to [100 x i32]**\n// CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP23]], align 4\n// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3\n// CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to [100 x i32]**\n// CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP25]], align 4\n// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3\n// CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4\n// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP30]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0\n// CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV2]], 1\n// CHECK3-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP32]], 1\n// CHECK3-NEXT: [[TMP33:%.*]] = zext i32 [[ADD]] to i64\n// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK3-NEXT: store i32 1, i32* [[TMP34]], align 4\n// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK3-NEXT: store i32 4, i32* [[TMP35]], align 4\n// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK3-NEXT: store i8** [[TMP27]], i8*** [[TMP36]], align 4\n// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK3-NEXT: store i8** [[TMP28]], i8*** [[TMP37]], align 4\n// CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK3-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 4\n// CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK3-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 4\n// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK3-NEXT: store i8** null, i8*** [[TMP40]], align 4\n// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK3-NEXT: store i8** null, i8*** [[TMP41]], align 4\n// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK3-NEXT: store i64 [[TMP33]], i64* [[TMP42]], align 8\n// CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 [[TMP29]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0\n// CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK3: omp_offload.failed:\n// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28(i32 [[TMP2]], i32 [[TMP4]], i32 [[TMP6]], [100 x i32]* @a) #[[ATTR2:[0-9]+]]\n// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK3: omp_offload.cont:\n// CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP45]], i32* [[N_CASTED4]], align 4\n// CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[N_CASTED4]], align 4\n// CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*\n// CHECK3-NEXT: store i32 [[TMP46]], i32* [[TMP48]], align 4\n// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32*\n// CHECK3-NEXT: store i32 [[TMP46]], i32* [[TMP50]], align 4\n// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 0\n// CHECK3-NEXT: store i8* null, i8** [[TMP51]], align 4\n// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1\n// CHECK3-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [100 x i32]**\n// CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP53]], align 4\n// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1\n// CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to [100 x i32]**\n// CHECK3-NEXT: store [100 x i32]* @a, [100 x i32]** [[TMP55]], align 4\n// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i32 0, i32 1\n// CHECK3-NEXT: store i8* null, i8** [[TMP56]], align 4\n// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0\n// CHECK3-NEXT: [[TMP59:%.*]] = load i32, i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP59]], i32* [[DOTCAPTURE_EXPR_9]], align 4\n// CHECK3-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4\n// CHECK3-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP60]], 0\n// CHECK3-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1\n// CHECK3-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1\n// CHECK3-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4\n// CHECK3-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4\n// CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP61]], 1\n// CHECK3-NEXT: [[TMP62:%.*]] = zext i32 [[ADD14]] to i64\n// CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8\n// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0\n// CHECK3-NEXT: store i32 1, i32* [[TMP63]], align 4\n// CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1\n// CHECK3-NEXT: store i32 2, i32* [[TMP64]], align 4\n// CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2\n// CHECK3-NEXT: store i8** [[TMP57]], i8*** [[TMP65]], align 4\n// CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3\n// CHECK3-NEXT: store i8** [[TMP58]], i8*** [[TMP66]], align 4\n// CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4\n// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP67]], align 4\n// CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5\n// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP68]], align 4\n// CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6\n// CHECK3-NEXT: store i8** null, i8*** [[TMP69]], align 4\n// CHECK3-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7\n// CHECK3-NEXT: store i8** null, i8*** [[TMP70]], align 4\n// CHECK3-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8\n// CHECK3-NEXT: store i64 [[TMP62]], i64* [[TMP71]], align 8\n// CHECK3-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])\n// CHECK3-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0\n// CHECK3-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]\n// CHECK3: omp_offload.failed16:\n// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35(i32 [[TMP46]], [100 x i32]* @a) #[[ATTR2]]\n// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]\n// CHECK3: omp_offload.cont17:\n// CHECK3-NEXT: [[TMP74:%.*]] = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), align 4\n// CHECK3-NEXT: ret i32 [[TMP74]]\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l28\n// CHECK3-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1:[0-9]+]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])\n// CHECK3-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4\n// CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4\n// CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])\n// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP1]])\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK3: omp.precond.then:\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]\n// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK3: cond.true:\n// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: br label [[COND_END:%.*]]\n// CHECK3: cond.false:\n// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: br label [[COND_END]]\n// CHECK3: cond.end:\n// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]\n// CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK3: omp.inner.for.cond:\n// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]\n// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK3: omp.inner.for.body:\n// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]])\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK3: omp.inner.for.inc:\n// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]\n// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK3: omp.inner.for.end:\n// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK3: omp.loop.exit:\n// CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])\n// CHECK3-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK3: omp.precond.end:\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK3: omp.precond.then:\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]\n// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK3: cond.true:\n// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: br label [[COND_END:%.*]]\n// CHECK3: cond.false:\n// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: br label [[COND_END]]\n// CHECK3: cond.end:\n// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]\n// CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK3: omp.inner.for.cond:\n// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]\n// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK3: omp.inner.for.body:\n// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1\n// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4\n// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4\n// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]]\n// CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4\n// CHECK3-NEXT: [[TMP21:%.*]] = call i32 @__kmpc_cancel(%struct.ident_t* @[[GLOB3]], i32 [[TMP20]], i32 2)\n// CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0\n// CHECK3-NEXT: br i1 [[TMP22]], label [[DOTCANCEL_EXIT:%.*]], label [[DOTCANCEL_CONTINUE:%.*]]\n// CHECK3: .cancel.exit:\n// CHECK3-NEXT: br label [[CANCEL_EXIT:%.*]]\n// CHECK3: .cancel.continue:\n// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK3: omp.body.continue:\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK3: omp.inner.for.inc:\n// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP23]], 1\n// CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK3: omp.inner.for.end:\n// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK3: omp.loop.exit:\n// CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])\n// CHECK3-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK3: cancel.exit:\n// CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP27]])\n// CHECK3-NEXT: br label [[CANCEL_CONT:%.*]]\n// CHECK3: omp.precond.end:\n// CHECK3-NEXT: br label [[CANCEL_CONT]]\n// CHECK3: cancel.cont:\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z21teams_argument_globali_l35\n// CHECK3-SAME: (i32 noundef [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [100 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], [100 x i32]* [[TMP0]])\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2\n// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK3: omp.precond.then:\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]\n// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK3: cond.true:\n// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: br label [[COND_END:%.*]]\n// CHECK3: cond.false:\n// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: br label [[COND_END]]\n// CHECK3: cond.end:\n// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]\n// CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP12]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK3: omp.inner.for.cond:\n// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]\n// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK3: omp.inner.for.body:\n// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, [100 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP15]], i32 [[TMP16]], i32* [[TMP0]], [100 x i32]* [[TMP1]])\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK3: omp.inner.for.inc:\n// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]\n// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK3: omp.inner.for.end:\n// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK3: omp.loop.exit:\n// CHECK3-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP20]])\n// CHECK3-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK3: omp.precond.end:\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3\n// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], [100 x i32]* noundef nonnull align 4 dereferenceable(400) [[A:%.*]]) #[[ATTR1]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca [100 x i32]*, align 4\n// CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK3-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: store [100 x i32]* [[A]], [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK3-NEXT: [[TMP1:%.*]] = load [100 x i32]*, [100 x i32]** [[A_ADDR]], align 4\n// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0\n// CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK3-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK3-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]\n// CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK3: omp.precond.then:\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK3-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP9]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]\n// CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK3: cond.true:\n// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK3-NEXT: br label [[COND_END:%.*]]\n// CHECK3: cond.false:\n// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: br label [[COND_END]]\n// CHECK3: cond.end:\n// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]\n// CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK3: omp.inner.for.cond:\n// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]\n// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK3: omp.inner.for.body:\n// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1\n// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4\n// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[I3]], align 4\n// CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[TMP1]], i32 0, i32 [[TMP18]]\n// CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK3: omp.body.continue:\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK3: omp.inner.for.inc:\n// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1\n// CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4\n// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK3: omp.inner.for.end:\n// CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK3: omp.loop.exit:\n// CHECK3-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4\n// CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])\n// CHECK3-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK3: omp.precond.end:\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK3-SAME: () #[[ATTR3:[0-9]+]] {\n// CHECK3-NEXT: entry:\n// CHECK3-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK3-NEXT: ret void\n//\n//\n// CHECK9-LABEL: define {{[^@]+}}@_Z15teams_local_argv\n// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {\n// CHECK9-NEXT: entry:\n// CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8\n// CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8\n// CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8\n// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: store i32 100, i32* [[N]], align 4\n// CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4\n// CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64\n// CHECK9-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()\n// CHECK9-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8\n// CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4\n// CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8\n// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4\n// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*\n// CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4\n// CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8\n// CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4\n// CHECK9-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*\n// CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)\n// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*\n// CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8\n// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*\n// CHECK9-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8\n// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0\n// CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8\n// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*\n// CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8\n// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*\n// CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8\n// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1\n// CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8\n// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**\n// CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8\n// CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**\n// CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8\n// CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2\n// CHECK9-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8\n// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2\n// CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8\n// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0\n// CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4\n// CHECK9-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0\n// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1\n// CHECK9-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64\n// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK9-NEXT: store i32 1, i32* [[TMP30]], align 4\n// CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK9-NEXT: store i32 3, i32* [[TMP31]], align 4\n// CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK9-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8\n// CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK9-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8\n// CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK9-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8\n// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8\n// CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK9-NEXT: store i8** null, i8*** [[TMP36]], align 8\n// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK9-NEXT: store i8** null, i8*** [[TMP37]], align 8\n// CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK9-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8\n// CHECK9-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK9-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0\n// CHECK9-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK9: omp_offload.failed:\n// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]\n// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK9: omp_offload.cont:\n// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 0\n// CHECK9-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4\n// CHECK9-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8\n// CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])\n// CHECK9-NEXT: ret i32 [[TMP41]]\n//\n//\n// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73\n// CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {\n// CHECK9-NEXT: entry:\n// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8\n// CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*\n// CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])\n// CHECK9-NEXT: ret void\n//\n//\n// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK9-NEXT: entry:\n// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK9: omp.precond.then:\n// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK9-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4\n// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]\n// CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK9: cond.true:\n// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: br label [[COND_END:%.*]]\n// CHECK9: cond.false:\n// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: br label [[COND_END]]\n// CHECK9: cond.end:\n// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]\n// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK9-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK9: omp.inner.for.cond:\n// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]\n// CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK9: omp.inner.for.body:\n// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK9-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64\n// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK9-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64\n// CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK9: omp.inner.for.inc:\n// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]\n// CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK9: omp.inner.for.end:\n// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK9: omp.loop.exit:\n// CHECK9-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4\n// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])\n// CHECK9-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK9: omp.precond.end:\n// CHECK9-NEXT: ret void\n//\n//\n// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK9-NEXT: entry:\n// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4\n// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK9-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK9: omp.precond.then:\n// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32\n// CHECK9-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK9-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32\n// CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK9-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK9-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4\n// CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]\n// CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK9: cond.true:\n// CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK9-NEXT: br label [[COND_END:%.*]]\n// CHECK9: cond.false:\n// CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: br label [[COND_END]]\n// CHECK9: cond.end:\n// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]\n// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK9-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK9: omp.inner.for.cond:\n// CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]\n// CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK9: omp.inner.for.body:\n// CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1\n// CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK9-NEXT: store i32 [[ADD]], i32* [[I4]], align 4\n// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4\n// CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64\n// CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]\n// CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK9: omp.body.continue:\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK9: omp.inner.for.inc:\n// CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1\n// CHECK9-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4\n// CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK9: omp.inner.for.end:\n// CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK9: omp.loop.exit:\n// CHECK9-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK9-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK9: omp.precond.end:\n// CHECK9-NEXT: ret void\n//\n//\n// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK9-SAME: () #[[ATTR5:[0-9]+]] {\n// CHECK9-NEXT: entry:\n// CHECK9-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK9-NEXT: ret void\n//\n//\n// CHECK11-LABEL: define {{[^@]+}}@_Z15teams_local_argv\n// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {\n// CHECK11-NEXT: entry:\n// CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4\n// CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4\n// CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4\n// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: store i32 100, i32* [[N]], align 4\n// CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4\n// CHECK11-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()\n// CHECK11-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4\n// CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4\n// CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4\n// CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4\n// CHECK11-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4\n// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4\n// CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4\n// CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64\n// CHECK11-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*\n// CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)\n// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*\n// CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4\n// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*\n// CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4\n// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0\n// CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4\n// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*\n// CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4\n// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*\n// CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4\n// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1\n// CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4\n// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**\n// CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4\n// CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**\n// CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4\n// CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2\n// CHECK11-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4\n// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2\n// CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4\n// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0\n// CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4\n// CHECK11-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0\n// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1\n// CHECK11-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64\n// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK11-NEXT: store i32 1, i32* [[TMP30]], align 4\n// CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK11-NEXT: store i32 3, i32* [[TMP31]], align 4\n// CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK11-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4\n// CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK11-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4\n// CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK11-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4\n// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4\n// CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK11-NEXT: store i8** null, i8*** [[TMP36]], align 4\n// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK11-NEXT: store i8** null, i8*** [[TMP37]], align 4\n// CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK11-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8\n// CHECK11-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK11-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0\n// CHECK11-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK11: omp_offload.failed:\n// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]\n// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK11: omp_offload.cont:\n// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 0\n// CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX]], align 4\n// CHECK11-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4\n// CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])\n// CHECK11-NEXT: ret i32 [[TMP41]]\n//\n//\n// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z15teams_local_argv_l73\n// CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {\n// CHECK11-NEXT: entry:\n// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])\n// CHECK11-NEXT: ret void\n//\n//\n// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK11-NEXT: entry:\n// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK11: omp.precond.then:\n// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK11-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4\n// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]\n// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK11: cond.true:\n// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: br label [[COND_END:%.*]]\n// CHECK11: cond.false:\n// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: br label [[COND_END]]\n// CHECK11: cond.end:\n// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]\n// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK11-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK11: omp.inner.for.cond:\n// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]\n// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK11: omp.inner.for.body:\n// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK11: omp.inner.for.inc:\n// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]\n// CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK11: omp.inner.for.end:\n// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK11: omp.loop.exit:\n// CHECK11-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4\n// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])\n// CHECK11-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK11: omp.precond.end:\n// CHECK11-NEXT: ret void\n//\n//\n// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK11-NEXT: entry:\n// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK11-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK11: omp.precond.then:\n// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4\n// CHECK11-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK11-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4\n// CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]\n// CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK11: cond.true:\n// CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK11-NEXT: br label [[COND_END:%.*]]\n// CHECK11: cond.false:\n// CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: br label [[COND_END]]\n// CHECK11: cond.end:\n// CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]\n// CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK11-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK11: omp.inner.for.cond:\n// CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]\n// CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK11: omp.inner.for.body:\n// CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1\n// CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK11-NEXT: store i32 [[ADD]], i32* [[I3]], align 4\n// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4\n// CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]\n// CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK11: omp.body.continue:\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK11: omp.inner.for.inc:\n// CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1\n// CHECK11-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4\n// CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK11: omp.inner.for.end:\n// CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK11: omp.loop.exit:\n// CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK11-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK11: omp.precond.end:\n// CHECK11-NEXT: ret void\n//\n//\n// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK11-SAME: () #[[ATTR5:[0-9]+]] {\n// CHECK11-NEXT: entry:\n// CHECK11-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK11-NEXT: ret void\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv\n// CHECK17-SAME: () #[[ATTR0:[0-9]+]] {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4\n// CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])\n// CHECK17-NEXT: ret i32 [[CALL]]\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv\n// CHECK17-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8\n// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8\n// CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8\n// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8\n// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0\n// CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**\n// CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8\n// CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**\n// CHECK17-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8\n// CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0\n// CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8\n// CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK17-NEXT: store i32 1, i32* [[TMP7]], align 4\n// CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK17-NEXT: store i32 1, i32* [[TMP8]], align 4\n// CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK17-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8\n// CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK17-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8\n// CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8\n// CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8\n// CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK17-NEXT: store i8** null, i8*** [[TMP13]], align 8\n// CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK17-NEXT: store i8** null, i8*** [[TMP14]], align 8\n// CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK17-NEXT: store i64 123, i64* [[TMP15]], align 8\n// CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0\n// CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK17: omp_offload.failed:\n// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]\n// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK17: omp_offload.cont:\n// CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0\n// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i64 0, i64 0\n// CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4\n// CHECK17-NEXT: ret i32 [[TMP18]]\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109\n// CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8\n// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])\n// CHECK17-NEXT: ret void\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8\n// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK17-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4\n// CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122\n// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK17: cond.true:\n// CHECK17-NEXT: br label [[COND_END:%.*]]\n// CHECK17: cond.false:\n// CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: br label [[COND_END]]\n// CHECK17: cond.end:\n// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]\n// CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK17: omp.inner.for.cond:\n// CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]\n// CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK17: omp.inner.for.body:\n// CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64\n// CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64\n// CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK17: omp.inner.for.inc:\n// CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]\n// CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK17: omp.inner.for.end:\n// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK17: omp.loop.exit:\n// CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])\n// CHECK17-NEXT: ret void\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8\n// CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8\n// CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK17-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32\n// CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32\n// CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4\n// CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122\n// CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK17: cond.true:\n// CHECK17-NEXT: br label [[COND_END:%.*]]\n// CHECK17: cond.false:\n// CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: br label [[COND_END]]\n// CHECK17: cond.end:\n// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]\n// CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK17: omp.inner.for.cond:\n// CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]\n// CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK17: omp.inner.for.body:\n// CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1\n// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4\n// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0\n// CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4\n// CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64\n// CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]\n// CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK17: omp.body.continue:\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK17: omp.inner.for.inc:\n// CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1\n// CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4\n// CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK17: omp.inner.for.end:\n// CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK17: omp.loop.exit:\n// CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])\n// CHECK17-NEXT: ret void\n//\n//\n// CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK17-SAME: () #[[ATTR3:[0-9]+]] {\n// CHECK17-NEXT: entry:\n// CHECK17-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK17-NEXT: ret void\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv\n// CHECK19-SAME: () #[[ATTR0:[0-9]+]] {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4\n// CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])\n// CHECK19-NEXT: ret i32 [[CALL]]\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv\n// CHECK19-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4\n// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4\n// CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4\n// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4\n// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**\n// CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4\n// CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**\n// CHECK19-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4\n// CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0\n// CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4\n// CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK19-NEXT: store i32 1, i32* [[TMP7]], align 4\n// CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK19-NEXT: store i32 1, i32* [[TMP8]], align 4\n// CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK19-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4\n// CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK19-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4\n// CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4\n// CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4\n// CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK19-NEXT: store i8** null, i8*** [[TMP13]], align 4\n// CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK19-NEXT: store i8** null, i8*** [[TMP14]], align 4\n// CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK19-NEXT: store i64 123, i64* [[TMP15]], align 8\n// CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0\n// CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK19: omp_offload.failed:\n// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]\n// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK19: omp_offload.cont:\n// CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0\n// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A2]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX]], align 4\n// CHECK19-NEXT: ret i32 [[TMP18]]\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l109\n// CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4\n// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])\n// CHECK19-NEXT: ret void\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4\n// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK19-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4\n// CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122\n// CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK19: cond.true:\n// CHECK19-NEXT: br label [[COND_END:%.*]]\n// CHECK19: cond.false:\n// CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: br label [[COND_END]]\n// CHECK19: cond.end:\n// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]\n// CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK19: omp.inner.for.cond:\n// CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]\n// CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK19: omp.inner.for.body:\n// CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK19: omp.inner.for.inc:\n// CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]\n// CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK19: omp.inner.for.end:\n// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK19: omp.loop.exit:\n// CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])\n// CHECK19-NEXT: ret void\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4\n// CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4\n// CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK19-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4\n// CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4\n// CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122\n// CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK19: cond.true:\n// CHECK19-NEXT: br label [[COND_END:%.*]]\n// CHECK19: cond.false:\n// CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: br label [[COND_END]]\n// CHECK19: cond.end:\n// CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]\n// CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK19: omp.inner.for.cond:\n// CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]\n// CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK19: omp.inner.for.body:\n// CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1\n// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4\n// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0\n// CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4\n// CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]\n// CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK19: omp.body.continue:\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK19: omp.inner.for.inc:\n// CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1\n// CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4\n// CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK19: omp.inner.for.end:\n// CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK19: omp.loop.exit:\n// CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])\n// CHECK19-NEXT: ret void\n//\n//\n// CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK19-SAME: () #[[ATTR3:[0-9]+]] {\n// CHECK19-NEXT: entry:\n// CHECK19-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK19-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@main\n// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[RETVAL:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8\n// CHECK25-NEXT: [[N:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8\n// CHECK25-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32 0, i32* [[RETVAL]], align 4\n// CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4\n// CHECK25-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8\n// CHECK25-NEXT: store i32 100, i32* [[N]], align 4\n// CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4\n// CHECK25-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64\n// CHECK25-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()\n// CHECK25-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8\n// CHECK25-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4\n// CHECK25-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4\n// CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*\n// CHECK25-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4\n// CHECK25-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8\n// CHECK25-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4\n// CHECK25-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*\n// CHECK25-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)\n// CHECK25-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*\n// CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8\n// CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*\n// CHECK25-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8\n// CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0\n// CHECK25-NEXT: store i8* null, i8** [[TMP11]], align 8\n// CHECK25-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK25-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*\n// CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8\n// CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*\n// CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8\n// CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1\n// CHECK25-NEXT: store i8* null, i8** [[TMP16]], align 8\n// CHECK25-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK25-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**\n// CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8\n// CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK25-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**\n// CHECK25-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8\n// CHECK25-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2\n// CHECK25-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8\n// CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2\n// CHECK25-NEXT: store i8* null, i8** [[TMP22]], align 8\n// CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4\n// CHECK25-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0\n// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1\n// CHECK25-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64\n// CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK25-NEXT: store i32 1, i32* [[TMP30]], align 4\n// CHECK25-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK25-NEXT: store i32 3, i32* [[TMP31]], align 4\n// CHECK25-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK25-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8\n// CHECK25-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK25-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8\n// CHECK25-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK25-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8\n// CHECK25-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK25-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8\n// CHECK25-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK25-NEXT: store i8** null, i8*** [[TMP36]], align 8\n// CHECK25-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK25-NEXT: store i8** null, i8*** [[TMP37]], align 8\n// CHECK25-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK25-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8\n// CHECK25-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK25-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0\n// CHECK25-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK25: omp_offload.failed:\n// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]\n// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK25: omp_offload.cont:\n// CHECK25-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4\n// CHECK25-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP41]])\n// CHECK25-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4\n// CHECK25-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8\n// CHECK25-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])\n// CHECK25-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4\n// CHECK25-NEXT: ret i32 [[TMP43]]\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162\n// CHECK25-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8\n// CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*\n// CHECK25-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK25: omp.precond.then:\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK25-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]\n// CHECK25-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK25: cond.true:\n// CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: br label [[COND_END:%.*]]\n// CHECK25: cond.false:\n// CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: br label [[COND_END]]\n// CHECK25: cond.end:\n// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]\n// CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK25: omp.inner.for.cond:\n// CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]\n// CHECK25-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK25: omp.inner.for.body:\n// CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64\n// CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64\n// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK25: omp.inner.for.inc:\n// CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]\n// CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK25: omp.inner.for.end:\n// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK25: omp.loop.exit:\n// CHECK25-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])\n// CHECK25-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK25: omp.precond.end:\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I4:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8\n// CHECK25-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8\n// CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8\n// CHECK25-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK25-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK25-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK25-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK25-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK25-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK25-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK25: omp.precond.then:\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32\n// CHECK25-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK25-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32\n// CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK25-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]\n// CHECK25-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK25: cond.true:\n// CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK25-NEXT: br label [[COND_END:%.*]]\n// CHECK25: cond.false:\n// CHECK25-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: br label [[COND_END]]\n// CHECK25: cond.end:\n// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]\n// CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK25: omp.inner.for.cond:\n// CHECK25-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]\n// CHECK25-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK25: omp.inner.for.body:\n// CHECK25-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1\n// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK25-NEXT: store i32 [[ADD]], i32* [[I4]], align 4\n// CHECK25-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4\n// CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64\n// CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]\n// CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK25: omp.body.continue:\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK25: omp.inner.for.inc:\n// CHECK25-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1\n// CHECK25-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK25: omp.inner.for.end:\n// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK25: omp.loop.exit:\n// CHECK25-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK25-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK25: omp.precond.end:\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_\n// CHECK25-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[A:%.*]] = alloca [10 x i32], align 4\n// CHECK25-NEXT: [[TE:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TH:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TE_CASTED:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[TH_CASTED:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[TE]], align 4\n// CHECK25-NEXT: store i32 128, i32* [[TH]], align 4\n// CHECK25-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_CASTED]] to i32*\n// CHECK25-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4\n// CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[TE_CASTED]], align 8\n// CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4\n// CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_CASTED]] to i32*\n// CHECK25-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4\n// CHECK25-NEXT: [[TMP3:%.*]] = load i64, i64* [[TH_CASTED]], align 8\n// CHECK25-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*\n// CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8\n// CHECK25-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*\n// CHECK25-NEXT: store i64 [[TMP1]], i64* [[TMP7]], align 8\n// CHECK25-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0\n// CHECK25-NEXT: store i8* null, i8** [[TMP8]], align 8\n// CHECK25-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK25-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*\n// CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8\n// CHECK25-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK25-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*\n// CHECK25-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8\n// CHECK25-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1\n// CHECK25-NEXT: store i8* null, i8** [[TMP13]], align 8\n// CHECK25-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK25-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**\n// CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 8\n// CHECK25-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK25-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**\n// CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 8\n// CHECK25-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2\n// CHECK25-NEXT: store i8* null, i8** [[TMP18]], align 8\n// CHECK25-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK25-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK25-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK25-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK25-NEXT: store i32 1, i32* [[TMP22]], align 4\n// CHECK25-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK25-NEXT: store i32 3, i32* [[TMP23]], align 4\n// CHECK25-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK25-NEXT: store i8** [[TMP19]], i8*** [[TMP24]], align 8\n// CHECK25-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK25-NEXT: store i8** [[TMP20]], i8*** [[TMP25]], align 8\n// CHECK25-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK25-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP26]], align 8\n// CHECK25-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK25-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP27]], align 8\n// CHECK25-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK25-NEXT: store i8** null, i8*** [[TMP28]], align 8\n// CHECK25-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK25-NEXT: store i8** null, i8*** [[TMP29]], align 8\n// CHECK25-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK25-NEXT: store i64 10, i64* [[TMP30]], align 8\n// CHECK25-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 [[TMP21]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK25-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0\n// CHECK25-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK25: omp_offload.failed:\n// CHECK25-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i64 [[TMP1]], i64 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]\n// CHECK25-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK25: omp_offload.cont:\n// CHECK25-NEXT: ret i32 0\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151\n// CHECK25-SAME: (i64 noundef [[TE:%.*]], i64 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[TE_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[TH_ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8\n// CHECK25-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])\n// CHECK25-NEXT: store i64 [[TE]], i64* [[TE_ADDR]], align 8\n// CHECK25-NEXT: store i64 [[TH]], i64* [[TH_ADDR]], align 8\n// CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[TE_ADDR]] to i32*\n// CHECK25-NEXT: [[CONV1:%.*]] = bitcast i64* [[TH_ADDR]] to i32*\n// CHECK25-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV1]], align 4\n// CHECK25-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])\n// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..2\n// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8\n// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK25-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9\n// CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK25: cond.true:\n// CHECK25-NEXT: br label [[COND_END:%.*]]\n// CHECK25: cond.false:\n// CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: br label [[COND_END]]\n// CHECK25: cond.end:\n// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]\n// CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK25: omp.inner.for.cond:\n// CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]\n// CHECK25-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK25: omp.inner.for.body:\n// CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK25-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64\n// CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK25-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64\n// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK25: omp.inner.for.inc:\n// CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]\n// CHECK25-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK25: omp.inner.for.end:\n// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK25: omp.loop.exit:\n// CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..3\n// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8\n// CHECK25-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8\n// CHECK25-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8\n// CHECK25-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8\n// CHECK25-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK25-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK25-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8\n// CHECK25-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32\n// CHECK25-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8\n// CHECK25-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32\n// CHECK25-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK25-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK25-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8\n// CHECK25-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4\n// CHECK25-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK25-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9\n// CHECK25-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK25: cond.true:\n// CHECK25-NEXT: br label [[COND_END:%.*]]\n// CHECK25: cond.false:\n// CHECK25-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: br label [[COND_END]]\n// CHECK25: cond.end:\n// CHECK25-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]\n// CHECK25-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK25-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK25: omp.inner.for.cond:\n// CHECK25-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK25-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]\n// CHECK25-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK25: omp.inner.for.body:\n// CHECK25-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1\n// CHECK25-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK25-NEXT: store i32 [[ADD]], i32* [[I]], align 4\n// CHECK25-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4\n// CHECK25-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64\n// CHECK25-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]\n// CHECK25-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK25-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK25: omp.body.continue:\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK25: omp.inner.for.inc:\n// CHECK25-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1\n// CHECK25-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4\n// CHECK25-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK25: omp.inner.for.end:\n// CHECK25-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK25: omp.loop.exit:\n// CHECK25-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK25-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK25-SAME: () #[[ATTR6:[0-9]+]] {\n// CHECK25-NEXT: entry:\n// CHECK25-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK25-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@main\n// CHECK27-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[RETVAL:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4\n// CHECK27-NEXT: [[N:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4\n// CHECK27-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32 0, i32* [[RETVAL]], align 4\n// CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4\n// CHECK27-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4\n// CHECK27-NEXT: store i32 100, i32* [[N]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()\n// CHECK27-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4\n// CHECK27-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4\n// CHECK27-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4\n// CHECK27-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4\n// CHECK27-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4\n// CHECK27-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64\n// CHECK27-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*\n// CHECK27-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)\n// CHECK27-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4\n// CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4\n// CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0\n// CHECK27-NEXT: store i8* null, i8** [[TMP11]], align 4\n// CHECK27-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK27-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*\n// CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4\n// CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*\n// CHECK27-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4\n// CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1\n// CHECK27-NEXT: store i8* null, i8** [[TMP16]], align 4\n// CHECK27-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK27-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**\n// CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4\n// CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK27-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**\n// CHECK27-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4\n// CHECK27-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2\n// CHECK27-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4\n// CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2\n// CHECK27-NEXT: store i8* null, i8** [[TMP22]], align 4\n// CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4\n// CHECK27-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0\n// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1\n// CHECK27-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64\n// CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK27-NEXT: store i32 1, i32* [[TMP30]], align 4\n// CHECK27-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK27-NEXT: store i32 3, i32* [[TMP31]], align 4\n// CHECK27-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK27-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4\n// CHECK27-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK27-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4\n// CHECK27-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK27-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4\n// CHECK27-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK27-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4\n// CHECK27-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK27-NEXT: store i8** null, i8*** [[TMP36]], align 4\n// CHECK27-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK27-NEXT: store i8** null, i8*** [[TMP37]], align 4\n// CHECK27-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK27-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8\n// CHECK27-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK27-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0\n// CHECK27-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK27: omp_offload.failed:\n// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]\n// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK27: omp_offload.cont:\n// CHECK27-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4\n// CHECK27-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP41]])\n// CHECK27-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4\n// CHECK27-NEXT: [[TMP42:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4\n// CHECK27-NEXT: call void @llvm.stackrestore(i8* [[TMP42]])\n// CHECK27-NEXT: [[TMP43:%.*]] = load i32, i32* [[RETVAL]], align 4\n// CHECK27-NEXT: ret i32 [[TMP43]]\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l162\n// CHECK27-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4\n// CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.\n// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK27: omp.precond.then:\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK27-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]\n// CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK27: cond.true:\n// CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: br label [[COND_END:%.*]]\n// CHECK27: cond.false:\n// CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: br label [[COND_END]]\n// CHECK27: cond.end:\n// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]\n// CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK27: omp.inner.for.cond:\n// CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]\n// CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK27: omp.inner.for.body:\n// CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK27: omp.inner.for.inc:\n// CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]\n// CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK27: omp.inner.for.end:\n// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK27: omp.loop.exit:\n// CHECK27-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])\n// CHECK27-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK27: omp.precond.end:\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1\n// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I3:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4\n// CHECK27-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0\n// CHECK27-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1\n// CHECK27-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1\n// CHECK27-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[I]], align 4\n// CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4\n// CHECK27-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]\n// CHECK27-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]\n// CHECK27: omp.precond.then:\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK27-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]\n// CHECK27-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK27: cond.true:\n// CHECK27-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4\n// CHECK27-NEXT: br label [[COND_END:%.*]]\n// CHECK27: cond.false:\n// CHECK27-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: br label [[COND_END]]\n// CHECK27: cond.end:\n// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]\n// CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK27: omp.inner.for.cond:\n// CHECK27-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]\n// CHECK27-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK27: omp.inner.for.body:\n// CHECK27-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1\n// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK27-NEXT: store i32 [[ADD]], i32* [[I3]], align 4\n// CHECK27-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4\n// CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]\n// CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK27: omp.body.continue:\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK27: omp.inner.for.inc:\n// CHECK27-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1\n// CHECK27-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK27: omp.inner.for.end:\n// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK27: omp.loop.exit:\n// CHECK27-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])\n// CHECK27-NEXT: br label [[OMP_PRECOND_END]]\n// CHECK27: omp.precond.end:\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_\n// CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A:%.*]] = alloca [10 x i32], align 4\n// CHECK27-NEXT: [[TE:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TH:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TE_CASTED:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TH_CASTED:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[TE]], align 4\n// CHECK27-NEXT: store i32 128, i32* [[TH]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK27-NEXT: store i32 [[TMP0]], i32* [[TE_CASTED]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[TE_CASTED]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TH]], align 4\n// CHECK27-NEXT: store i32 [[TMP2]], i32* [[TH_CASTED]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_CASTED]], align 4\n// CHECK27-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*\n// CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4\n// CHECK27-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*\n// CHECK27-NEXT: store i32 [[TMP1]], i32* [[TMP7]], align 4\n// CHECK27-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0\n// CHECK27-NEXT: store i8* null, i8** [[TMP8]], align 4\n// CHECK27-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1\n// CHECK27-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4\n// CHECK27-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1\n// CHECK27-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*\n// CHECK27-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4\n// CHECK27-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1\n// CHECK27-NEXT: store i8* null, i8** [[TMP13]], align 4\n// CHECK27-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2\n// CHECK27-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [10 x i32]**\n// CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP15]], align 4\n// CHECK27-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2\n// CHECK27-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [10 x i32]**\n// CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP17]], align 4\n// CHECK27-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2\n// CHECK27-NEXT: store i8* null, i8** [[TMP18]], align 4\n// CHECK27-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0\n// CHECK27-NEXT: [[TMP21:%.*]] = load i32, i32* [[TE]], align 4\n// CHECK27-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8\n// CHECK27-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0\n// CHECK27-NEXT: store i32 1, i32* [[TMP22]], align 4\n// CHECK27-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1\n// CHECK27-NEXT: store i32 3, i32* [[TMP23]], align 4\n// CHECK27-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2\n// CHECK27-NEXT: store i8** [[TMP19]], i8*** [[TMP24]], align 4\n// CHECK27-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3\n// CHECK27-NEXT: store i8** [[TMP20]], i8*** [[TMP25]], align 4\n// CHECK27-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4\n// CHECK27-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP26]], align 4\n// CHECK27-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5\n// CHECK27-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP27]], align 4\n// CHECK27-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6\n// CHECK27-NEXT: store i8** null, i8*** [[TMP28]], align 4\n// CHECK27-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7\n// CHECK27-NEXT: store i8** null, i8*** [[TMP29]], align 4\n// CHECK27-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8\n// CHECK27-NEXT: store i64 10, i64* [[TMP30]], align 8\n// CHECK27-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 [[TMP21]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])\n// CHECK27-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0\n// CHECK27-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]\n// CHECK27: omp_offload.failed:\n// CHECK27-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151(i32 [[TMP1]], i32 [[TMP3]], [10 x i32]* [[A]]) #[[ATTR3]]\n// CHECK27-NEXT: br label [[OMP_OFFLOAD_CONT]]\n// CHECK27: omp_offload.cont:\n// CHECK27-NEXT: ret i32 0\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l151\n// CHECK27-SAME: (i32 noundef [[TE:%.*]], i32 noundef [[TH:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[TE_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TH_ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])\n// CHECK27-NEXT: store i32 [[TE]], i32* [[TE_ADDR]], align 4\n// CHECK27-NEXT: store i32 [[TH]], i32* [[TH_ADDR]], align 4\n// CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TE_ADDR]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[TH_ADDR]], align 4\n// CHECK27-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])\n// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP1]])\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..2\n// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4\n// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9\n// CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK27: cond.true:\n// CHECK27-NEXT: br label [[COND_END:%.*]]\n// CHECK27: cond.false:\n// CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: br label [[COND_END]]\n// CHECK27: cond.end:\n// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]\n// CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK27: omp.inner.for.cond:\n// CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]\n// CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK27: omp.inner.for.body:\n// CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4\n// CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4\n// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK27: omp.inner.for.inc:\n// CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]\n// CHECK27-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK27: omp.inner.for.end:\n// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK27: omp.loop.exit:\n// CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..3\n// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4\n// CHECK27-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4\n// CHECK27-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[TMP:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: [[I:%.*]] = alloca i32, align 4\n// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK27-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4\n// CHECK27-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4\n// CHECK27-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4\n// CHECK27-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4\n// CHECK27-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4\n// CHECK27-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4\n// CHECK27-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)\n// CHECK27-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9\n// CHECK27-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]\n// CHECK27: cond.true:\n// CHECK27-NEXT: br label [[COND_END:%.*]]\n// CHECK27: cond.false:\n// CHECK27-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: br label [[COND_END]]\n// CHECK27: cond.end:\n// CHECK27-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]\n// CHECK27-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4\n// CHECK27-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]\n// CHECK27: omp.inner.for.cond:\n// CHECK27-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4\n// CHECK27-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]\n// CHECK27-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]\n// CHECK27: omp.inner.for.body:\n// CHECK27-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1\n// CHECK27-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]\n// CHECK27-NEXT: store i32 [[ADD]], i32* [[I]], align 4\n// CHECK27-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4\n// CHECK27-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]\n// CHECK27-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4\n// CHECK27-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]\n// CHECK27: omp.body.continue:\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]\n// CHECK27: omp.inner.for.inc:\n// CHECK27-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1\n// CHECK27-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4\n// CHECK27-NEXT: br label [[OMP_INNER_FOR_COND]]\n// CHECK27: omp.inner.for.end:\n// CHECK27-NEXT: br label [[OMP_LOOP_EXIT:%.*]]\n// CHECK27: omp.loop.exit:\n// CHECK27-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])\n// CHECK27-NEXT: ret void\n//\n//\n// CHECK27-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg\n// CHECK27-SAME: () #[[ATTR6:[0-9]+]] {\n// CHECK27-NEXT: entry:\n// CHECK27-NEXT: call void @__tgt_register_requires(i64 1)\n// CHECK27-NEXT: ret void\n//\n"}},"token":"VFDZcQ6zHDenv+KU+DmI2zUKL8OE4e8nrXEIUyfwzuk=","login":null}