# SPDX-License-Identifier: CERN-OHL-S-2.0

VERILATOR ?= verilator 
VERILATOR_COVERAGE ?= verilator_coverage 
YOSYS ?= yosys 
SLANG ?= slang
JOBS ?= 16
LINKER ?= mold

# Keep frame pointers for debugging
CXXFLAGS += -fno-omit-frame-pointer 
# Don't use exceptions or rtti to reduce code bloat
CXXFLAGS += -fno-exceptions -fno-rtti -fno-unwind-tables -fno-asynchronous-unwind-tables
# Tune for current CPU to improve simulation performance
CXXFLAGS += -march=native -mtune=native


LDFLAGS += -fuse-ld=$(LINKER)

# Enable multithreaded verilation
VERILATOR_COMMON_FLAGS += -j $(JOBS)
# Check assertions
VERILATOR_COMMON_FLAGS += --assert 
# Generate coverage analysis
VERILATOR_COMMON_FLAGS += --coverage 
# Look in the rtl directory
VERILATOR_COMMON_FLAGS += -Irtl/soc -Irtl/core
# Generate C++
VERILATOR_GENERATION_FLAGS += --cc
# Generate depfiles
VERILATOR_GENERATION_FLAGS += -MMD
# Split generated files into small translation units to improve iterative compile speed
VERILATOR_GENERATION_FLAGS += --output-split 500
# Split generated functions to improve compilation speed
VERILATOR_GENERATION_FLAGS += --output-split-cfuncs 50 --output-split-ctrace 50

# Generate a multithreaded simulator
# VERILATOR_GENERATION_FLAGS += --threads $(JOBS)

VERILATOR_DEPFILES = $(wildcard obj_dir/*.d)

# Pkgs must come first to prevent compile errors
SOC_RTLS = rtl/soc/soc_pkg.sv rtl/soc/soc.sv rtl/soc/mem.sv rtl/soc/uart.sv

default: soc
soc: soc-generate-cxx soc-compile-cxx
lint: soc-lint-slang soc-lint-yosys_parse soc-lint-verilator

soc-generate-cxx:
	$(VERILATOR) $(VERILATOR_COMMON_FLAGS) $(VERILATOR_GENERATION_FLAGS) $(SOC_RTLS)

soc-compile-cxx:
	$(MAKE) -j $(JOBS) -C obj_dir -f Vsoc.mk

soc-lint-verilator:
	$(VERILATOR) $(VERILATOR_COMMON_FLAGS) --lint-only -Wall -Wpedantic $(SOC_RTLS)

soc-lint-slang:
	$(SLANG) -j $(JOBS) -Irtl/soc -Irtl/core --allow-dup-initial-drivers $(SOC_RTLS)

soc-lint-yosys_parse:
	$(YOSYS) -q -p 'read_verilog -sv -Irtl/soc -Irtl/core $(SOC_RTLS)'

-include $(VERILATOR_DEPFILES)