; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s

target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"

; Make sure we don't break load/store ordering when turning an extractelement
; into loads, off the stack or a previous store.
; Be very explicit about the ordering/stack offsets.

define void @test_extractelement_legalization_storereuse(<4 x i32> %a, ptr nocapture %x, ptr nocapture readonly %y, i32 %i) #0 {
; CHECK-LABEL: test_extractelement_legalization_storereuse:
; CHECK:       ## %bb.0: ## %entry
; CHECK-NEXT:    pushl %ebx
; CHECK-NEXT:    pushl %edi
; CHECK-NEXT:    pushl %esi
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT:    paddd (%edx), %xmm0
; CHECK-NEXT:    movdqa %xmm0, (%edx)
; CHECK-NEXT:    movl (%edx), %esi
; CHECK-NEXT:    movl 4(%edx), %edi
; CHECK-NEXT:    shll $4, %ecx
; CHECK-NEXT:    movl 8(%edx), %ebx
; CHECK-NEXT:    movl 12(%edx), %edx
; CHECK-NEXT:    movl %esi, 12(%eax,%ecx)
; CHECK-NEXT:    movl %edi, (%eax,%ecx)
; CHECK-NEXT:    movl %ebx, 8(%eax,%ecx)
; CHECK-NEXT:    movl %edx, 4(%eax,%ecx)
; CHECK-NEXT:    popl %esi
; CHECK-NEXT:    popl %edi
; CHECK-NEXT:    popl %ebx
; CHECK-NEXT:    retl
entry:
  %0 = load <4 x i32>, ptr %y, align 16
  %am = add <4 x i32> %a, %0
  store <4 x i32> %am, ptr %y, align 16
  %ip0 = shl nsw i32 %i, 2
  %ip1 = or i32 %ip0, 1
  %ip2 = or i32 %ip0, 2
  %ip3 = or i32 %ip0, 3
  %vecext = extractelement <4 x i32> %am, i32 %ip0
  %arrayidx = getelementptr inbounds i32, ptr %x, i32 %ip3
  store i32 %vecext, ptr %arrayidx, align 4
  %vecext5 = extractelement <4 x i32> %am, i32 %ip1
  %arrayidx8 = getelementptr inbounds i32, ptr %x, i32 %ip0
  store i32 %vecext5, ptr %arrayidx8, align 4
  %vecext11 = extractelement <4 x i32> %am, i32 %ip2
  %arrayidx14 = getelementptr inbounds i32, ptr %x, i32 %ip2
  store i32 %vecext11, ptr %arrayidx14, align 4
  %vecext17 = extractelement <4 x i32> %am, i32 %ip3
  %arrayidx20 = getelementptr inbounds i32, ptr %x, i32 %ip1
  store i32 %vecext17, ptr %arrayidx20, align 4
  ret void
}

attributes #0 = { nounwind }