@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s
@ RUN: llvm-mc -triple=armebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
.syntax unified
.globl _func
@ Check that the assembler can handle the documented syntax from the ARM ARM.
@ For complex constructs like shifter operands, check more thoroughly for them
@ once then spot check that following instructions accept the form generally.
@ This gives us good coverage while keeping the overall size of the test
@ more reasonable.
_func:
@ CHECK: _func
@------------------------------------------------------------------------------
@ ADC (immediate)
@------------------------------------------------------------------------------
adc r1, r2, adc r1, r2, $0xf
adc r1, r2, 0xf
adc r7, r8, adc r7, r8, adc r7, r8, adc r7, r8, adc r7, r8, $40, $2
adc r7, r8, 40, 2
adc r7, r8, (2 * 20), (1 << 1)
adc r1, r2, adc r1, r2, adc r1, r2, adc r1, r2, adc r1, r2, adc r1, r2, adc r1, r2, adc r1, r2, adcs r1, r2, adcs r7, r8, adcseq r1, r2, adceq r1, r2,
@ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r7, r8, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adc r1, r2, @ CHECK: adcs r1, r2, @ CHECK: adcs r7, r8, @ CHECK: adcseq r1, r2, @ CHECK: adceq r1, r2,
@------------------------------------------------------------------------------
@ ADC (register)
@ ADC (shifted register)
@------------------------------------------------------------------------------
adc r4, r5, r6
@ Constant shifts
adc r4, r5, r6, lsl adc r4, r5, r6, lsl adc r4, r5, r6, lsr adc r4, r5, r6, lsr adc r4, r5, r6, lsr adc r4, r5, r6, asr adc r4, r5, r6, asr adc r4, r5, r6, asr adc r4, r5, r6, ror adc r4, r5, r6, ror
@ Register shifts
adc r6, r7, r8, lsl r9
adc r6, r7, r8, lsr r9
adc r6, r7, r8, asr r9
adc r6, r7, r8, ror r9
adc r4, r5, r6, rrx
@ Destination register is optional
adc r5, r6
adc r4, r5, lsl adc r4, r5, lsl adc r4, r5, lsr adc r4, r5, lsr adc r4, r5, lsr adc r4, r5, asr adc r4, r5, asr adc r4, r5, asr adc r4, r5, ror adc r4, r5, ror adc r4, r5, rrx
adc r6, r7, lsl r9
adc r6, r7, lsr r9
adc r6, r7, asr r9
adc r6, r7, ror r9
adc r4, r5, rrx
@ CHECK: adc r4, r5, r6 @ encoding: [0x06,0x40,0xa5,0xe0]
@ CHECK: adc r4, r5, r6, lsl @ CHECK: adc r4, r5, r6, lsl @ CHECK: adc r4, r5, r6, lsr @ CHECK: adc r4, r5, r6, lsr @ CHECK: adc r4, r5, r6, lsr @ CHECK: adc r4, r5, r6, asr @ CHECK: adc r4, r5, r6, asr @ CHECK: adc r4, r5, r6, asr @ CHECK: adc r4, r5, r6, ror @ CHECK: adc r4, r5, r6, ror
@ CHECK: adc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xa7,0xe0]
@ CHECK: adc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xa7,0xe0]
@ CHECK: adc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xa7,0xe0]
@ CHECK: adc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xa7,0xe0]
@ CHECK: adc r4, r5, r6, rrx @ encoding: [0x66,0x40,0xa5,0xe0]
@ CHECK: adc r5, r5, r6 @ encoding: [0x06,0x50,0xa5,0xe0]
@ CHECK: adc r4, r4, r5, lsl @ CHECK: adc r4, r4, r5, lsl @ CHECK: adc r4, r4, r5, lsr @ CHECK: adc r4, r4, r5, lsr @ CHECK: adc r4, r4, r5, lsr @ CHECK: adc r4, r4, r5, asr @ CHECK: adc r4, r4, r5, asr @ CHECK: adc r4, r4, r5, asr @ CHECK: adc r4, r4, r5, ror @ CHECK: adc r4, r4, r5, ror @ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
@ CHECK: adc r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xa6,0xe0]
@ CHECK: adc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xa6,0xe0]
@ CHECK: adc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xa6,0xe0]
@ CHECK: adc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xa6,0xe0]
@ CHECK: adc r4, r4, r5, rrx @ encoding: [0x65,0x40,0xa4,0xe0]
@------------------------------------------------------------------------------
@ ADR
@------------------------------------------------------------------------------
Lback:
adr r2, Lback
adr r3, Lforward
Lforward:
adr r2, adr r2,
@ CHECK: Lback:
@ CHECK: adr r2, Lback @ encoding: [A,0x20'A',0x0f'A',0xe2'A']
@ CHECK: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
@ CHECK-BE: adr r2, Lback @ encoding: [0xe2'A',0x0f'A',0x20'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
@ CHECK: adr r3, Lforward @ encoding: [A,0x30'A',0x0f'A',0xe2'A']
@ CHECK: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
@ CHECK-BE: adr r3, Lforward @ encoding: [0xe2'A',0x0f'A',0x30'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
@ CHECK: Lforward:
@ CHECK: adr r2, @ CHECK: adr r2,
adr r1, adr r1, adr r1, adr r1, adr r1,
@ CHECK: adr r1, @ CHECK: adr r1, @ CHECK: adr r1, @ CHECK: adr r1, @ CHECK: adr r1,
@------------------------------------------------------------------------------
@ ADD
@------------------------------------------------------------------------------
add r4, r5, add r4, r5, $0xf000
add r4, r5, 0xf000
add r4, r5, -0xf000
add r7, r8, add r7, r8, add r7, r8, add r7, r8, add r7, r8, $40, $2
add r7, r8, 40, 2
add r7, r8, (2 * 20), (1 << 1)
add r4, r5, r6
add r4, r5, r6, lsl add r4, r5, r6, lsr add r4, r5, r6, lsr add r4, r5, r6, asr add r4, r5, r6, ror add r6, r7, r8, lsl r9
add r4, r4, r3, asl r9
add r6, r7, r8, lsr r9
add r6, r7, r8, asr r9
add r6, r7, r8, ror r9
add r4, r5, r6, rrx
@ destination register is optional
add r5, add r5, $0xf000
add r5, 0xf000
add r5, -0xf000
add r7, add r7, add r7, add r7, add r7, $40, $2
add r7, 40, 2
add r7, (2 * 20), (1 << 1)
add r4, r5
add r4, r5, lsl add r4, r5, lsr add r4, r5, lsr add r4, r5, asr add r4, r5, ror add r6, r7, lsl r9
add r6, r7, lsr r9
add r6, r7, asr r9
add r6, r7, ror r9
add r4, r5, rrx
add r0, add r4, r5, add r0, pc, addseq r0,pc,
add r0, pc,
@ CHECK: add r4, r5, @ CHECK: add r4, r5, @ CHECK: add r4, r5, @ CHECK: sub r4, r5, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r7, r8, @ CHECK: add r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe0]
@ CHECK: add r4, r5, r6, lsl @ CHECK: add r4, r5, r6, lsr @ CHECK: add r4, r5, r6, lsr @ CHECK: add r4, r5, r6, asr @ CHECK: add r4, r5, r6, ror @ CHECK: add r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x87,0xe0]
@ CHECK: add r4, r4, r3, lsl r9 @ encoding: [0x13,0x49,0x84,0xe0]
@ CHECK: add r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x87,0xe0]
@ CHECK: add r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x87,0xe0]
@ CHECK: add r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0xe0]
@ CHECK: add r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe0]
@ CHECK: add r5, r5, @ CHECK: add r5, r5, @ CHECK: add r5, r5, @ CHECK: sub r5, r5, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r7, r7, @ CHECK: add r4, r4, r5 @ encoding: [0x05,0x40,0x84,0xe0]
@ CHECK: add r4, r4, r5, lsl @ CHECK: add r4, r4, r5, lsr @ CHECK: add r4, r4, r5, lsr @ CHECK: add r4, r4, r5, asr @ CHECK: add r4, r4, r5, ror @ CHECK: add r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x86,0xe0]
@ CHECK: add r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x86,0xe0]
@ CHECK: add r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0xe0]
@ CHECK: add r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x86,0xe0]
@ CHECK: add r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe0]
@ CHECK: sub r0, r0, @ CHECK: sub r4, r5, @ CHECK: adr r0, @ CHECK: addseq r0, pc, @ CHECK: Ltmp0:
@ CHECK-NEXT: Ltmp1:
@ CHECK-NEXT: adr r0, (Ltmp1+8)+(Lback-Ltmp0) @ encoding: [A,A,0x0f'A',0xe2'A']
@ CHECK-NEXT: @ fixup A - offset: 0, value: (Ltmp1+8)+(Lback-Ltmp0), kind: fixup_arm_adr_pcrel_12
@ Test right shift by 32, which is encoded as 0
add r3, r1, r2, lsr add r3, r1, r2, asr @ CHECK: add r3, r1, r2, lsr @ CHECK: add r3, r1, r2, asr
@------------------------------------------------------------------------------
@ ADDS
@------------------------------------------------------------------------------
adds r7, r8, adds r7, r8, $16711680
adds r7, r8, 16711680
adds r7, r8, adds r7, r8, adds r7, r8, adds r7, r8, adds r7, r8, $40, $2
adds r7, r8, 40, 2
adds r7, r8, (2 * 20), (1 << 1)
@ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8, @ CHECK: adds r7, r8,
@------------------------------------------------------------------------------
@ AND
@------------------------------------------------------------------------------
and r10, r1, and r10, r1, $0xf
and r10, r1, 0xf
and r10, r1, -0xf
and r7, r8, and r7, r8, and r7, r8, and r7, r8, and r7, r8, $40, $2
and r7, r8, 40, 2
and r7, r8, (2 * 20), (1 << 1)
and r10, r1, r6
and r10, r1, r6, lsl and r10, r1, r6, lsr and r10, r1, r6, lsr and r10, r1, r6, asr and r10, r1, r6, ror and r6, r7, r8, lsl r2
and r6, r7, r8, lsr r2
and r6, r7, r8, asr r2
and r6, r7, r8, ror r2
and r10, r1, r6, rrx
and r2, r3, and sp, sp, and pc, pc,
@ destination register is optional
and r1, and r1, $0xf
and r1, 0xf
and r1, -0xf
and r7, and r7, and r7, and r7, and r7, $40, $2
and r7, 40, 2
and r7, (2 * 20), (1 << 1)
and r10, r1
and r10, r1, lsl and r10, r1, lsr and r10, r1, lsr and r10, r1, asr and r10, r1, ror and r6, r7, lsl r2
and r6, r7, lsr r2
and r6, r7, asr r2
and r6, r7, ror r2
and r10, r1, rrx
@ CHECK: and r10, r1, @ CHECK: and r10, r1, @ CHECK: and r10, r1, @ CHECK: bic r10, r1, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r7, r8, @ CHECK: and r10, r1, r6 @ encoding: [0x06,0xa0,0x01,0xe0]
@ CHECK: and r10, r1, r6, lsl @ CHECK: and r10, r1, r6, lsr @ CHECK: and r10, r1, r6, lsr @ CHECK: and r10, r1, r6, asr @ CHECK: and r10, r1, r6, ror @ CHECK: and r6, r7, r8, lsl r2 @ encoding: [0x18,0x62,0x07,0xe0]
@ CHECK: and r6, r7, r8, lsr r2 @ encoding: [0x38,0x62,0x07,0xe0]
@ CHECK: and r6, r7, r8, asr r2 @ encoding: [0x58,0x62,0x07,0xe0]
@ CHECK: and r6, r7, r8, ror r2 @ encoding: [0x78,0x62,0x07,0xe0]
@ CHECK: and r10, r1, r6, rrx @ encoding: [0x66,0xa0,0x01,0xe0]
@ CHECK: bic r2, r3, @ CHECK: bic sp, sp, @ CHECK: bic pc, pc,
@ CHECK: and r1, r1, @ CHECK: and r1, r1, @ CHECK: and r1, r1, @ CHECK: bic r1, r1, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r7, r7, @ CHECK: and r10, r10, r1 @ encoding: [0x01,0xa0,0x0a,0xe0]
@ CHECK: and r10, r10, r1, lsl @ CHECK: and r10, r10, r1, lsr @ CHECK: and r10, r10, r1, lsr @ CHECK: and r10, r10, r1, asr @ CHECK: and r10, r10, r1, ror @ CHECK: and r6, r6, r7, lsl r2 @ encoding: [0x17,0x62,0x06,0xe0]
@ CHECK: and r6, r6, r7, lsr r2 @ encoding: [0x37,0x62,0x06,0xe0]
@ CHECK: and r6, r6, r7, asr r2 @ encoding: [0x57,0x62,0x06,0xe0]
@ CHECK: and r6, r6, r7, ror r2 @ encoding: [0x77,0x62,0x06,0xe0]
@ CHECK: and r10, r10, r1, rrx @ encoding: [0x61,0xa0,0x0a,0xe0]
@ Test right shift by 32, which is encoded as 0
and r3, r1, r2, lsr and r3, r1, r2, asr @ CHECK: and r3, r1, r2, lsr @ CHECK: and r3, r1, r2, asr
@------------------------------------------------------------------------------
@ ASR
@------------------------------------------------------------------------------
asr r2, r4, asr r2, r4, asr r2, r4, asr r4,
@ CHECK: asr r2, r4, @ CHECK: asr r2, r4, @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1]
@ CHECK: asr r4, r4,
@------------------------------------------------------------------------------
@ B
@------------------------------------------------------------------------------
b _bar
beq _baz
@ CHECK: b _bar @ encoding: [A,A,A,0xea]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@ CHECK-BE: b _bar @ encoding: [0xea,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@ CHECK: beq _baz @ encoding: [A,A,A,0x0a]
@ CHECK: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch
@ CHECK-BE: beq _baz @ encoding: [0x0a,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _baz, kind: fixup_arm_condbranch
@------------------------------------------------------------------------------
@ BFC
@------------------------------------------------------------------------------
bfc r5, bfccc r5,
@ CHECK: bfc r5, @ CHECK: bfclo r5,
@------------------------------------------------------------------------------
@ BFI
@------------------------------------------------------------------------------
bfi r5, r2, bfine r5, r2,
@ CHECK: bfi r5, r2, @ CHECK: bfine r5, r2,
@------------------------------------------------------------------------------
@ BIC
@------------------------------------------------------------------------------
bic r10, r1, bic r10, r1, $0xf
bic r10, r1, 0xf
bic r10, r1, -0xf
bic r7, r8, bic r7, r8, bic r7, r8, bic r7, r8, bic r7, r8, $40, $2
bic r7, r8, 40, 2
bic r7, r8, (2 * 20), (1 << 1)
bic r10, r1, r6
bic r10, r1, r6, lsl bic r10, r1, r6, lsr bic r10, r1, r6, lsr bic r10, r1, r6, asr bic r10, r1, r6, ror bic r6, r7, r8, lsl r2
bic r6, r7, r8, lsr r2
bic r6, r7, r8, asr r2
bic r6, r7, r8, ror r2
bic r10, r1, r6, rrx
bic r2, r3, bic sp, sp, bic pc, pc,
@ destination register is optional
bic r1, bic r1, $0xf
bic r1, 0xf
bic r1, -0xf
bic r7, bic r7, bic r7, bic r7, bic r7, $40, $2
bic r7, 40, 2
bic r7, (2 * 20), (1 << 1)
bic r10, r1
bic r10, r1, lsl bic r10, r1, lsr bic r10, r1, lsr bic r10, r1, asr bic r10, r1, ror bic r6, r7, lsl r2
bic r6, r7, lsr r2
bic r6, r7, asr r2
bic r6, r7, ror r2
bic r10, r1, rrx
@ CHECK: bic r10, r1, @ CHECK: bic r10, r1, @ CHECK: bic r10, r1, @ CHECK: and r10, r1, @ CHECK: bic r7, r8, @ CHECK: bic r7, r8, @ CHECK: bic r7, r8, @ CHECK: bic r7, r8, @ CHECK: bic r7, r8, @ CHECK: bic r7, r8, @ CHECK: bic r10, r1, r6 @ encoding: [0x06,0xa0,0xc1,0xe1]
@ CHECK: bic r10, r1, r6, lsl @ CHECK: bic r10, r1, r6, lsr @ CHECK: bic r10, r1, r6, lsr @ CHECK: bic r10, r1, r6, asr @ CHECK: bic r10, r1, r6, ror @ CHECK: bic r6, r7, r8, lsl r2 @ encoding: [0x18,0x62,0xc7,0xe1]
@ CHECK: bic r6, r7, r8, lsr r2 @ encoding: [0x38,0x62,0xc7,0xe1]
@ CHECK: bic r6, r7, r8, asr r2 @ encoding: [0x58,0x62,0xc7,0xe1]
@ CHECK: bic r6, r7, r8, ror r2 @ encoding: [0x78,0x62,0xc7,0xe1]
@ CHECK: bic r10, r1, r6, rrx @ encoding: [0x66,0xa0,0xc1,0xe1]
@ CHECK: and r2, r3, @ CHECK: and sp, sp, @ CHECK: and pc, pc,
@ CHECK: bic r1, r1, @ CHECK: bic r1, r1, @ CHECK: bic r1, r1, @ CHECK: and r1, r1, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r7, r7, @ CHECK: bic r10, r10, r1 @ encoding: [0x01,0xa0,0xca,0xe1]
@ CHECK: bic r10, r10, r1, lsl @ CHECK: bic r10, r10, r1, lsr @ CHECK: bic r10, r10, r1, lsr @ CHECK: bic r10, r10, r1, asr @ CHECK: bic r10, r10, r1, ror @ CHECK: bic r6, r6, r7, lsl r2 @ encoding: [0x17,0x62,0xc6,0xe1]
@ CHECK: bic r6, r6, r7, lsr r2 @ encoding: [0x37,0x62,0xc6,0xe1]
@ CHECK: bic r6, r6, r7, asr r2 @ encoding: [0x57,0x62,0xc6,0xe1]
@ CHECK: bic r6, r6, r7, ror r2 @ encoding: [0x77,0x62,0xc6,0xe1]
@ CHECK: bic r10, r10, r1, rrx @ encoding: [0x61,0xa0,0xca,0xe1]
@ Test right shift by 32, which is encoded as 0
bic r3, r1, r2, lsr bic r3, r1, r2, asr @ CHECK: bic r3, r1, r2, lsr @ CHECK: bic r3, r1, r2, asr
@------------------------------------------------------------------------------
@ BKPT
@------------------------------------------------------------------------------
bkpt bkpt
@ CHECK: bkpt @ CHECK: bkpt
@------------------------------------------------------------------------------
@ BL/BLX (immediate)
@------------------------------------------------------------------------------
bl _bar
bleq _bar
blx _bar
blls blx blx
@ CHECK: bl _bar @ encoding: [A,A,A,0xeb]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl
@ CHECK-BE: bl _bar @ encoding: [0xeb,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl
@ CHECK: bleq _bar @ encoding: [A,A,A,0x0b]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl
@ CHECK-BE: bleq _bar @ encoding: [0x0b,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl
@ CHECK: blx _bar @ encoding: [A,A,A,0xfa]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx
@ CHECK-BE: blx _bar @ encoding: [0xfa,A,A,A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx
@ CHECK: blls @ CHECK: blx @ CHECK: blx @------------------------------------------------------------------------------
@ BLX (register)
@------------------------------------------------------------------------------
blx r2
blxne r2
@ CHECK: blx r2 @ encoding: [0x32,0xff,0x2f,0xe1]
@ CHECK: blxne r2 @ encoding: [0x32,0xff,0x2f,0x11]
@------------------------------------------------------------------------------
@ BX
@------------------------------------------------------------------------------
bx r2
bxne r2
@ CHECK: bx r2 @ encoding: [0x12,0xff,0x2f,0xe1]
@ CHECK: bxne r2 @ encoding: [0x12,0xff,0x2f,0x11]
@------------------------------------------------------------------------------
@ BXJ
@------------------------------------------------------------------------------
bxj r2
bxjne r2
@ CHECK: bxj r2 @ encoding: [0x22,0xff,0x2f,0xe1]
@ CHECK: bxjne r2 @ encoding: [0x22,0xff,0x2f,0x11]
@------------------------------------------------------------------------------
@ CDP/CDP2
@------------------------------------------------------------------------------
cdp p7, cdp2 p7, cdp2 p12,
@ CHECK: cdp p7, @ CHECK: cdp2 p7, @ CHECK: cdp2 p12,
cdpne p7, @ CHECK: cdpne p7,
@------------------------------------------------------------------------------
@ CLREX
@------------------------------------------------------------------------------
clrex
@ CHECK: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5]
@------------------------------------------------------------------------------
@ CLZ
@------------------------------------------------------------------------------
clz r1, r2
clzeq r1, r2
@ CHECK: clz r1, r2 @ encoding: [0x12,0x1f,0x6f,0xe1]
@ CHECK: clzeq r1, r2 @ encoding: [0x12,0x1f,0x6f,0x01]
@------------------------------------------------------------------------------
@ CMN
@------------------------------------------------------------------------------
cmn r1, cmn r1, $0xf
cmn r1, 0xf
cmn r1, -0xf
cmn r7, cmn r7, cmn r7, cmn r7, cmn r7, $40, $2
cmn r7, 40, 2
cmn r7, (20 * 2), (1 << 1)
cmn r1, r6
cmn r1, r6, lsl cmn r1, r6, lsr cmn sp, r6, lsr cmn r1, r6, asr cmn r1, r6, ror cmn r7, r8, lsl r2
cmn sp, r8, lsr r2
cmn r7, r8, asr r2
cmn r7, r8, ror r2
cmn r1, r6, rrx
@ CHECK: cmn r1, @ CHECK: cmn r1, @ CHECK: cmn r1, @ CHECK: cmp r1, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r7, @ CHECK: cmn r1, r6 @ encoding: [0x06,0x00,0x71,0xe1]
@ CHECK: cmn r1, r6, lsl @ CHECK: cmn r1, r6, lsr @ CHECK: cmn sp, r6, lsr @ CHECK: cmn r1, r6, asr @ CHECK: cmn r1, r6, ror @ CHECK: cmn r7, r8, lsl r2 @ encoding: [0x18,0x02,0x77,0xe1]
@ CHECK: cmn sp, r8, lsr r2 @ encoding: [0x38,0x02,0x7d,0xe1]
@ CHECK: cmn r7, r8, asr r2 @ encoding: [0x58,0x02,0x77,0xe1]
@ CHECK: cmn r7, r8, ror r2 @ encoding: [0x78,0x02,0x77,0xe1]
@ CHECK: cmn r1, r6, rrx @ encoding: [0x66,0x00,0x71,0xe1]
@------------------------------------------------------------------------------
@ CMP
@------------------------------------------------------------------------------
cmp r1, cmp r1, $0xf
cmp r1, 0xf
cmp r1, -0xf
cmp r7, cmp r7, cmp r7, cmp r7, cmp r7, $40, $2
cmp r7, 40, 2
cmp r7, (2 * 20), (1 << 1)
cmp r1, r6
cmp r1, r6, lsl cmp r1, r6, lsr cmp sp, r6, lsr cmp r1, r6, asr cmp r1, r6, ror cmp r7, r8, lsl r2
cmp sp, r8, lsr r2
cmp r7, r8, asr r2
cmp r7, r8, ror r2
cmp r1, r6, rrx
cmp r0, cmp lr,
@ CHECK: cmp r1, @ CHECK: cmp r1, @ CHECK: cmp r1, @ CHECK: cmn r1, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r7, @ CHECK: cmp r1, r6 @ encoding: [0x06,0x00,0x51,0xe1]
@ CHECK: cmp r1, r6, lsl @ CHECK: cmp r1, r6, lsr @ CHECK: cmp sp, r6, lsr @ CHECK: cmp r1, r6, asr @ CHECK: cmp r1, r6, ror @ CHECK: cmp r7, r8, lsl r2 @ encoding: [0x18,0x02,0x57,0xe1]
@ CHECK: cmp sp, r8, lsr r2 @ encoding: [0x38,0x02,0x5d,0xe1]
@ CHECK: cmp r7, r8, asr r2 @ encoding: [0x58,0x02,0x57,0xe1]
@ CHECK: cmp r7, r8, ror r2 @ encoding: [0x78,0x02,0x57,0xe1]
@ CHECK: cmp r1, r6, rrx @ encoding: [0x66,0x00,0x51,0xe1]
@ CHECK: cmn r0, @ CHECK: cmp lr,
@------------------------------------------------------------------------------
@ CPS
@------------------------------------------------------------------------------
cpsie aif
cpsie AIF
cps cpsid if,
@ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1]
@ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1]
@ CHECK: cps @ CHECK: cpsid if,
@------------------------------------------------------------------------------
@ DBG
@------------------------------------------------------------------------------
dbg dbg dbg
@ CHECK: dbg @ CHECK: dbg @ CHECK: dbg
@------------------------------------------------------------------------------
@ DMB
@------------------------------------------------------------------------------
dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb
dmb sy
dmb st
dmb sh
dmb ish
dmb shst
dmb ishst
dmb un
dmb nsh
dmb unst
dmb nshst
dmb osh
dmb oshst
dmb
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
@ CHECK: dmb @ CHECK: dmb
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5]
@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5]
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5]
@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5]
@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5]
@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5]
@------------------------------------------------------------------------------
@ DSB
@------------------------------------------------------------------------------
dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb
dsb 8
dsb 7
dsb sy
dsb st
dsb sh
dsb ish
dsb shst
dsb ishst
dsb un
dsb nsh
dsb unst
dsb nshst
dsb osh
dsb oshst
dsb
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
@ CHECK: dsb @ CHECK: dsb @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
@ CHECK: dsb @ CHECK: dsb @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb @ CHECK: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5]
@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
@ CHECK: dsb @ CHECK: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5]
@ CHECK: dsb @ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5]
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ With capitals
dsb SY
dsb OSHST
@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5]
@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
@------------------------------------------------------------------------------
@ EOR
@------------------------------------------------------------------------------
eor r4, r5, eor r4, r5, $0xf000
eor r4, r5, 0xf000
eor r7, r8, eor r7, r8, eor r7, r8, eor r7, r8, eor r7, r8, $40, $2
eor r7, r8, 40, 2
eor r7, r8, (20 * 2), (1 << 1)
eor r4, r5, r6
eor r4, r5, r6, lsl eor r4, r5, r6, lsr eor r4, r5, r6, lsr eor r4, r5, r6, asr eor r4, r5, r6, ror eor r6, r7, r8, lsl r9
eor r6, r7, r8, lsr r9
eor r6, r7, r8, asr r9
eor r6, r7, r8, ror r9
eor r4, r5, r6, rrx
@ destination register is optional
eor r5, eor r5, $0xf000
eor r5, 0xf000
eor r7, eor r7, eor r7, eor r7, eor r7, $40, $2
eor r7, 40, 2
eor r7, (20 * 2), (1 << 1)
eor r4, r5
eor r4, r5, lsl eor r4, r5, lsr eor r4, r5, lsr eor r4, r5, asr eor r4, r5, ror eor r6, r7, lsl r9
eor r6, r7, lsr r9
eor r6, r7, asr r9
eor r6, r7, ror r9
eor r4, r5, rrx
@ CHECK: eor r4, r5, @ CHECK: eor r4, r5, @ CHECK: eor r4, r5, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r7, r8, @ CHECK: eor r4, r5, r6 @ encoding: [0x06,0x40,0x25,0xe0]
@ CHECK: eor r4, r5, r6, lsl @ CHECK: eor r4, r5, r6, lsr @ CHECK: eor r4, r5, r6, lsr @ CHECK: eor r4, r5, r6, asr @ CHECK: eor r4, r5, r6, ror @ CHECK: eor r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x27,0xe0]
@ CHECK: eor r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x27,0xe0]
@ CHECK: eor r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x27,0xe0]
@ CHECK: eor r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x27,0xe0]
@ CHECK: eor r4, r5, r6, rrx @ encoding: [0x66,0x40,0x25,0xe0]
@ CHECK: eor r5, r5, @ CHECK: eor r5, r5, @ CHECK: eor r5, r5, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r7, r7, @ CHECK: eor r4, r4, r5 @ encoding: [0x05,0x40,0x24,0xe0]
@ CHECK: eor r4, r4, r5, lsl @ CHECK: eor r4, r4, r5, lsr @ CHECK: eor r4, r4, r5, lsr @ CHECK: eor r4, r4, r5, asr @ CHECK: eor r4, r4, r5, ror @ CHECK: eor r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x26,0xe0]
@ CHECK: eor r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x26,0xe0]
@ CHECK: eor r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x26,0xe0]
@ CHECK: eor r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x26,0xe0]
@ CHECK: eor r4, r4, r5, rrx @ encoding: [0x65,0x40,0x24,0xe0]
@ Test right shift by 32, which is encoded as 0
eor r3, r1, r2, lsr eor r3, r1, r2, asr @ CHECK: eor r3, r1, r2, lsr @ CHECK: eor r3, r1, r2, asr
@------------------------------------------------------------------------------
@ ISB
@------------------------------------------------------------------------------
isb sy
isb
isb isb
@ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5]
@ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5]
@ CHECK: isb sy @ encoding: [0x6f,0xf0,0x7f,0xf5]
@ CHECK: isb
@------------------------------------------------------------------------------
@ LDC{L}/LDC2{L}
@------------------------------------------------------------------------------
ldc2 p0, c8, [r1, ldc2 p1, c7, [r2]
ldc2 p2, c6, [r3, ldc2 p3, c5, [r4, ldc2 p4, c4, [r5], ldc2 p5, c3, [r6], ldc2l p6, c2, [r7, ldc2l p7, c1, [r8]
ldc2l p8, c0, [r9, ldc2l p9, c1, [r10, ldc2l p0, c2, [r11], ldc2l p1, c3, [r12],
ldc p12, c4, [r0, ldc p13, c5, [r1]
ldc p14, c6, [r2, ldc p15, c7, [r3, ldc p5, c8, [r4], ldc p4, c9, [r5], ldcl p3, c10, [r6, ldcl p2, c11, [r7]
ldcl p1, c12, [r8, ldcl p0, c13, [r9, ldcl p6, c14, [r10], ldcl p7, c15, [r11],
ldclo p12, c4, [r0, ldchi p13, c5, [r1]
ldccs p14, c6, [r2, ldccc p15, c7, [r3, ldceq p5, c8, [r4], ldcgt p4, c9, [r5], ldcllt p3, c10, [r6, ldclge p2, c11, [r7]
ldclle p1, c12, [r8, ldclne p0, c13, [r9, ldcleq p6, c14, [r10], ldclhi p7, c15, [r11],
ldc2 p2, c8, [r1], { 25 }
@ CHECK: ldc2 p0, c8, [r1, @ CHECK: ldc2 p1, c7, [r2] @ encoding: [0x00,0x71,0x92,0xfd]
@ CHECK: ldc2 p2, c6, [r3, @ CHECK: ldc2 p3, c5, [r4, @ CHECK: ldc2 p4, c4, [r5], @ CHECK: ldc2 p5, c3, [r6], @ CHECK: ldc2l p6, c2, [r7, @ CHECK: ldc2l p7, c1, [r8] @ encoding: [0x00,0x17,0xd8,0xfd]
@ CHECK: ldc2l p8, c0, [r9, @ CHECK: ldc2l p9, c1, [r10, @ CHECK: ldc2l p0, c2, [r11], @ CHECK: ldc2l p1, c3, [r12],
@ CHECK: ldc p12, c4, [r0, @ CHECK: ldc p13, c5, [r1] @ encoding: [0x00,0x5d,0x91,0xed]
@ CHECK: ldc p14, c6, [r2, @ CHECK: ldc p15, c7, [r3, @ CHECK: ldc p5, c8, [r4], @ CHECK: ldc p4, c9, [r5], @ CHECK: ldcl p3, c10, [r6, @ CHECK: ldcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xed]
@ CHECK: ldcl p1, c12, [r8, @ CHECK: ldcl p0, c13, [r9, @ CHECK: ldcl p6, c14, [r10], @ CHECK: ldcl p7, c15, [r11],
@ CHECK: ldclo p12, c4, [r0, @ CHECK: ldchi p13, c5, [r1] @ encoding: [0x00,0x5d,0x91,0x8d]
@ CHECK: ldchs p14, c6, [r2, @ CHECK: ldclo p15, c7, [r3, @ CHECK: ldceq p5, c8, [r4], @ CHECK: ldcgt p4, c9, [r5], @ CHECK: ldcllt p3, c10, [r6, @ CHECK: ldclge p2, c11, [r7] @ encoding: [0x00,0xb2,0xd7,0xad]
@ CHECK: ldclle p1, c12, [r8, @ CHECK: ldclne p0, c13, [r9, @ CHECK: ldcleq p6, c14, [r10], @ CHECK: ldclhi p7, c15, [r11],
@ CHECK: ldc2 p2, c8, [r1], {25} @ encoding: [0x19,0x82,0x91,0xfc]
@------------------------------------------------------------------------------
@ LDM*
@------------------------------------------------------------------------------
ldm r2, {r1,r3-r6,sp}
ldmia r2, {r1,r3-r6,sp}
ldmib r2, {r1,r3-r6,sp}
ldmda r2, {r1,r3-r6,sp}
ldmdb r2, {r1,r3-r6,sp}
ldmfd r2, {r1,r3-r6,sp}
@ with update
ldm r2!, {r1,r3-r6,sp}
ldmib r2!, {r1,r3-r6,sp}
ldmda r2!, {r1,r3-r6,sp}
ldmdb r2!, {r1,r3-r6,sp}
@ system version
ldm r0, {r0, r2, lr}^
ldm sp!, {r0-r3, pc}^
@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
@ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9]
@ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8]
@ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9]
@ CHECK: ldm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
@ CHECK: ldm r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8]
@ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9]
@ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8]
@ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9]
@ CHECK: ldm r0, {r0, r2, lr} ^ @ encoding: [0x05,0x40,0xd0,0xe8]
@ CHECK: ldm sp!, {r0, r1, r2, r3, pc} ^ @ encoding: [0x0f,0x80,0xfd,0xe8]
@------------------------------------------------------------------------------
@ LDREX/LDREXB/LDREXH/LDREXD
@------------------------------------------------------------------------------
ldrexb r3, [r4]
ldrexh r2, [r5]
ldrex r1, [r7]
ldrexd r6, r7, [r8]
@ CHECK: ldrexb r3, [r4] @ encoding: [0x9f,0x3f,0xd4,0xe1]
@ CHECK: ldrexh r2, [r5] @ encoding: [0x9f,0x2f,0xf5,0xe1]
@ CHECK: ldrex r1, [r7] @ encoding: [0x9f,0x1f,0x97,0xe1]
@ CHECK: ldrexd r6, r7, [r8] @ encoding: [0x9f,0x6f,0xb8,0xe1]
@------------------------------------------------------------------------------
@ LDRHT
@------------------------------------------------------------------------------
ldrhthi r8, [r11], ldrhthi r8, [r11],
@ CHECK: ldrhthi r8, [r11], @ CHECK: ldrhthi r8, [r11],
@------------------------------------------------------------------------------
@ LSL
@------------------------------------------------------------------------------
lsl r2, r4, lsl r2, r4, lsl r2, r4, lsl r4,
@ CHECK: lsl r2, r4, @ CHECK: lsl r2, r4, @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1]
@ CHECK: lsl r4, r4,
@------------------------------------------------------------------------------
@ LSR
@------------------------------------------------------------------------------
lsr r2, r4, lsr r2, r4, lsr r2, r4, lsr r4,
@ CHECK: lsr r2, r4, @ CHECK: lsr r2, r4, @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1]
@ CHECK: lsr r4, r4,
@------------------------------------------------------------------------------
@ MCR/MCR2
@------------------------------------------------------------------------------
mcr p7, mcr2 p7, MCR P7, MCR2 P7,
@ CHECK: mcr p7, @ CHECK: mcr2 p7, @ CHECK: mcr p7, @ CHECK: mcr2 p7,
mcrls p7, MCRLS P7, @ CHECK: mcrls p7, @ CHECK: mcrls p7,
@------------------------------------------------------------------------------
@ MCRR/MCRR2
@------------------------------------------------------------------------------
mcrr p7, mcrr2 p7, MCRR P7, MCRR2 P7,
@ CHECK: mcrr p7, @ CHECK: mcrr2 p7, @ CHECK: mcrr p7, @ CHECK: mcrr2 p7,
mcrrgt p7, MCRRGT P7, @ CHECK: mcrrgt p7, @ CHECK: mcrrgt p7,
@------------------------------------------------------------------------------
@ MLA
@------------------------------------------------------------------------------
mla r1,r2,r3,r4
mlas r1,r2,r3,r4
mlane r1,r2,r3,r4
mlasne r1,r2,r3,r4
@ CHECK: mla r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0xe0]
@ CHECK: mlas r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0]
@ CHECK: mlane r1, r2, r3, r4 @ encoding: [0x92,0x43,0x21,0x10]
@ CHECK: mlasne r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0x10]
@------------------------------------------------------------------------------
@ MLS
@------------------------------------------------------------------------------
mls r2,r5,r6,r3
mlsne r2,r5,r6,r3
@ CHECK: mls r2, r5, r6, r3 @ encoding: [0x95,0x36,0x62,0xe0]
@ CHECK: mlsne r2, r5, r6, r3 @ encoding: [0x95,0x36,0x62,0x10]
@------------------------------------------------------------------------------
@ MOV (immediate)
@------------------------------------------------------------------------------
mov r3, mov r3, $7
mov r3, 7
mov r3, -7
mov r4, mov r5, mov r7, mov r7, mov r7, mov r7, mov r7, mov pc, mov r7, mov r7, mov r7, $40, $2
mov r7, 40, 2
mov r7, (2 * 20), (1 << 1)
mov r7, mov r6, movw r9, movs r3, moveq r4, movseq r5,
@ CHECK: mov r3, @ CHECK: mov r3, @ CHECK: mov r3, @ CHECK: mvn r3, @ CHECK: mov r4, @ CHECK: mov r5, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov pc, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: mov r7, @ CHECK: movw r6, @ CHECK: movw r9, @ CHECK: movs r3, @ CHECK: moveq r4, @ CHECK: movseq r5,
@------------------------------------------------------------------------------
@ MOV (register)
@------------------------------------------------------------------------------
mov r2, r3
movs r2, r3
moveq r2, r3
movseq r2, r3
mov r12, r8, lsl lsl r2, r3, mov r12, r8, lsr lsr r2, r3, mov r12, r8, asr asr r2, r3, mov r12, r8, ror ror r2, r3,
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: movs r2, r3 @ encoding: [0x03,0x20,0xb0,0xe1]
@ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01]
@ CHECK: movseq r2, r3 @ encoding: [0x03,0x20,0xb0,0x01]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@ CHECK: mov r12, r8 @ encoding: [0x08,0xc0,0xa0,0xe1]
@ CHECK: mov r2, r3 @ encoding: [0x03,0x20,0xa0,0xe1]
@------------------------------------------------------------------------------
@ MOVT
@------------------------------------------------------------------------------
movt r3, movt r6, movteq r4,
@ CHECK: movt r3, @ CHECK: movt r6, @ CHECK: movteq r4,
@------------------------------------------------------------------------------
@ MRC/MRC2
@------------------------------------------------------------------------------
mrc p14, mrc p15, mrc2 p14, mrc2 p9, MRC P14, MRC P15, MRC2 P14, MRC2 P9,
@ CHECK: mrc p14, @ CHECK: mrc p15, @ CHECK: mrc2 p14, @ CHECK: mrc2 p9, @ CHECK: mrc p14, @ CHECK: mrc p15, @ CHECK: mrc2 p14, @ CHECK: mrc2 p9,
mrceq p15, MRCEQ P15, @ CHECK: mrceq p15, @ CHECK: mrceq p15,
@------------------------------------------------------------------------------
@ MRRC/MRRC2
@------------------------------------------------------------------------------
mrrc p7, mrrc2 p7, MRRC P7, MRRC2 P7,
@ CHECK: mrrc p7, @ CHECK: mrrc2 p7, @ CHECK: mrrc p7, @ CHECK: mrrc2 p7,
mrrclo p7, MRRCLO P7, @ CHECK: mrrclo p7, @ CHECK: mrrclo p7,
@------------------------------------------------------------------------------
@ MRS
@------------------------------------------------------------------------------
mrs r8, apsr
mrs r8, cpsr
mrs r8, spsr
@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1]
@ CHECK: mrs r8, apsr @ encoding: [0x00,0x80,0x0f,0xe1]
@ CHECK: mrs r8, spsr @ encoding: [0x00,0x80,0x4f,0xe1]
@------------------------------------------------------------------------------
@ MSR
@------------------------------------------------------------------------------
msr apsr, msr apsr, $5
msr apsr, 5
msr apsr_g, msr apsr_nzcvq, msr APSR_nzcvq, msr apsr_nzcvqg, msr cpsr_fc, msr cpsr_c, msr cpsr_x, msr cpsr_fc, msr cpsr_all, msr cpsr_fsx, msr spsr_fc, msr SPSR_fsxc, msr cpsr_fsxc, msr apsr_nzcvqg, msr APSR_nzcvq, msr apsr_nzcvqg, msr SPSR_fsxc, msr SPSR_fsxc, $40, $2
msr SPSR_fsxc, 40, 2
msr SPSR_fsxc, (2 * 20), (1 << 1)
@ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_g, @ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_nzcvqg, @ CHECK: msr CPSR_fc, @ CHECK: msr CPSR_c, @ CHECK: msr CPSR_x, @ CHECK: msr CPSR_fc, @ CHECK: msr CPSR_fc, @ CHECK: msr CPSR_fsx, @ CHECK: msr SPSR_fc, @ CHECK: msr SPSR_fsxc, @ CHECK: msr CPSR_fsxc, @ CHECK: msr APSR_nzcvqg, @ CHECK: msr APSR_nzcvq, @ CHECK: msr APSR_nzcvqg, @ CHECK: msr SPSR_fsxc, @ CHECK: msr SPSR_fsxc, @ CHECK: msr SPSR_fsxc, @ CHECK: msr SPSR_fsxc,
msr apsr, r0
msr apsr_g, r0
msr apsr_nzcvq, r0
msr APSR_nzcvq, r0
msr apsr_nzcvqg, r0
msr cpsr_fc, r0
msr cpsr_c, r0
msr cpsr_x, r0
msr cpsr_fc, r0
msr cpsr_all, r0
msr cpsr_fsx, r0
msr spsr_fc, r0
msr SPSR_fsxc, r0
msr cpsr_fsxc, r0
@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1]
@ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1]
@ CHECK: msr APSR_nzcvq, r0 @ encoding: [0x00,0xf0,0x28,0xe1]
@ CHECK: msr APSR_nzcvqg, r0 @ encoding: [0x00,0xf0,0x2c,0xe1]
@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
@ CHECK: msr CPSR_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1]
@ CHECK: msr CPSR_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1]
@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
@ CHECK: msr CPSR_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
@ CHECK: msr CPSR_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1]
@ CHECK: msr SPSR_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1]
@ CHECK: msr SPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1]
@ CHECK: msr CPSR_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1]
@------------------------------------------------------------------------------
@ MUL
@------------------------------------------------------------------------------
mul r5, r6, r7
muls r5, r6, r7
mulgt r5, r6, r7
mulsle r5, r6, r7
mul r11, r5
@ CHECK: mul r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xe0]
@ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0]
@ CHECK: mulgt r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xc0]
@ CHECK: mulsle r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xd0]
@------------------------------------------------------------------------------
@ MVN (immediate)
@------------------------------------------------------------------------------
mvn r3, mvn r3, $7
mvn r3, 7
mvn r3, -7
mvn r7, mvn r4, mvn r5, mvn r7, mvn r7, mvn r7, mvn r7, mvn r7, $40, $2
mvn r7, 40, 2
mvn r7, (2 * 20), (1 << 1)
mvns r3, mvneq r4, mvnseq r5,
@ CHECK: mvn r3, @ CHECK: mvn r3, @ CHECK: mvn r3, @ CHECK: mov r3, @ CHECK: mvn r7, @ CHECK: mvn r4, @ CHECK: mvn r5, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvn r7, @ CHECK: mvns r3, @ CHECK: mvneq r4, @ CHECK: mvnseq r5,
@------------------------------------------------------------------------------
@ MVN (register)
@------------------------------------------------------------------------------
mvn r2, r3
mvns r2, r3
mvn r5, r6, lsl mvn r5, r6, lsr mvn r5, r6, asr mvn r5, r6, ror mvn r5, r6, rrx
mvneq r2, r3
mvnseq r2, r3, lsl
@ CHECK: mvn r2, r3 @ encoding: [0x03,0x20,0xe0,0xe1]
@ CHECK: mvns r2, r3 @ encoding: [0x03,0x20,0xf0,0xe1]
@ CHECK: mvn r5, r6, lsl @ CHECK: mvn r5, r6, lsr @ CHECK: mvn r5, r6, asr @ CHECK: mvn r5, r6, ror @ CHECK: mvn r5, r6, rrx @ encoding: [0x66,0x50,0xe0,0xe1]
@ CHECK: mvneq r2, r3 @ encoding: [0x03,0x20,0xe0,0x01]
@ CHECK: mvnseq r2, r3, lsl
@------------------------------------------------------------------------------
@ MVN (shifted register)
@------------------------------------------------------------------------------
mvn r5, r6, lsl r7
mvns r5, r6, lsr r7
mvngt r5, r6, asr r7
mvnslt r5, r6, ror r7
@ CHECK: mvn r5, r6, lsl r7 @ encoding: [0x16,0x57,0xe0,0xe1]
@ CHECK: mvns r5, r6, lsr r7 @ encoding: [0x36,0x57,0xf0,0xe1]
@ CHECK: mvngt r5, r6, asr r7 @ encoding: [0x56,0x57,0xe0,0xc1]
@ CHECK: mvnslt r5, r6, ror r7 @ encoding: [0x76,0x57,0xf0,0xb1]
@------------------------------------------------------------------------------
@ NEG
@------------------------------------------------------------------------------
neg r5, r8
@ CHECK: rsb r5, r8,
@------------------------------------------------------------------------------
@ NOP
@------------------------------------------------------------------------------
nop
nop.w
nopgt
@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
@ CHECK: nopgt @ encoding: [0x00,0xf0,0x20,0xc3]
@------------------------------------------------------------------------------
@ ORR
@------------------------------------------------------------------------------
orr r4, r5, orr r4, r5, $0xf000
orr r4, r5, 0xf000
orr r7, r8, orr r7, r8, orr r7, r8, orr r7, r8, orr r7, r8, $40, $2
orr r7, r8, 40, 2
orr r7, r8, (2 * 20), (1 << 1)
orr r4, r5, r6
orr r4, r5, r6, lsl orr r4, r5, r6, lsr orr r4, r5, r6, lsr orr r4, r5, r6, asr orr r4, r5, r6, ror orr r6, r7, r8, lsl r9
orr r6, r7, r8, lsr r9
orr r6, r7, r8, asr r9
orr r6, r7, r8, ror r9
orr r4, r5, r6, rrx
@ destination register is optional
orr r5, orr r5, $0xf000
orr r5, 0xf000
orr r7, orr r7, orr r7, orr r7, orr r7, $40, $2
orr r7, 40, 2
orr r7, (2 * 20), (1 << 1)
orr r4, r5
orr r4, r5, lsl orr r4, r5, lsr orr r4, r5, lsr orr r4, r5, asr orr r4, r5, ror orr r6, r7, lsl r9
orr r6, r7, lsr r9
orr r6, r7, asr r9
orr r6, r7, ror r9
orr r4, r5, rrx
@ CHECK: orr r4, r5, @ CHECK: orr r4, r5, @ CHECK: orr r4, r5, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r7, r8, @ CHECK: orr r4, r5, r6 @ encoding: [0x06,0x40,0x85,0xe1]
@ CHECK: orr r4, r5, r6, lsl @ CHECK: orr r4, r5, r6, lsr @ CHECK: orr r4, r5, r6, lsr @ CHECK: orr r4, r5, r6, asr @ CHECK: orr r4, r5, r6, ror @ CHECK: orr r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x87,0xe1]
@ CHECK: orr r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x87,0xe1]
@ CHECK: orr r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x87,0xe1]
@ CHECK: orr r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0xe1]
@ CHECK: orr r4, r5, r6, rrx @ encoding: [0x66,0x40,0x85,0xe1]
@ CHECK: orr r5, r5, @ CHECK: orr r5, r5, @ CHECK: orr r5, r5, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r7, r7, @ CHECK: orr r4, r4, r5 @ encoding: [0x05,0x40,0x84,0xe1]
@ CHECK: orr r4, r4, r5, lsl @ CHECK: orr r4, r4, r5, lsr @ CHECK: orr r4, r4, r5, lsr @ CHECK: orr r4, r4, r5, asr @ CHECK: orr r4, r4, r5, ror @ CHECK: orr r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x86,0xe1]
@ CHECK: orr r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x86,0xe1]
@ CHECK: orr r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0xe1]
@ CHECK: orr r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x86,0xe1]
@ CHECK: orr r4, r4, r5, rrx @ encoding: [0x65,0x40,0x84,0xe1]
orrseq r4, r5, orrne r4, r5, r6
orrseq r4, r5, r6, lsl orrlo r6, r7, r8, ror r9
orrshi r4, r5, r6, rrx
orrcs r5, orrseq r4, r5
orrne r6, r7, asr r9
orrslt r6, r7, ror r9
orrsgt r4, r5, rrx
@ CHECK: orrseq r4, r5, @ CHECK: orrne r4, r5, r6 @ encoding: [0x06,0x40,0x85,0x11]
@ CHECK: orrseq r4, r5, r6, lsl @ CHECK: orrlo r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x87,0x31]
@ CHECK: orrshi r4, r5, r6, rrx @ encoding: [0x66,0x40,0x95,0x81]
@ CHECK: orrhs r5, r5, @ CHECK: orrseq r4, r4, r5 @ encoding: [0x05,0x40,0x94,0x01]
@ CHECK: orrne r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x86,0x11]
@ CHECK: orrslt r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x96,0xb1]
@ CHECK: orrsgt r4, r4, r5, rrx @ encoding: [0x65,0x40,0x94,0xc1]
@ Test right shift by 32, which is encoded as 0
orr r3, r1, r2, lsr orr r3, r1, r2, asr @ CHECK: orr r3, r1, r2, lsr @ CHECK: orr r3, r1, r2, asr
@------------------------------------------------------------------------------
@ PKH
@------------------------------------------------------------------------------
pkhbt r2, r2, r3
pkhbt r2, r2, r3, lsl pkhbt r2, r2, r3, lsl pkhbt r2, r2, r3, lsl
pkhtb r2, r2, r3
pkhtb r2, r2, r3, asr pkhtb r2, r2, r3, asr
@ CHECK: pkhbt r2, r2, r3 @ encoding: [0x13,0x20,0x82,0xe6]
@ CHECK: pkhbt r2, r2, r3, lsl @ CHECK: pkhbt r2, r2, r3 @ encoding: [0x13,0x20,0x82,0xe6]
@ CHECK: pkhbt r2, r2, r3, lsl
@ CHECK: pkhbt r2, r3, r2 @ encoding: [0x12,0x20,0x83,0xe6]
@ CHECK: pkhtb r2, r2, r3, asr @ CHECK: pkhtb r2, r2, r3, asr
@------------------------------------------------------------------------------
@ FIXME: PLD
@------------------------------------------------------------------------------
@------------------------------------------------------------------------------
@ FIXME: PLI
@------------------------------------------------------------------------------
@------------------------------------------------------------------------------
@ POP
@------------------------------------------------------------------------------
pop {r7}
pop {r7, r8, r9, r10}
@ CHECK: pop {r7} @ encoding: [0x04,0x70,0x9d,0xe4]
@ CHECK: pop {r7, r8, r9, r10} @ encoding: [0x80,0x07,0xbd,0xe8]
@------------------------------------------------------------------------------
@ PUSH
@------------------------------------------------------------------------------
push {r7}
push {r7, r8, r9, r10}
@ CHECK: push {r7} @ encoding: [0x04,0x70,0x2d,0xe5]
@ CHECK: push {r7, r8, r9, r10} @ encoding: [0x80,0x07,0x2d,0xe9]
@------------------------------------------------------------------------------
@ QADD/QADD16/QADD8
@------------------------------------------------------------------------------
qadd r1, r2, r3
qaddne r1, r2, r3
qadd16 r1, r2, r3
qadd16gt r1, r2, r3
qadd8 r1, r2, r3
qadd8le r1, r2, r3
@ CHECK: qadd r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1]
@ CHECK: qaddne r1, r2, r3 @ encoding: [0x52,0x10,0x03,0x11]
@ CHECK: qadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xe6]
@ CHECK: qadd16gt r1, r2, r3 @ encoding: [0x13,0x1f,0x22,0xc6]
@ CHECK: qadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x22,0xe6]
@ CHECK: qadd8le r1, r2, r3 @ encoding: [0x93,0x1f,0x22,0xd6]
@------------------------------------------------------------------------------
@ QDADD/QDSUB
@------------------------------------------------------------------------------
qdadd r6, r7, r8
qdaddhi r6, r7, r8
qdsub r6, r7, r8
qdsubhi r6, r7, r8
@ CHECK: qdadd r6, r7, r8 @ encoding: [0x57,0x60,0x48,0xe1]
@ CHECK: qdaddhi r6, r7, r8 @ encoding: [0x57,0x60,0x48,0x81]
@ CHECK: qdsub r6, r7, r8 @ encoding: [0x57,0x60,0x68,0xe1]
@ CHECK: qdsubhi r6, r7, r8 @ encoding: [0x57,0x60,0x68,0x81]
@------------------------------------------------------------------------------
@ QSAX
@------------------------------------------------------------------------------
qsax r9, r12, r0
qsaxeq r9, r12, r0
@ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
@ CHECK: qsaxeq r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0x06]
@------------------------------------------------------------------------------
@ QSUB/QSUB16/QSUB8
@------------------------------------------------------------------------------
qsub r1, r2, r3
qsubne r1, r2, r3
qsub16 r1, r2, r3
qsub16gt r1, r2, r3
qsub8 r1, r2, r3
qsub8le r1, r2, r3
@ CHECK: qsub r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1]
@ CHECK: qsubne r1, r2, r3 @ encoding: [0x52,0x10,0x23,0x11]
@ CHECK: qsub16 r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xe6]
@ CHECK: qsub16gt r1, r2, r3 @ encoding: [0x73,0x1f,0x22,0xc6]
@ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6]
@ CHECK: qsub8le r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xd6]
@------------------------------------------------------------------------------
@ RBIT
@------------------------------------------------------------------------------
rbit r1, r2
rbitne r1, r2
@ CHECK: rbit r1, r2 @ encoding: [0x32,0x1f,0xff,0xe6]
@ CHECK: rbitne r1, r2 @ encoding: [0x32,0x1f,0xff,0x16]
@------------------------------------------------------------------------------
@ REV/REV16/REVSH
@------------------------------------------------------------------------------
rev r1, r9
revne r1, r5
rev16 r8, r3
rev16ne r12, r4
revsh r4, r9
revshne r9, r1
@ CHECK: rev r1, r9 @ encoding: [0x39,0x1f,0xbf,0xe6]
@ CHECK: revne r1, r5 @ encoding: [0x35,0x1f,0xbf,0x16]
@ CHECK: rev16 r8, r3 @ encoding: [0xb3,0x8f,0xbf,0xe6]
@ CHECK: rev16ne r12, r4 @ encoding: [0xb4,0xcf,0xbf,0x16]
@ CHECK: revsh r4, r9 @ encoding: [0xb9,0x4f,0xff,0xe6]
@ CHECK: revshne r9, r1 @ encoding: [0xb1,0x9f,0xff,0x16]
@------------------------------------------------------------------------------
@ RFE
@------------------------------------------------------------------------------
rfeda r2
rfedb r3
rfeia r5
rfeib r6
rfeda r4!
rfedb r7!
rfeia r9!
rfeib r8!
rfefa r2
rfeea r3
rfefd r5
rfeed r6
rfefa r4!
rfeea r7!
rfefd r9!
rfeed r8!
rfe r1
rfe r1!
@ CHECK: rfeda r2 @ encoding: [0x00,0x0a,0x12,0xf8]
@ CHECK: rfedb r3 @ encoding: [0x00,0x0a,0x13,0xf9]
@ CHECK: rfeia r5 @ encoding: [0x00,0x0a,0x95,0xf8]
@ CHECK: rfeib r6 @ encoding: [0x00,0x0a,0x96,0xf9]
@ CHECK: rfeda r4! @ encoding: [0x00,0x0a,0x34,0xf8]
@ CHECK: rfedb r7! @ encoding: [0x00,0x0a,0x37,0xf9]
@ CHECK: rfeia r9! @ encoding: [0x00,0x0a,0xb9,0xf8]
@ CHECK: rfeib r8! @ encoding: [0x00,0x0a,0xb8,0xf9]
@ CHECK: rfeda r2 @ encoding: [0x00,0x0a,0x12,0xf8]
@ CHECK: rfedb r3 @ encoding: [0x00,0x0a,0x13,0xf9]
@ CHECK: rfeia r5 @ encoding: [0x00,0x0a,0x95,0xf8]
@ CHECK: rfeib r6 @ encoding: [0x00,0x0a,0x96,0xf9]
@ CHECK: rfeda r4! @ encoding: [0x00,0x0a,0x34,0xf8]
@ CHECK: rfedb r7! @ encoding: [0x00,0x0a,0x37,0xf9]
@ CHECK: rfeia r9! @ encoding: [0x00,0x0a,0xb9,0xf8]
@ CHECK: rfeib r8! @ encoding: [0x00,0x0a,0xb8,0xf9]
@ CHECK: rfeia r1 @ encoding: [0x00,0x0a,0x91,0xf8]
@ CHECK: rfeia r1! @ encoding: [0x00,0x0a,0xb1,0xf8]
@------------------------------------------------------------------------------
@ ROR
@------------------------------------------------------------------------------
ror r2, r4, ror r2, r4, ror r2, r4, ror r4,
@ CHECK: ror r2, r4, @ CHECK: ror r2, r4, @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1]
@ CHECK: ror r4, r4,
@------------------------------------------------------------------------------
@ RSB
@------------------------------------------------------------------------------
rsb r4, r5, rsb r4, r5, $0xf000
rsb r4, r5, 0xf000
rsb r7, r8, rsb r7, r8, rsb r7, r8, rsb r7, r8, rsb r7, r8, $40, $2
rsb r7, r8, 40, 2
rsb r7, r8, (2 * 20), (1 << 1)
rsb r4, r5, r6
rsb r4, r5, r6, lsl rsblo r4, r5, r6, lsr rsb r4, r5, r6, lsr rsb r4, r5, r6, asr rsb r4, r5, r6, ror rsb r6, r7, r8, lsl r9
rsb r6, r7, r8, lsr r9
rsb r6, r7, r8, asr r9
rsble r6, r7, r8, ror r9
rsb r4, r5, r6, rrx
@ destination register is optional
rsb r5, rsb r5, $0xf000
rsb r5, 0xf000
rsb r7, rsb r7, rsb r7, rsb r7, rsb r7, $40, $2
rsb r7, 40, 2
rsb r7, (2 * 20), (1 << 1)
rsb r4, r5
rsb r4, r5, lsl rsb r4, r5, lsr rsbne r4, r5, lsr rsb r4, r5, asr rsb r4, r5, ror rsbgt r6, r7, lsl r9
rsb r6, r7, lsr r9
rsb r6, r7, asr r9
rsb r6, r7, ror r9
rsb r4, r5, rrx
@ CHECK: rsb r4, r5, @ CHECK: rsb r4, r5, @ CHECK: rsb r4, r5, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r7, r8, @ CHECK: rsb r4, r5, r6 @ encoding: [0x06,0x40,0x65,0xe0]
@ CHECK: rsb r4, r5, r6, lsl @ CHECK: rsblo r4, r5, r6, lsr @ CHECK: rsb r4, r5, r6, lsr @ CHECK: rsb r4, r5, r6, asr @ CHECK: rsb r4, r5, r6, ror @ CHECK: rsb r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x67,0xe0]
@ CHECK: rsb r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x67,0xe0]
@ CHECK: rsb r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x67,0xe0]
@ CHECK: rsble r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x67,0xd0]
@ CHECK: rsb r4, r5, r6, rrx @ encoding: [0x66,0x40,0x65,0xe0]
@ CHECK: rsb r5, r5, @ CHECK: rsb r5, r5, @ CHECK: rsb r5, r5, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r7, r7, @ CHECK: rsb r4, r4, r5 @ encoding: [0x05,0x40,0x64,0xe0]
@ CHECK: rsb r4, r4, r5, lsl @ CHECK: rsb r4, r4, r5, lsr @ CHECK: rsbne r4, r4, r5, lsr @ CHECK: rsb r4, r4, r5, asr @ CHECK: rsb r4, r4, r5, ror @ CHECK: rsbgt r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x66,0xc0]
@ CHECK: rsb r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x66,0xe0]
@ CHECK: rsb r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x66,0xe0]
@ CHECK: rsb r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x66,0xe0]
@ CHECK: rsb r4, r4, r5, rrx @ encoding: [0x65,0x40,0x64,0xe0]
@------------------------------------------------------------------------------
@ RSBS
@------------------------------------------------------------------------------
rsbs r7, rsbs r7, $16711680
rsbs r7, 16711680
rsbs r7, rsbs r7, r8, rsbs r7, r8, rsbs r7, r8, rsbs r7, r8, $40, $2
rsbs r7, r8, 40, 2
rsbs r7, r8, (2 * 20), (1 << 1)
@ CHECK: rsbs r7, r7, @ CHECK: rsbs r7, r7, @ CHECK: rsbs r7, r7, @ CHECK: rsbs r7, r7, @ CHECK: rsbs r7, r8, @ CHECK: rsbs r7, r8, @ CHECK: rsbs r7, r8, @ CHECK: rsbs r7, r8, @ CHECK: rsbs r7, r8, @ CHECK: rsbs r7, r8,
@------------------------------------------------------------------------------
@ RSC
@------------------------------------------------------------------------------
rsc r4, r5, rsc r4, r5, $0xf000
rsc r4, r5, 0xf000
rsc r7, r8, rsc r7, r8, rsc r7, r8, rsc r7, r8, rsc r7, r8, $40, $2
rsc r7, r8, 40, 2
rsc r7, r8, (2 * 20), (1 << 1)
rsc r4, r5, r6
rsc r4, r5, r6, lsl rsclo r4, r5, r6, lsr rsc r4, r5, r6, lsr rsc r4, r5, r6, asr rsc r4, r5, r6, ror rsc r6, r7, r8, lsl r9
rsc r6, r7, r8, lsr r9
rsc r6, r7, r8, asr r9
rscle r6, r7, r8, ror r9
rscs r1, r8,
@ destination register is optional
rsc r5, rsc r5, $0xf000
rsc r5, 0xf000
rsc r7, rsc r7, rsc r7, rsc r7, rsc r7, $40, $2
rsc r7, 40, 2
rsc r7, (2 * 20), (1 << 1)
rsc r4, r5
rsc r4, r5, lsl rsc r4, r5, lsr rscne r4, r5, lsr rsc r4, r5, asr rsc r4, r5, ror rscgt r6, r7, lsl r9
rsc r6, r7, lsr r9
rsc r6, r7, asr r9
rsc r6, r7, ror r9
@ CHECK: rsc r4, r5, @ CHECK: rsc r4, r5, @ CHECK: rsc r4, r5, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r7, r8, @ CHECK: rsc r4, r5, r6 @ encoding: [0x06,0x40,0xe5,0xe0]
@ CHECK: rsc r4, r5, r6, lsl @ CHECK: rsclo r4, r5, r6, lsr @ CHECK: rsc r4, r5, r6, lsr @ CHECK: rsc r4, r5, r6, asr @ CHECK: rsc r4, r5, r6, ror @ CHECK: rsc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xe7,0xe0]
@ CHECK: rsc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xe7,0xe0]
@ CHECK: rsc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xe7,0xe0]
@ CHECK: rscle r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xe7,0xd0]
@ CHECK: rscs r1, r8,
@ CHECK: rsc r5, r5, @ CHECK: rsc r5, r5, @ CHECK: rsc r5, r5, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r7, r7, @ CHECK: rsc r4, r4, r5 @ encoding: [0x05,0x40,0xe4,0xe0]
@ CHECK: rsc r4, r4, r5, lsl @ CHECK: rsc r4, r4, r5, lsr @ CHECK: rscne r4, r4, r5, lsr @ CHECK: rsc r4, r4, r5, asr @ CHECK: rsc r4, r4, r5, ror @ CHECK: rscgt r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xe6,0xc0]
@ CHECK: rsc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xe6,0xe0]
@ CHECK: rsc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xe6,0xe0]
@ CHECK: rsc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xe6,0xe0]
@------------------------------------------------------------------------------
@ RRX/RRXS
@------------------------------------------------------------------------------
rrx r0, r1
rrx sp, pc
rrx pc, lr
rrx lr, sp
@ CHECK: rrx r0, r1 @ encoding: [0x61,0x00,0xa0,0xe1]
@ CHECK: rrx sp, pc @ encoding: [0x6f,0xd0,0xa0,0xe1]
@ CHECK: rrx pc, lr @ encoding: [0x6e,0xf0,0xa0,0xe1]
@ CHECK: rrx lr, sp @ encoding: [0x6d,0xe0,0xa0,0xe1]
rrxs r0, r1
rrxs sp, pc
rrxs pc, lr
rrxs lr, sp
@CHECK: rrxs r0, r1 @ encoding: [0x61,0x00,0xb0,0xe1]
@CHECK: rrxs sp, pc @ encoding: [0x6f,0xd0,0xb0,0xe1]
@CHECK: rrxs pc, lr @ encoding: [0x6e,0xf0,0xb0,0xe1]
@CHECK: rrxs lr, sp @ encoding: [0x6d,0xe0,0xb0,0xe1]
@ ------------------------------------------------------------------------------
@ SADD16/SADD8
@------------------------------------------------------------------------------
sadd16 r1, r2, r3
sadd16gt r1, r2, r3
sadd8 r1, r2, r3
sadd8le r1, r2, r3
@ CHECK: sadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xe6]
@ CHECK: sadd16gt r1, r2, r3 @ encoding: [0x13,0x1f,0x12,0xc6]
@ CHECK: sadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xe6]
@ CHECK: sadd8le r1, r2, r3 @ encoding: [0x93,0x1f,0x12,0xd6]
@------------------------------------------------------------------------------
@ SASX
@------------------------------------------------------------------------------
sasx r9, r12, r0
sasxeq r9, r12, r0
@ CHECK: sasx r9, r12, r0 @ encoding: [0x30,0x9f,0x1c,0xe6]
@ CHECK: sasxeq r9, r12, r0 @ encoding: [0x30,0x9f,0x1c,0x06]
@------------------------------------------------------------------------------
@ SBC
@------------------------------------------------------------------------------
sbc r4, r5, sbc r4, r5, $0xf000
sbc r4, r5, 0xf000
sbc r7, r8, sbc r7, r8, sbc r7, r8, sbc r7, r8, sbc r7, r8, $40, $2
sbc r7, r8, 40, 2
sbc r7, r8, (20 * 2), (1 << 1)
sbc r4, r5, r6
sbc r4, r5, r6, lsl sbc r4, r5, r6, lsr sbc r4, r5, r6, lsr sbc r4, r5, r6, asr sbc r4, r5, r6, ror sbc r6, r7, r8, lsl r9
sbc r6, r7, r8, lsr r9
sbc r6, r7, r8, asr r9
sbc r6, r7, r8, ror r9
@ destination register is optional
sbc r5, sbc r5, $0xf000
sbc r5, 0xf000
sbc r7, sbc r7, sbc r7, sbc r7, sbc r7, $40, $2
sbc r7, 40, 2
sbc r7, (20 * 2), (1 << 1)
sbc r4, r5
sbc r4, r5, lsl sbc r4, r5, lsr sbc r4, r5, lsr sbc r4, r5, asr sbc r4, r5, ror sbc r6, r7, lsl r9
sbc r6, r7, lsr r9
sbc r6, r7, asr r9
sbc r6, r7, ror r9
@ CHECK: sbc r4, r5, @ CHECK: sbc r4, r5, @ CHECK: sbc r4, r5, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r7, r8, @ CHECK: sbc r4, r5, r6 @ encoding: [0x06,0x40,0xc5,0xe0]
@ CHECK: sbc r4, r5, r6, lsl @ CHECK: sbc r4, r5, r6, lsr @ CHECK: sbc r4, r5, r6, lsr @ CHECK: sbc r4, r5, r6, asr @ CHECK: sbc r4, r5, r6, ror @ CHECK: sbc r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0xc7,0xe0]
@ CHECK: sbc r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0xc7,0xe0]
@ CHECK: sbc r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0xc7,0xe0]
@ CHECK: sbc r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0xc7,0xe0]
@ CHECK: sbc r5, r5, @ CHECK: sbc r5, r5, @ CHECK: sbc r5, r5, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r7, r7, @ CHECK: sbc r4, r4, r5 @ encoding: [0x05,0x40,0xc4,0xe0]
@ CHECK: sbc r4, r4, r5, lsl @ CHECK: sbc r4, r4, r5, lsr @ CHECK: sbc r4, r4, r5, lsr @ CHECK: sbc r4, r4, r5, asr @ CHECK: sbc r4, r4, r5, ror @ CHECK: sbc r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0xc6,0xe0]
@ CHECK: sbc r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0xc6,0xe0]
@ CHECK: sbc r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0xc6,0xe0]
@ CHECK: sbc r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0xc6,0xe0]
@------------------------------------------------------------------------------
@ SBFX
@------------------------------------------------------------------------------
sbfx r4, r5, sbfxgt r4, r5,
@ CHECK: sbfx r4, r5, @ CHECK: sbfxgt r4, r5,
@------------------------------------------------------------------------------
@ SEL
@------------------------------------------------------------------------------
sel r9, r2, r1
selne r9, r2, r1
@ CHECK: sel r9, r2, r1 @ encoding: [0xb1,0x9f,0x82,0xe6]
@ CHECK: selne r9, r2, r1 @ encoding: [0xb1,0x9f,0x82,0x16]
@------------------------------------------------------------------------------
@ SETEND
@------------------------------------------------------------------------------
setend be
setend BE
setend le
setend LE
@ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1]
@ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1]
@ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1]
@ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1]
@------------------------------------------------------------------------------
@ SEV
@------------------------------------------------------------------------------
sev
seveq
@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3]
@ CHECK: seveq @ encoding: [0x04,0xf0,0x20,0x03]
@------------------------------------------------------------------------------
@ SHADD16/SHADD8
@------------------------------------------------------------------------------
shadd16 r4, r8, r2
shadd16gt r4, r8, r2
shadd8 r4, r8, r2
shadd8gt r4, r8, r2
@ CHECK: shadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xe6]
@ CHECK: shadd16gt r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xc6]
@ CHECK: shadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xe6]
@ CHECK: shadd8gt r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xc6]
@------------------------------------------------------------------------------
@ SHASX
@------------------------------------------------------------------------------
shasx r4, r8, r2
shasxgt r4, r8, r2
@ CHECK: shasx r4, r8, r2 @ encoding: [0x32,0x4f,0x38,0xe6]
@ CHECK: shasxgt r4, r8, r2 @ encoding: [0x32,0x4f,0x38,0xc6]
@------------------------------------------------------------------------------
@ SHSUB16/SHSUB8
@------------------------------------------------------------------------------
shsub16 r4, r8, r2
shsub16gt r4, r8, r2
shsub8 r4, r8, r2
shsub8gt r4, r8, r2
@ CHECK: shsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xe6]
@ CHECK: shsub16gt r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xc6]
@ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6]
@ CHECK: shsub8gt r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xc6]
@------------------------------------------------------------------------------
@ SMLABB/SMLABT/SMLATB/SMLATT
@------------------------------------------------------------------------------
smlabb r3, r1, r9, r0
smlabt r5, r6, r4, r1
smlatb r4, r2, r3, r2
smlatt r8, r3, r8, r4
smlabbge r3, r1, r9, r0
smlabtle r5, r6, r4, r1
smlatbne r4, r2, r3, r2
smlatteq r8, r3, r8, r4
@ CHECK: smlabb r3, r1, r9, r0 @ encoding: [0x81,0x09,0x03,0xe1]
@ CHECK: smlabt r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xe1]
@ CHECK: smlatb r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0xe1]
@ CHECK: smlatt r8, r3, r8, r4 @ encoding: [0xe3,0x48,0x08,0xe1]
@ CHECK: smlabbge r3, r1, r9, r0 @ encoding: [0x81,0x09,0x03,0xa1]
@ CHECK: smlabtle r5, r6, r4, r1 @ encoding: [0xc6,0x14,0x05,0xd1]
@ CHECK: smlatbne r4, r2, r3, r2 @ encoding: [0xa2,0x23,0x04,0x11]
@ CHECK: smlatteq r8, r3, r8, r4 @ encoding: [0xe3,0x48,0x08,0x01]
@------------------------------------------------------------------------------
@ SMLAD/SMLADX
@------------------------------------------------------------------------------
smlad r2, r3, r5, r8
smladx r2, r3, r5, r8
smladeq r2, r3, r5, r8
smladxhi r2, r3, r5, r8
@ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0xe7]
@ CHECK: smladx r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0xe7]
@ CHECK: smladeq r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0x07]
@ CHECK: smladxhi r2, r3, r5, r8 @ encoding: [0x33,0x85,0x02,0x87]
@------------------------------------------------------------------------------
@ SMLAL
@------------------------------------------------------------------------------
smlal r2, r3, r5, r8
smlals r2, r3, r5, r8
smlaleq r2, r3, r5, r8
smlalshi r2, r3, r5, r8
@ CHECK: smlal r2, r3, r5, r8 @ encoding: [0x95,0x28,0xe3,0xe0]
@ CHECK: smlals r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0xe0]
@ CHECK: smlaleq r2, r3, r5, r8 @ encoding: [0x95,0x28,0xe3,0x00]
@ CHECK: smlalshi r2, r3, r5, r8 @ encoding: [0x95,0x28,0xf3,0x80]
@------------------------------------------------------------------------------
@ SMLALBB/SMLALBT/SMLALTB/SMLALTT
@------------------------------------------------------------------------------
smlalbb r3, r1, r9, r0
smlalbt r5, r6, r4, r1
smlaltb r4, r2, r3, r2
smlaltt r8, r3, r8, r4
smlalbbge r3, r1, r9, r0
smlalbtle r5, r6, r4, r1
smlaltbne r4, r2, r3, r2
smlaltteq r8, r3, r8, r4
@ CHECK: smlalbb r3, r1, r9, r0 @ encoding: [0x89,0x30,0x41,0xe1]
@ CHECK: smlalbt r5, r6, r4, r1 @ encoding: [0xc4,0x51,0x46,0xe1]
@ CHECK: smlaltb r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0xe1]
@ CHECK: smlaltt r8, r3, r8, r4 @ encoding: [0xe8,0x84,0x43,0xe1]
@ CHECK: smlalbbge r3, r1, r9, r0 @ encoding: [0x89,0x30,0x41,0xa1]
@ CHECK: smlalbtle r5, r6, r4, r1 @ encoding: [0xc4,0x51,0x46,0xd1]
@ CHECK: smlaltbne r4, r2, r3, r2 @ encoding: [0xa3,0x42,0x42,0x11]
@ CHECK: smlaltteq r8, r3, r8, r4 @ encoding: [0xe8,0x84,0x43,0x01]
@------------------------------------------------------------------------------
@ SMLALD/SMLALDX
@------------------------------------------------------------------------------
smlald r2, r3, r5, r8
smlaldx r2, r3, r5, r8
smlaldeq r2, r3, r5, r8
smlaldxhi r2, r3, r5, r8
@ CHECK: smlald r2, r3, r5, r8 @ encoding: [0x15,0x28,0x43,0xe7]
@ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0x35,0x28,0x43,0xe7]
@ CHECK: smlaldeq r2, r3, r5, r8 @ encoding: [0x15,0x28,0x43,0x07]
@ CHECK: smlaldxhi r2, r3, r5, r8 @ encoding: [0x35,0x28,0x43,0x87]
@------------------------------------------------------------------------------
@ SMLAWB/SMLAWT
@------------------------------------------------------------------------------
smlawb r2, r3, r10, r8
smlawt r8, r3, r5, r9
smlawbeq r2, r7, r5, r8
smlawthi r1, r3, r0, r8
@ CHECK: smlawb r2, r3, r10, r8 @ encoding: [0x83,0x8a,0x22,0xe1]
@ CHECK: smlawt r8, r3, r5, r9 @ encoding: [0xc3,0x95,0x28,0xe1]
@ CHECK: smlawbeq r2, r7, r5, r8 @ encoding: [0x87,0x85,0x22,0x01]
@ CHECK: smlawthi r1, r3, r0, r8 @ encoding: [0xc3,0x80,0x21,0x81]
@------------------------------------------------------------------------------
@ SMLSD/SMLSDX
@------------------------------------------------------------------------------
smlsd r2, r3, r5, r8
smlsdx r2, r3, r5, r8
smlsdeq r2, r3, r5, r8
smlsdxhi r2, r3, r5, r8
@ CHECK: smlsd r2, r3, r5, r8 @ encoding: [0x53,0x85,0x02,0xe7]
@ CHECK: smlsdx r2, r3, r5, r8 @ encoding: [0x73,0x85,0x02,0xe7]
@ CHECK: smlsdeq r2, r3, r5, r8 @ encoding: [0x53,0x85,0x02,0x07]
@ CHECK: smlsdxhi r2, r3, r5, r8 @ encoding: [0x73,0x85,0x02,0x87]
@------------------------------------------------------------------------------
@ SMLSLD/SMLSLDX
@------------------------------------------------------------------------------
smlsld r2, r9, r5, r1
smlsldx r4, r11, r2, r8
smlsldeq r8, r2, r5, r6
smlsldxhi r1, r0, r3, r8
@ CHECK: smlsld r2, r9, r5, r1 @ encoding: [0x55,0x21,0x49,0xe7]
@ CHECK: smlsldx r4, r11, r2, r8 @ encoding: [0x72,0x48,0x4b,0xe7]
@ CHECK: smlsldeq r8, r2, r5, r6 @ encoding: [0x55,0x86,0x42,0x07]
@ CHECK: smlsldxhi r1, r0, r3, r8 @ encoding: [0x73,0x18,0x40,0x87]
@------------------------------------------------------------------------------
@ SMMLA/SMMLAR
@------------------------------------------------------------------------------
smmla r1, r2, r3, r4
smmlar r4, r3, r2, r1
smmlalo r1, r2, r3, r4
smmlarcs r4, r3, r2, r1
@ CHECK: smmla r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0xe7]
@ CHECK: smmlar r4, r3, r2, r1 @ encoding: [0x33,0x12,0x54,0xe7]
@ CHECK: smmlalo r1, r2, r3, r4 @ encoding: [0x12,0x43,0x51,0x37]
@ CHECK: smmlarhs r4, r3, r2, r1 @ encoding: [0x33,0x12,0x54,0x27]
@------------------------------------------------------------------------------
@ SMMLS/SMMLSR
@------------------------------------------------------------------------------
smmls r1, r2, r3, r4
smmlsr r4, r3, r2, r1
smmlslo r1, r2, r3, r4
smmlsrcs r4, r3, r2, r1
@ CHECK: smmls r1, r2, r3, r4 @ encoding: [0xd2,0x43,0x51,0xe7]
@ CHECK: smmlsr r4, r3, r2, r1 @ encoding: [0xf3,0x12,0x54,0xe7]
@ CHECK: smmlslo r1, r2, r3, r4 @ encoding: [0xd2,0x43,0x51,0x37]
@ CHECK: smmlsrhs r4, r3, r2, r1 @ encoding: [0xf3,0x12,0x54,0x27]
@------------------------------------------------------------------------------
@ SMMUL/SMMULR
@------------------------------------------------------------------------------
smmul r2, r3, r4
smmulr r3, r2, r1
smmulcc r2, r3, r4
smmulrhs r3, r2, r1
@ CHECK: smmul r2, r3, r4 @ encoding: [0x13,0xf4,0x52,0xe7]
@ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
@ CHECK: smmullo r2, r3, r4 @ encoding: [0x13,0xf4,0x52,0x37]
@ CHECK: smmulrhs r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0x27]
@------------------------------------------------------------------------------
@ SMUAD/SMUADX
@------------------------------------------------------------------------------
smuad r2, r3, r4
smuadx r3, r2, r1
smuadlt r2, r3, r4
smuadxge r3, r2, r1
@ CHECK: smuad r2, r3, r4 @ encoding: [0x13,0xf4,0x02,0xe7]
@ CHECK: smuadx r3, r2, r1 @ encoding: [0x32,0xf1,0x03,0xe7]
@ CHECK: smuadlt r2, r3, r4 @ encoding: [0x13,0xf4,0x02,0xb7]
@ CHECK: smuadxge r3, r2, r1 @ encoding: [0x32,0xf1,0x03,0xa7]
@------------------------------------------------------------------------------
@ SMULBB/SMULBT/SMULTB/SMULTT
@------------------------------------------------------------------------------
smulbb r3, r9, r0
smulbt r5, r4, r1
smultb r4, r2, r2
smultt r8, r3, r4
smulbbge r1, r9, r0
smulbtle r5, r6, r4
smultbne r2, r3, r2
smultteq r8, r3, r4
@ CHECK: smulbb r3, r9, r0 @ encoding: [0x89,0x00,0x63,0xe1]
@ CHECK: smulbt r5, r4, r1 @ encoding: [0xc4,0x01,0x65,0xe1]
@ CHECK: smultb r4, r2, r2 @ encoding: [0xa2,0x02,0x64,0xe1]
@ CHECK: smultt r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0xe1]
@ CHECK: smulbbge r1, r9, r0 @ encoding: [0x89,0x00,0x61,0xa1]
@ CHECK: smulbtle r5, r6, r4 @ encoding: [0xc6,0x04,0x65,0xd1]
@ CHECK: smultbne r2, r3, r2 @ encoding: [0xa3,0x02,0x62,0x11]
@ CHECK: smultteq r8, r3, r4 @ encoding: [0xe3,0x04,0x68,0x01]
@------------------------------------------------------------------------------
@ SMULL
@------------------------------------------------------------------------------
smull r3, r9, r0, r1
smulls r3, r9, r0, r2
smulleq r8, r3, r4, r5
smullseq r8, r3, r4, r3
@ CHECK: smull r3, r9, r0, r1 @ encoding: [0x90,0x31,0xc9,0xe0]
@ CHECK: smulls r3, r9, r0, r2 @ encoding: [0x90,0x32,0xd9,0xe0]
@ CHECK: smulleq r8, r3, r4, r5 @ encoding: [0x94,0x85,0xc3,0x00]
@ CHECK: smullseq r8, r3, r4, r3 @ encoding: [0x94,0x83,0xd3,0x00]
@------------------------------------------------------------------------------
@ SMULWB/SMULWT
@------------------------------------------------------------------------------
smulwb r3, r9, r0
smulwt r3, r9, r2
@ CHECK: smulwb r3, r9, r0 @ encoding: [0xa9,0x00,0x23,0xe1]
@ CHECK: smulwt r3, r9, r2 @ encoding: [0xe9,0x02,0x23,0xe1]
@------------------------------------------------------------------------------
@ SMUSD/SMUSDX
@------------------------------------------------------------------------------
smusd r3, r0, r1
smusdx r3, r9, r2
smusdeq r8, r3, r2
smusdxne r7, r4, r3
@ CHECK: smusd r3, r0, r1 @ encoding: [0x50,0xf1,0x03,0xe7]
@ CHECK: smusdx r3, r9, r2 @ encoding: [0x79,0xf2,0x03,0xe7]
@ CHECK: smusdeq r8, r3, r2 @ encoding: [0x53,0xf2,0x08,0x07]
@ CHECK: smusdxne r7, r4, r3 @ encoding: [0x74,0xf3,0x07,0x17]
@------------------------------------------------------------------------------
@ SRS
@------------------------------------------------------------------------------
srsda sp, srsdb sp, srsia sp, srsib sp,
srsda sp!, srsdb sp!, srsia sp!, srsib sp!,
srsfa sp, srsea sp, srsfd sp, srsed sp,
srsfa sp!, srsea sp!, srsfd sp!, srsed sp!,
srs sp, srs sp!,
@ CHECK: srsda sp, @ CHECK: srsdb sp, @ CHECK: srsia sp, @ CHECK: srsib sp,
@ CHECK: srsda sp!, @ CHECK: srsdb sp!, @ CHECK: srsia sp!, @ CHECK: srsib sp!,
@ CHECK: srsib sp, @ CHECK: srsia sp, @ CHECK: srsdb sp, @ CHECK: srsda sp,
@ CHECK: srsib sp!, @ CHECK: srsia sp!, @ CHECK: srsdb sp!, @ CHECK: srsda sp!,
@ CHECK: srsia sp, @ CHECK: srsia sp!,
@ Compatibility aliases.
srsda srsdb srsia srsib
srsda srsdb srsia srsib
srsfa srsea srsfd srsed
srsfa srsea srsfd srsed
srs srs
@ CHECK: srsda sp, @ CHECK: srsdb sp, @ CHECK: srsia sp, @ CHECK: srsib sp, @ CHECK: srsda sp!, @ CHECK: srsdb sp!, @ CHECK: srsia sp!, @ CHECK: srsib sp!, @ CHECK: srsib sp, @ CHECK: srsia sp, @ CHECK: srsdb sp, @ CHECK: srsda sp, @ CHECK: srsib sp!, @ CHECK: srsia sp!, @ CHECK: srsdb sp!, @ CHECK: srsda sp!, @ CHECK: srsia sp, @ CHECK: srsia sp!,
@------------------------------------------------------------------------------
@ SSAT
@------------------------------------------------------------------------------
ssat r8, ssat r8, ssat r8, ssat r8, ssat r8,
@ CHECK: ssat r8, @ CHECK: ssat r8, @ CHECK: ssat r8, @ CHECK: ssat r8, @ CHECK: ssat r8,
@------------------------------------------------------------------------------
@ SSAT16
@------------------------------------------------------------------------------
ssat16 r2, ssat16 r3,
@ CHECK: ssat16 r2, @ CHECK: ssat16 r3,
@------------------------------------------------------------------------------
@ SSAX
@------------------------------------------------------------------------------
ssax r2, r3, r4
ssaxlt r2, r3, r4
@ CHECK: ssax r2, r3, r4 @ encoding: [0x54,0x2f,0x13,0xe6]
@ CHECK: ssaxlt r2, r3, r4 @ encoding: [0x54,0x2f,0x13,0xb6]
@------------------------------------------------------------------------------
@ SSUB16/SSUB8
@------------------------------------------------------------------------------
ssub16 r1, r0, r6
ssub16ne r5, r3, r2
ssub8 r9, r2, r4
ssub8eq r5, r1, r2
@ CHECK: ssub16 r1, r0, r6 @ encoding: [0x76,0x1f,0x10,0xe6]
@ CHECK: ssub16ne r5, r3, r2 @ encoding: [0x72,0x5f,0x13,0x16]
@ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6]
@ CHECK: ssub8eq r5, r1, r2 @ encoding: [0xf2,0x5f,0x11,0x06]
@------------------------------------------------------------------------------
@ STC{L}/STC2{L}
@------------------------------------------------------------------------------
stc2 p0, c8, [r1, stc2 p1, c7, [r2]
stc2 p2, c6, [r3, stc2 p3, c5, [r4, stc2 p4, c4, [r5], stc2 p5, c3, [r6], stc2l p6, c2, [r7, stc2l p7, c1, [r8]
stc2l p8, c0, [r9, stc2l p9, c1, [r10, stc2l p0, c2, [r11], stc2l p1, c3, [r12],
stc p12, c4, [r0, stc p13, c5, [r1]
stc p14, c6, [r2, stc p15, c7, [r3, stc p5, c8, [r4], stc p4, c9, [r5], stcl p3, c10, [r6, stcl p2, c11, [r7]
stcl p1, c12, [r8, stcl p0, c13, [r9, stcl p6, c14, [r10], stcl p7, c15, [r11],
stclo p12, c4, [r0, stchi p13, c5, [r1]
stccs p14, c6, [r2, stccc p15, c7, [r3, stceq p5, c8, [r4], stcgt p4, c9, [r5], stcllt p3, c10, [r6, stclge p2, c11, [r7]
stclle p1, c12, [r8, stclne p0, c13, [r9, stcleq p6, c14, [r10], stclhi p7, c15, [r11],
stc2 p2, c8, [r1], { 25 }
@ CHECK: stc2 p0, c8, [r1, @ CHECK: stc2 p1, c7, [r2] @ encoding: [0x00,0x71,0x82,0xfd]
@ CHECK: stc2 p2, c6, [r3, @ CHECK: stc2 p3, c5, [r4, @ CHECK: stc2 p4, c4, [r5], @ CHECK: stc2 p5, c3, [r6], @ CHECK: stc2l p6, c2, [r7, @ CHECK: stc2l p7, c1, [r8] @ encoding: [0x00,0x17,0xc8,0xfd]
@ CHECK: stc2l p8, c0, [r9, @ CHECK: stc2l p9, c1, [r10, @ CHECK: stc2l p0, c2, [r11], @ CHECK: stc2l p1, c3, [r12],
@ CHECK: stc p12, c4, [r0, @ CHECK: stc p13, c5, [r1] @ encoding: [0x00,0x5d,0x81,0xed]
@ CHECK: stc p14, c6, [r2, @ CHECK: stc p15, c7, [r3, @ CHECK: stc p5, c8, [r4], @ CHECK: stc p4, c9, [r5], @ CHECK: stcl p3, c10, [r6, @ CHECK: stcl p2, c11, [r7] @ encoding: [0x00,0xb2,0xc7,0xed]
@ CHECK: stcl p1, c12, [r8, @ CHECK: stcl p0, c13, [r9, @ CHECK: stcl p6, c14, [r10], @ CHECK: stcl p7, c15, [r11],
@ CHECK: stclo p12, c4, [r0, @ CHECK: stchi p13, c5, [r1] @ encoding: [0x00,0x5d,0x81,0x8d]
@ CHECK: stchs p14, c6, [r2, @ CHECK: stclo p15, c7, [r3, @ CHECK: stceq p5, c8, [r4], @ CHECK: stcgt p4, c9, [r5], @ CHECK: stcllt p3, c10, [r6, @ CHECK: stclge p2, c11, [r7] @ encoding: [0x00,0xb2,0xc7,0xad]
@ CHECK: stclle p1, c12, [r8, @ CHECK: stclne p0, c13, [r9, @ CHECK: stcleq p6, c14, [r10], @ CHECK: stclhi p7, c15, [r11],
@ CHECK: stc2 p2, c8, [r1], {25} @ encoding: [0x19,0x82,0x81,0xfc]
@------------------------------------------------------------------------------
@ STM*
@------------------------------------------------------------------------------
stm r2, {r1,r3-r6,sp}
stmia r3, {r1,r3-r6,lr}
stmib r4, {r1,r3-r6,sp}
stmda r5, {r1,r3-r6,sp}
stmdb r6, {r1,r3-r6,r8}
stmfd sp, {r1,r3-r6,sp}
@ with update
stm r8!, {r1,r3-r6,sp}
stmib r9!, {r1,r3-r6,sp}
stmda sp!, {r1,r3-r6}
stmdb r0!, {r1,r5,r7,sp}
@ CHECK: stm r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8]
@ CHECK: stm r3, {r1, r3, r4, r5, r6, lr} @ encoding: [0x7a,0x40,0x83,0xe8]
@ CHECK: stmib r4, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x84,0xe9]
@ CHECK: stmda r5, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x05,0xe8]
@ CHECK: stmdb r6, {r1, r3, r4, r5, r6, r8} @ encoding: [0x7a,0x01,0x06,0xe9]
@ CHECK: stmdb sp, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x0d,0xe9]
@ CHECK: stm r8!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa8,0xe8]
@ CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa9,0xe9]
@ CHECK: stmda sp!, {r1, r3, r4, r5, r6} @ encoding: [0x7a,0x00,0x2d,0xe8]
@ CHECK: stmdb r0!, {r1, r5, r7, sp} @ encoding: [0xa2,0x20,0x20,0xe9]
@------------------------------------------------------------------------------
@ STREX/STREXB/STREXH/STREXD
@------------------------------------------------------------------------------
strexb r1, r3, [r4]
strexh r4, r2, [r5]
strex r2, r1, [r7]
strexd r6, r2, r3, [r8]
@ CHECK: strexb r1, r3, [r4] @ encoding: [0x93,0x1f,0xc4,0xe1]
@ CHECK: strexh r4, r2, [r5] @ encoding: [0x92,0x4f,0xe5,0xe1]
@ CHECK: strex r2, r1, [r7] @ encoding: [0x91,0x2f,0x87,0xe1]
@ CHECK: strexd r6, r2, r3, [r8] @ encoding: [0x92,0x6f,0xa8,0xe1]
@------------------------------------------------------------------------------
@ STR
@------------------------------------------------------------------------------
strpl r3, [r10, strpl r3, [r10,
@ CHECK: strpl r3, [r10, @ CHECK: strpl r3, [r10,
@------------------------------------------------------------------------------
@ SUB
@------------------------------------------------------------------------------
sub r4, r5, sub r4, r5, $0xf000
sub r4, r5, 0xf000
sub r7, r8, sub r7, r8, sub r7, r8, sub r7, r8, sub r7, r8, $40, $2
sub r7, r8, 40, 2
sub r7, r8, (20 * 2), (1 << 1)
sub r4, r5, r6
sub r4, r5, r6, lsl sub r4, r5, r6, lsr sub r4, r5, r6, lsr sub r4, r5, r6, asr sub r4, r5, r6, ror sub r6, r7, r8, lsl r9
sub r6, r7, r8, lsr r9
sub r6, r7, r8, asr r9
sub r6, r7, r8, ror r9
@ destination register is optional
sub r5, sub r5, $0xf000
sub r5, 0xf000
sub r7, sub r7, sub r7, sub r7, sub r7, $40, $2
sub r7, 40, 2
sub r7, (20 * 2), (1 << 1)
sub r4, r5
sub r4, r5, lsl sub r4, r5, lsr sub r4, r5, lsr sub r4, r5, asr sub r4, r5, ror sub r6, r7, lsl r9
sub r6, r7, lsr r9
sub r6, r7, asr r9
sub r6, r7, ror r9
@ CHECK: sub r4, r5, @ CHECK: sub r4, r5, @ CHECK: sub r4, r5, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r7, r8, @ CHECK: sub r4, r5, r6 @ encoding: [0x06,0x40,0x45,0xe0]
@ CHECK: sub r4, r5, r6, lsl @ CHECK: sub r4, r5, r6, lsr @ CHECK: sub r4, r5, r6, lsr @ CHECK: sub r4, r5, r6, asr @ CHECK: sub r4, r5, r6, ror @ CHECK: sub r6, r7, r8, lsl r9 @ encoding: [0x18,0x69,0x47,0xe0]
@ CHECK: sub r6, r7, r8, lsr r9 @ encoding: [0x38,0x69,0x47,0xe0]
@ CHECK: sub r6, r7, r8, asr r9 @ encoding: [0x58,0x69,0x47,0xe0]
@ CHECK: sub r6, r7, r8, ror r9 @ encoding: [0x78,0x69,0x47,0xe0]
@ CHECK: sub r5, r5, @ CHECK: sub r5, r5, @ CHECK: sub r5, r5, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r7, r7, @ CHECK: sub r4, r4, r5 @ encoding: [0x05,0x40,0x44,0xe0]
@ CHECK: sub r4, r4, r5, lsl @ CHECK: sub r4, r4, r5, lsr @ CHECK: sub r4, r4, r5, lsr @ CHECK: sub r4, r4, r5, asr @ CHECK: sub r4, r4, r5, ror @ CHECK: sub r6, r6, r7, lsl r9 @ encoding: [0x17,0x69,0x46,0xe0]
@ CHECK: sub r6, r6, r7, lsr r9 @ encoding: [0x37,0x69,0x46,0xe0]
@ CHECK: sub r6, r6, r7, asr r9 @ encoding: [0x57,0x69,0x46,0xe0]
@ CHECK: sub r6, r6, r7, ror r9 @ encoding: [0x77,0x69,0x46,0xe0]
@ Test right shift by 32, which is encoded as 0
sub r3, r1, r2, lsr sub r3, r1, r2, asr @ CHECK: sub r3, r1, r2, lsr @ CHECK: sub r3, r1, r2, asr
@------------------------------------------------------------------------------
@ SUBS
@------------------------------------------------------------------------------
subs r7, r8, subs r7, r8, $16711680
subs r7, r8, 16711680
subs r7, r8, subs r7, r8, subs r7, r8, subs r7, r8, subs r7, r8, $40, $2
subs r7, r8, 40, 2
subs r7, r8, (20 * 2), (1 << 1)
@ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8, @ CHECK: subs r7, r8,
@------------------------------------------------------------------------------
@ SVC
@------------------------------------------------------------------------------
svc svc svc
@ CHECK: svc @ CHECK: svc @ CHECK: svc
@------------------------------------------------------------------------------
@ SWP/SWPB
@------------------------------------------------------------------------------
swp r1, r2, [r3]
swp r4, r4, [r6]
swpb r5, r1, [r9]
@ CHECK: swp r1, r2, [r3] @ encoding: [0x92,0x10,0x03,0xe1]
@ CHECK: swp r4, r4, [r6] @ encoding: [0x94,0x40,0x06,0xe1]
@ CHECK: swpb r5, r1, [r9] @ encoding: [0x91,0x50,0x49,0xe1]
@------------------------------------------------------------------------------
@ SXTAB
@------------------------------------------------------------------------------
sxtab r2, r3, r4
sxtab r4, r5, r6, ror sxtablt r6, r2, r9, ror sxtab r5, r1, r4, ror sxtab r7, r8, r3, ror
@ CHECK: sxtab r2, r3, r4 @ encoding: [0x74,0x20,0xa3,0xe6]
@ CHECK: sxtab r4, r5, r6 @ encoding: [0x76,0x40,0xa5,0xe6]
@ CHECK: sxtablt r6, r2, r9, ror @ CHECK: sxtab r5, r1, r4, ror @ CHECK: sxtab r7, r8, r3, ror
@------------------------------------------------------------------------------
@ SXTAB16
@------------------------------------------------------------------------------
sxtab16ge r0, r1, r4
sxtab16 r6, r2, r7, ror sxtab16 r3, r5, r8, ror sxtab16 r3, r2, r1, ror sxtab16eq r1, r2, r3, ror
@ CHECK: sxtab16ge r0, r1, r4 @ encoding: [0x74,0x00,0x81,0xa6]
@ CHECK: sxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0x82,0xe6]
@ CHECK: sxtab16 r3, r5, r8, ror @ CHECK: sxtab16 r3, r2, r1, ror @ CHECK: sxtab16eq r1, r2, r3, ror
@------------------------------------------------------------------------------
@ SXTAH
@------------------------------------------------------------------------------
sxtah r1, r3, r9
sxtahhi r6, r1, r6, ror sxtah r3, r8, r3, ror sxtahlo r2, r2, r4, ror sxtah r9, r3, r3, ror
@ CHECK: sxtah r1, r3, r9 @ encoding: [0x79,0x10,0xb3,0xe6]
@ CHECK: sxtahhi r6, r1, r6 @ encoding: [0x76,0x60,0xb1,0x86]
@ CHECK: sxtah r3, r8, r3, ror @ CHECK: sxtahlo r2, r2, r4, ror @ CHECK: sxtah r9, r3, r3, ror
@------------------------------------------------------------------------------
@ SXTB
@------------------------------------------------------------------------------
sxtbge r2, r4
sxtb r5, r6, ror sxtb r6, r9, ror sxtbcc r5, r1, ror sxtb r8, r3, ror
@ CHECK: sxtbge r2, r4 @ encoding: [0x74,0x20,0xaf,0xa6]
@ CHECK: sxtb r5, r6 @ encoding: [0x76,0x50,0xaf,0xe6]
@ CHECK: sxtb r6, r9, ror @ CHECK: sxtblo r5, r1, ror @ CHECK: sxtb r8, r3, ror
@------------------------------------------------------------------------------
@ SXTB16
@------------------------------------------------------------------------------
sxtb16 r1, r4
sxtb16 r6, r7, ror sxtb16cs r3, r5, ror sxtb16 r3, r1, ror sxtb16ge r2, r3, ror
@ CHECK: sxtb16 r1, r4 @ encoding: [0x74,0x10,0x8f,0xe6]
@ CHECK: sxtb16 r6, r7 @ encoding: [0x77,0x60,0x8f,0xe6]
@ CHECK: sxtb16hs r3, r5, ror @ CHECK: sxtb16 r3, r1, ror @ CHECK: sxtb16ge r2, r3, ror
@------------------------------------------------------------------------------
@ SXTH
@------------------------------------------------------------------------------
sxthne r3, r9
sxth r1, r6, ror sxth r3, r8, ror sxthle r2, r2, ror sxth r9, r3, ror
@ CHECK: sxthne r3, r9 @ encoding: [0x79,0x30,0xbf,0x16]
@ CHECK: sxth r1, r6 @ encoding: [0x76,0x10,0xbf,0xe6]
@ CHECK: sxth r3, r8, ror @ CHECK: sxthle r2, r2, ror @ CHECK: sxth r9, r3, ror
@------------------------------------------------------------------------------
@ TEQ
@------------------------------------------------------------------------------
teq r5, teq r5, $0xf000
teq r5, 0xf000
teq r7, teq r7, teq r7, teq r7, teq r7, $40, $2
teq r7, 40, 2
teq r7, (20 * 2), (1 << 1)
teq r4, r5
teq r4, r5, lsl teq r4, r5, lsr teq r4, r5, lsr teq r4, r5, asr teq r4, r5, ror teq r6, r7, lsl r9
teq r6, r7, lsr r9
teq r6, r7, asr r9
teq r6, r7, ror r9
@ CHECK: teq r5, @ CHECK: teq r5, @ CHECK: teq r5, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r7, @ CHECK: teq r4, r5 @ encoding: [0x05,0x00,0x34,0xe1]
@ CHECK: teq r4, r5, lsl @ CHECK: teq r4, r5, lsr @ CHECK: teq r4, r5, lsr @ CHECK: teq r4, r5, asr @ CHECK: teq r4, r5, ror @ CHECK: teq r6, r7, lsl r9 @ encoding: [0x17,0x09,0x36,0xe1]
@ CHECK: teq r6, r7, lsr r9 @ encoding: [0x37,0x09,0x36,0xe1]
@ CHECK: teq r6, r7, asr r9 @ encoding: [0x57,0x09,0x36,0xe1]
@ CHECK: teq r6, r7, ror r9 @ encoding: [0x77,0x09,0x36,0xe1]
@------------------------------------------------------------------------------
@ TST
@------------------------------------------------------------------------------
tst r5, tst r5, $0xf000
tst r5, 0xf000
tst r7, tst r7, tst r7, tst r7, tst r7, $40, $2
tst r7, 40, 2
tst r7, (20 * 2), (1 << 1)
tst r4, r5
tst r4, r5, lsl tst r4, r5, lsr tst r4, r5, lsr tst r4, r5, asr tst r4, r5, ror tst r6, r7, lsl r9
tst r6, r7, lsr r9
tst r6, r7, asr r9
tst r6, r7, ror r9
@ CHECK: tst r5, @ CHECK: tst r5, @ CHECK: tst r5, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r7, @ CHECK: tst r4, r5 @ encoding: [0x05,0x00,0x14,0xe1]
@ CHECK: tst r4, r5, lsl @ CHECK: tst r4, r5, lsr @ CHECK: tst r4, r5, lsr @ CHECK: tst r4, r5, asr @ CHECK: tst r4, r5, ror @ CHECK: tst r6, r7, lsl r9 @ encoding: [0x17,0x09,0x16,0xe1]
@ CHECK: tst r6, r7, lsr r9 @ encoding: [0x37,0x09,0x16,0xe1]
@ CHECK: tst r6, r7, asr r9 @ encoding: [0x57,0x09,0x16,0xe1]
@ CHECK: tst r6, r7, ror r9 @ encoding: [0x77,0x09,0x16,0xe1]
@------------------------------------------------------------------------------
@ UADD16/UADD8
@------------------------------------------------------------------------------
uadd16 r1, r2, r3
uadd16gt r1, r2, r3
uadd8 r1, r2, r3
uadd8le r1, r2, r3
@ CHECK: uadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x52,0xe6]
@ CHECK: uadd16gt r1, r2, r3 @ encoding: [0x13,0x1f,0x52,0xc6]
@ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
@ CHECK: uadd8le r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xd6]
@------------------------------------------------------------------------------
@ UASX
@------------------------------------------------------------------------------
uasx r9, r12, r0
uasxeq r9, r12, r0
@ CHECK: uasx r9, r12, r0 @ encoding: [0x30,0x9f,0x5c,0xe6]
@ CHECK: uasxeq r9, r12, r0 @ encoding: [0x30,0x9f,0x5c,0x06]
@------------------------------------------------------------------------------
@ UBFX
@------------------------------------------------------------------------------
ubfx r4, r5, ubfxgt r4, r5,
@ CHECK: ubfx r4, r5, @ CHECK: ubfxgt r4, r5,
@------------------------------------------------------------------------------
@ UHADD16/UHADD8
@------------------------------------------------------------------------------
uhadd16 r4, r8, r2
uhadd16gt r4, r8, r2
uhadd8 r4, r8, r2
uhadd8gt r4, r8, r2
@ CHECK: uhadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x78,0xe6]
@ CHECK: uhadd16gt r4, r8, r2 @ encoding: [0x12,0x4f,0x78,0xc6]
@ CHECK: uhadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x78,0xe6]
@ CHECK: uhadd8gt r4, r8, r2 @ encoding: [0x92,0x4f,0x78,0xc6]
@------------------------------------------------------------------------------
@ UHASX
@------------------------------------------------------------------------------
uhasx r4, r8, r2
uhasxgt r4, r8, r2
@ CHECK: uhasx r4, r8, r2 @ encoding: [0x32,0x4f,0x78,0xe6]
@ CHECK: uhasxgt r4, r8, r2 @ encoding: [0x32,0x4f,0x78,0xc6]
@------------------------------------------------------------------------------
@ UHSUB16/UHSUB8
@------------------------------------------------------------------------------
uhsub16 r4, r8, r2
uhsub16gt r4, r8, r2
uhsub8 r4, r8, r2
uhsub8gt r4, r8, r2
@ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
@ CHECK: uhsub16gt r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xc6]
@ CHECK: uhsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x78,0xe6]
@ CHECK: uhsub8gt r4, r8, r2 @ encoding: [0xf2,0x4f,0x78,0xc6]
@------------------------------------------------------------------------------
@ UMAAL
@------------------------------------------------------------------------------
umaal r3, r4, r5, r6
umaallt r3, r4, r5, r6
@ CHECK: umaal r3, r4, r5, r6 @ encoding: [0x95,0x36,0x44,0xe0]
@ CHECK: umaallt r3, r4, r5, r6 @ encoding: [0x95,0x36,0x44,0xb0]
@------------------------------------------------------------------------------
@ UMLAL
@------------------------------------------------------------------------------
umlal r2, r4, r6, r8
umlalgt r6, r1, r2, r6
umlals r2, r9, r2, r3
umlalseq r3, r5, r1, r2
@ CHECK: umlal r2, r4, r6, r8 @ encoding: [0x96,0x28,0xa4,0xe0]
@ CHECK: umlalgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0xa1,0xc0]
@ CHECK: umlals r2, r9, r2, r3 @ encoding: [0x92,0x23,0xb9,0xe0]
@ CHECK: umlalseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0xb5,0x00]
@------------------------------------------------------------------------------
@ UMULL
@------------------------------------------------------------------------------
umull r2, r4, r6, r8
umullgt r6, r1, r2, r6
umulls r2, r9, r2, r3
umullseq r3, r5, r1, r2
@ CHECK: umull r2, r4, r6, r8 @ encoding: [0x96,0x28,0x84,0xe0]
@ CHECK: umullgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0x81,0xc0]
@ CHECK: umulls r2, r9, r2, r3 @ encoding: [0x92,0x23,0x99,0xe0]
@ CHECK: umullseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0x95,0x00]
@------------------------------------------------------------------------------
@ UQADD16/UQADD8
@------------------------------------------------------------------------------
uqadd16 r1, r2, r3
uqadd16gt r4, r7, r9
uqadd8 r3, r4, r8
uqadd8le r8, r1, r2
@ CHECK: uqadd16 r1, r2, r3 @ encoding: [0x13,0x1f,0x62,0xe6]
@ CHECK: uqadd16gt r4, r7, r9 @ encoding: [0x19,0x4f,0x67,0xc6]
@ CHECK: uqadd8 r3, r4, r8 @ encoding: [0x98,0x3f,0x64,0xe6]
@ CHECK: uqadd8le r8, r1, r2 @ encoding: [0x92,0x8f,0x61,0xd6]
@------------------------------------------------------------------------------
@ UQASX
@------------------------------------------------------------------------------
uqasx r2, r4, r1
uqasxhi r5, r2, r9
@ CHECK: uqasx r2, r4, r1 @ encoding: [0x31,0x2f,0x64,0xe6]
@ CHECK: uqasxhi r5, r2, r9 @ encoding: [0x39,0x5f,0x62,0x86]
@------------------------------------------------------------------------------
@ UQSAX
@------------------------------------------------------------------------------
uqsax r1, r3, r7
uqsaxal r3, r6, r2
@ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
@ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
@------------------------------------------------------------------------------
@ UQSUB16/UQSUB8
@------------------------------------------------------------------------------
uqsub16 r1, r5, r3
uqsub16gt r3, r2, r5
uqsub8 r2, r1, r4
uqsub8le r4, r6, r9
@ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
@ CHECK: uqsub16gt r3, r2, r5 @ encoding: [0x75,0x3f,0x62,0xc6]
@ CHECK: uqsub8 r2, r1, r4 @ encoding: [0xf4,0x2f,0x61,0xe6]
@ CHECK: uqsub8le r4, r6, r9 @ encoding: [0xf9,0x4f,0x66,0xd6]
@------------------------------------------------------------------------------
@ USADA8/USAD8
@------------------------------------------------------------------------------
usad8 r2, r1, r4
usad8le r4, r6, r9
usada8 r1, r5, r3, r7
usada8gt r3, r2, r5, r1
@ CHECK: usad8 r2, r1, r4 @ encoding: [0x11,0xf4,0x82,0xe7]
@ CHECK: usad8le r4, r6, r9 @ encoding: [0x16,0xf9,0x84,0xd7]
@ CHECK: usada8 r1, r5, r3, r7 @ encoding: [0x15,0x73,0x81,0xe7]
@ CHECK: usada8gt r3, r2, r5, r1 @ encoding: [0x12,0x15,0x83,0xc7]
@------------------------------------------------------------------------------
@ USAT
@------------------------------------------------------------------------------
usat r8, usat r8, usat r8, usat r8, usat r8,
@ CHECK: usat r8, @ CHECK: usat r8, @ CHECK: usat r8, @ CHECK: usat r8, @ CHECK: usat r8,
@------------------------------------------------------------------------------
@ USAT16
@------------------------------------------------------------------------------
usat16 r2, usat16 r3,
@ CHECK: usat16 r2, @ CHECK: usat16 r3,
@------------------------------------------------------------------------------
@ USAX
@------------------------------------------------------------------------------
usax r2, r3, r4
usaxne r2, r3, r4
@ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
@ CHECK: usaxne r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0x16]
@------------------------------------------------------------------------------
@ USUB16/USUB8
@------------------------------------------------------------------------------
usub16 r4, r2, r7
usub16hi r1, r1, r3
usub8 r1, r8, r5
usub8le r9, r2, r3
@ CHECK: usub16 r4, r2, r7 @ encoding: [0x77,0x4f,0x52,0xe6]
@ CHECK: usub16hi r1, r1, r3 @ encoding: [0x73,0x1f,0x51,0x86]
@ CHECK: usub8 r1, r8, r5 @ encoding: [0xf5,0x1f,0x58,0xe6]
@ CHECK: usub8le r9, r2, r3 @ encoding: [0xf3,0x9f,0x52,0xd6]
@------------------------------------------------------------------------------
@ UXTAB
@------------------------------------------------------------------------------
uxtab r2, r3, r4
uxtab r4, r5, r6, ror uxtablt r6, r2, r9, ror uxtab r5, r1, r4, ror uxtab r7, r8, r3, ror
@ CHECK: uxtab r2, r3, r4 @ encoding: [0x74,0x20,0xe3,0xe6]
@ CHECK: uxtab r4, r5, r6 @ encoding: [0x76,0x40,0xe5,0xe6]
@ CHECK: uxtablt r6, r2, r9, ror @ CHECK: uxtab r5, r1, r4, ror @ CHECK: uxtab r7, r8, r3, ror
@------------------------------------------------------------------------------
@ UXTAB16
@------------------------------------------------------------------------------
uxtab16ge r0, r1, r4
uxtab16 r6, r2, r7, ror uxtab16 r3, r5, r8, ror uxtab16 r3, r2, r1, ror uxtab16eq r1, r2, r3, ror
@ CHECK: uxtab16ge r0, r1, r4 @ encoding: [0x74,0x00,0xc1,0xa6]
@ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0xc2,0xe6]
@ CHECK: uxtab16 r3, r5, r8, ror @ CHECK: uxtab16 r3, r2, r1, ror @ CHECK: uxtab16eq r1, r2, r3, ror
@------------------------------------------------------------------------------
@ UXTAH
@------------------------------------------------------------------------------
uxtah r1, r3, r9
uxtahhi r6, r1, r6, ror uxtah r3, r8, r3, ror uxtahlo r2, r2, r4, ror uxtah r9, r3, r3, ror
@ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
@ CHECK: uxtahhi r6, r1, r6 @ encoding: [0x76,0x60,0xf1,0x86]
@ CHECK: uxtah r3, r8, r3, ror @ CHECK: uxtahlo r2, r2, r4, ror @ CHECK: uxtah r9, r3, r3, ror
@------------------------------------------------------------------------------
@ UXTB
@------------------------------------------------------------------------------
uxtbge r2, r4
uxtb r5, r6, ror uxtb r6, r9, ror uxtbcc r5, r1, ror uxtb r8, r3, ror
@ CHECK: uxtbge r2, r4 @ encoding: [0x74,0x20,0xef,0xa6]
@ CHECK: uxtb r5, r6 @ encoding: [0x76,0x50,0xef,0xe6]
@ CHECK: uxtb r6, r9, ror @ CHECK: uxtblo r5, r1, ror @ CHECK: uxtb r8, r3, ror
@------------------------------------------------------------------------------
@ UXTB16
@------------------------------------------------------------------------------
uxtb16 r1, r4
uxtb16 r6, r7, ror uxtb16cs r3, r5, ror uxtb16 r3, r1, ror uxtb16ge r2, r3, ror
@ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
@ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
@ CHECK: uxtb16hs r3, r5, ror @ CHECK: uxtb16 r3, r1, ror @ CHECK: uxtb16ge r2, r3, ror
@------------------------------------------------------------------------------
@ UXTH
@------------------------------------------------------------------------------
uxthne r3, r9
uxth r1, r6, ror uxth r3, r8, ror uxthle r2, r2, ror uxth r9, r3, ror
@ CHECK: uxthne r3, r9 @ encoding: [0x79,0x30,0xff,0x16]
@ CHECK: uxth r1, r6 @ encoding: [0x76,0x10,0xff,0xe6]
@ CHECK: uxth r3, r8, ror @ CHECK: uxthle r2, r2, ror @ CHECK: uxth r9, r3, ror
@------------------------------------------------------------------------------
@ WFE/WFI/YIELD
@------------------------------------------------------------------------------
wfe
wfehi
wfi
wfilt
yield
yieldne
hint hint hint hint hint hintgt
@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
@ CHECK: wfehi @ encoding: [0x02,0xf0,0x20,0x83]
@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3]
@ CHECK: wfilt @ encoding: [0x03,0xf0,0x20,0xb3]
@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
@ CHECK: yieldne @ encoding: [0x01,0xf0,0x20,0x13]
@ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3]
@ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3]
@ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
@ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
@ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
@ CHECK: hintgt