# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2                       -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK_NOPIC64
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -code-model=large     -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK_LARGE64
#RUN: llc -mtriple=i386-linux-gnu   -mattr=+sse2                       -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK_SMALL32
#RUN: llc -mtriple=i386-linux-gnu   -mattr=+sse2 -code-model=large     -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK_LARGE32
#RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK_PIC64

--- |
  define float @test_float() {
  entry:
    ret float 5.500000e+00
  }

  define double @test_double() {
  entry:
    ret double 5.500000e+00
  }
---
name:            test_float
#
alignment:       16
legalized:       true
regBankSelected: true
tracksRegLiveness: true
registers:
  - { id: 0, class: vecr, preferred-register: '' }
#
#
body:             |
  bb.1.entry:
    ; CHECK_NOPIC64-LABEL: name: test_float
    ; CHECK_NOPIC64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg
    ; CHECK_NOPIC64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
    ; CHECK_NOPIC64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_NOPIC64-NEXT: RET 0, implicit $xmm0
    ; CHECK_LARGE64-LABEL: name: test_float
    ; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
    ; CHECK_LARGE64-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (p0) from constant-pool, align 4)
    ; CHECK_LARGE64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
    ; CHECK_LARGE64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_LARGE64-NEXT: RET 0, implicit $xmm0
    ; CHECK_SMALL32-LABEL: name: test_float
    ; CHECK_SMALL32: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $noreg, 1, $noreg, %const.0, $noreg
    ; CHECK_SMALL32-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
    ; CHECK_SMALL32-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_SMALL32-NEXT: RET 0, implicit $xmm0
    ; CHECK_LARGE32-LABEL: name: test_float
    ; CHECK_LARGE32: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $noreg, 1, $noreg, %const.0, $noreg
    ; CHECK_LARGE32-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
    ; CHECK_LARGE32-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_LARGE32-NEXT: RET 0, implicit $xmm0
    ; CHECK_PIC64-LABEL: name: test_float
    ; CHECK_PIC64: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg
    ; CHECK_PIC64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
    ; CHECK_PIC64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_PIC64-NEXT: RET 0, implicit $xmm0
    %0:vecr(s32) = G_FCONSTANT float 5.500000e+00
    %1:vecr(s128) = G_ANYEXT %0(s32)
    $xmm0 = COPY %1(s128)
    RET 0, implicit $xmm0

...
---
name:            test_double
#
alignment:       16
legalized:       true
regBankSelected: true
tracksRegLiveness: true
#
#
registers:
  - { id: 0, class: vecr, preferred-register: '' }
#
#
body:             |
  bb.1.entry:
    ; CHECK_NOPIC64-LABEL: name: test_double
    ; CHECK_NOPIC64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $rip, 1, $noreg, %const.0, $noreg
    ; CHECK_NOPIC64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
    ; CHECK_NOPIC64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_NOPIC64-NEXT: RET 0, implicit $xmm0
    ; CHECK_LARGE64-LABEL: name: test_double
    ; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
    ; CHECK_LARGE64-NEXT: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (p0) from constant-pool)
    ; CHECK_LARGE64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
    ; CHECK_LARGE64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_LARGE64-NEXT: RET 0, implicit $xmm0
    ; CHECK_SMALL32-LABEL: name: test_double
    ; CHECK_SMALL32: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $noreg, 1, $noreg, %const.0, $noreg
    ; CHECK_SMALL32-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
    ; CHECK_SMALL32-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_SMALL32-NEXT: RET 0, implicit $xmm0
    ; CHECK_LARGE32-LABEL: name: test_double
    ; CHECK_LARGE32: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $noreg, 1, $noreg, %const.0, $noreg
    ; CHECK_LARGE32-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
    ; CHECK_LARGE32-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_LARGE32-NEXT: RET 0, implicit $xmm0
    ; CHECK_PIC64-LABEL: name: test_double
    ; CHECK_PIC64: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt $rip, 1, $noreg, %const.0, $noreg
    ; CHECK_PIC64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
    ; CHECK_PIC64-NEXT: $xmm0 = COPY [[COPY]]
    ; CHECK_PIC64-NEXT: RET 0, implicit $xmm0
    %0:vecr(s64) = G_FCONSTANT double 5.500000e+00
    %1:vecr(s128) = G_ANYEXT %0(s64)
    $xmm0 = COPY %1(s128)
    RET 0, implicit $xmm0

...