nuudlman/llvm: llvm/test/MC/Disassembler/ARM/invalid-thumbv8.1a.txt

# RUN: not llvm-mc -triple thumbv8 -mattr=+v8.1a --disassemble < %s 2>&1 | FileCheck %s

# Check, if sizes 00 and 11 are undefined for RDMA
[0x01,0xff,0x12,0x0b] # vqrdmlah.s8   d0, d1, d2
[0x31,0xff,0x12,0x0b] # vqrdmlah.s64  d0, d1, d2
[0x02,0xff,0x54,0x0b] # vqrdmlah.s8   q0, q1, q2
[0x06,0xff,0x50,0x4b] # vqrdmlah.s64  q2, q3, q0

[0x01,0xff,0x12,0x0c] # vqrdmlsh.s8   d0, d1, d2
[0x31,0xff,0x12,0x0c] # vqrdmlsh.s64  d0, d1, d2
[0x02,0xff,0x54,0x0c] # vqrdmlsh.s8   q0, q1, q2
[0x32,0xff,0x54,0x0c] # vqrdmlsh.s64  q0, q1, q2

# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x01,0xff,0x12,0x0b] # vqrdmlah.s8   d0, d1, d2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x31,0xff,0x12,0x0b] # vqrdmlah.s64  d0, d1, d2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x02,0xff,0x54,0x0b] # vqrdmlah.s8   q0, q1, q2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x06,0xff,0x50,0x4b] # vqrdmlah.s64  q2, q3, q0
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x01,0xff,0x12,0x0c] # vqrdmlsh.s8   d0, d1, d2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x31,0xff,0x12,0x0c] # vqrdmlsh.s64  d0, d1, d2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x02,0xff,0x54,0x0c] # vqrdmlsh.s8   q0, q1, q2
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x32,0xff,0x54,0x0c] # vqrdmlsh.s64  q0, q1, q2
# CHECK-NEXT:  ^

[0x81,0xef,0x42,0x0e] # vqrdmlah.s8   d0, d1, d2[0]
[0xb1,0xef,0x42,0x0e] # vqrdmlah.s64  d0, d1, d2[0]
[0x82,0xff,0x42,0x0e] # vqrdmlah.s8   q0, q1, d2[0]
[0xb2,0xff,0x42,0x0e] # vqrdmlah.s64  q0, q1, d2[0]

[0x81,0xef,0x42,0x0f] # vqrdmlsh.s8   d0, d1, d2[0]
[0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64  d0, d1, d2[0]
[0x82,0xff,0x42,0x0f] # vqrdmlsh.s8   q0, q1, d2[0]
[0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64  q0, q1, d2[0]

# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x81,0xef,0x42,0x0e] # vqrdmlah.s8   d0, d1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0xb1,0xef,0x42,0x0e] # vqrdmlah.s64  d0, d1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x82,0xff,0x42,0x0e] # vqrdmlah.s8   q0, q1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0xb2,0xff,0x42,0x0e] # vqrdmlah.s64  q0, q1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x81,0xef,0x42,0x0f] # vqrdmlsh.s8   d0, d1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0xb1,0xef,0x42,0x0f] # vqrdmlsh.s64  d0, d1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0x82,0xff,0x42,0x0f] # vqrdmlsh.s8   q0, q1, d2[0]
# CHECK-NEXT:  ^
# CHECK:      warning: invalid instruction encoding
# CHECK-NEXT: [0xb2,0xff,0x42,0x0f] # vqrdmlsh.s64  q0, q1, d2[0]
# CHECK-NEXT:  ^