; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s

define signext   i16 @t(ptr %qmatrix, ptr %dct, ptr %acBaseTable, ptr %acExtTable, i16 signext  %acBaseRes, i16 signext  %acMaskRes, i16 signext  %acExtRes, ptr %bitptr, ptr %source, i32 %markerPrefix, ptr %byteptr, i32 %scale, i32 %round, i32 %bits) {
; CHECK-LABEL: t:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT:    .p2align 4, 0x90
; CHECK-NEXT:  .LBB0_1: # %cond_next127
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    movl %eax, %edx
; CHECK-NEXT:    sarl %cl, %edx
; CHECK-NEXT:    incl %edx
; CHECK-NEXT:    cmpl $63, %edx
; CHECK-NEXT:    jb .LBB0_1
; CHECK-NEXT:  # %bb.2: # %UnifiedReturnBlock
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    retl
entry:
	br label %cond_next127

cond_next127:		; preds = %cond_next391, %entry
	%tmp151 = add i32 0, %round		; <i32> [#uses=1]
	%tmp153 = ashr i32 %tmp151, %scale		; <i32> [#uses=1]
	%tmp158 = xor i32 0, %tmp153		; <i32> [#uses=1]
	%tmp160 = or i32 %tmp158, 0		; <i32> [#uses=1]
	%tmp180181 = sext i16 0 to i32		; <i32> [#uses=1]
	%tmp183 = add i32 %tmp160, 1		; <i32> [#uses=1]
	br i1 false, label %cond_true188, label %cond_next245

cond_true188:		; preds = %cond_next127
	ret i16 0

cond_next245:		; preds = %cond_next127
	%tmp253444 = lshr i32 %tmp180181, 4		; <i32> [#uses=1]
	%tmp254 = and i32 %tmp253444, 15		; <i32> [#uses=1]
	br i1 false, label %cond_true267, label %cond_next391

cond_true267:		; preds = %cond_next245
	%tmp269 = load ptr, ptr %byteptr, align 4		; <ptr> [#uses=3]
	%tmp270 = load i8, ptr %tmp269, align 1		; <i8> [#uses=1]
	%tmp270271 = zext i8 %tmp270 to i32		; <i32> [#uses=1]
	%tmp272 = getelementptr i8, ptr %tmp269, i32 1		; <ptr> [#uses=2]
	store ptr %tmp272, ptr %byteptr, align 4
	%tmp276 = load i8, ptr %tmp272, align 1		; <i8> [#uses=1]
	%tmp278 = getelementptr i8, ptr %tmp269, i32 2		; <ptr> [#uses=1]
	store ptr %tmp278, ptr %byteptr, align 4
	%tmp286 = icmp eq i32 %tmp270271, %markerPrefix		; <i1> [#uses=1]
	%cond = icmp eq i8 %tmp276, 0		; <i1> [#uses=1]
	%bothcond = and i1 %tmp286, %cond		; <i1> [#uses=1]
	br i1 %bothcond, label %cond_true294, label %cond_next327

cond_true294:		; preds = %cond_true267
	ret i16 0

cond_next327:		; preds = %cond_true267
	br i1 false, label %cond_true343, label %cond_next391

cond_true343:		; preds = %cond_next327
	%tmp345 = load ptr, ptr %byteptr, align 4		; <ptr> [#uses=1]
	store ptr null, ptr %byteptr, align 4
	store ptr %tmp345, ptr %byteptr, align 4
	br label %cond_next391

cond_next391:		; preds = %cond_true343, %cond_next327, %cond_next245
	%tmp422445 = add i32 %tmp254, %tmp183		; <i32> [#uses=1]
	%tmp429448 = icmp ult i32 %tmp422445, 63		; <i1> [#uses=1]
	br i1 %tmp429448, label %cond_next127, label %UnifiedReturnBlock

UnifiedReturnBlock:		; preds = %cond_next391
	ret i16 0
}