; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -enable-machine-outliner -mtriple=mips-unknown-linux < %s | FileCheck %s ; NOTE: Machine outliner doesn't run. @x = global i32 0, align 4 define dso_local i32 @check_boundaries() #0 { ; CHECK-LABEL: check_boundaries: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $sp, $sp, -32 ; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill ; CHECK-NEXT: sw $fp, 24($sp) # 4-byte Folded Spill ; CHECK-NEXT: .cfi_offset 31, -4 ; CHECK-NEXT: .cfi_offset 30, -8 ; CHECK-NEXT: move $fp, $sp ; CHECK-NEXT: .cfi_def_cfa_register 30 ; CHECK-NEXT: sw $zero, 16($fp) ; CHECK-NEXT: b $BB0_3 ; CHECK-NEXT: sw $zero, 20($fp) ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: addiu $1, $zero, 1 ; CHECK-NEXT: sw $1, 8($fp) ; CHECK-NEXT: lw $1, 16($fp) ; CHECK-NEXT: beqz $1, $BB0_4 ; CHECK-NEXT: nop ; CHECK-NEXT: $BB0_2: ; CHECK-NEXT: addiu $1, $zero, 1 ; CHECK-NEXT: j $BB0_5 ; CHECK-NEXT: sw $1, 8($fp) ; CHECK-NEXT: $BB0_3: ; CHECK-NEXT: addiu $1, $zero, 2 ; CHECK-NEXT: sw $1, 12($fp) ; CHECK-NEXT: addiu $1, $zero, 1 ; CHECK-NEXT: sw $1, 16($fp) ; CHECK-NEXT: addiu $1, $zero, 3 ; CHECK-NEXT: sw $1, 8($fp) ; CHECK-NEXT: addiu $1, $zero, 4 ; CHECK-NEXT: sw $1, 4($fp) ; CHECK-NEXT: lw $1, 16($fp) ; CHECK-NEXT: bnez $1, $BB0_2 ; CHECK-NEXT: nop ; CHECK-NEXT: $BB0_4: ; CHECK-NEXT: addiu $1, $zero, 2 ; CHECK-NEXT: sw $1, 12($fp) ; CHECK-NEXT: addiu $1, $zero, 1 ; CHECK-NEXT: sw $1, 16($fp) ; CHECK-NEXT: addiu $1, $zero, 3 ; CHECK-NEXT: sw $1, 8($fp) ; CHECK-NEXT: addiu $1, $zero, 4 ; CHECK-NEXT: sw $1, 4($fp) ; CHECK-NEXT: $BB0_5: ; CHECK-NEXT: addiu $2, $zero, 0 ; CHECK-NEXT: move $sp, $fp ; CHECK-NEXT: lw $fp, 24($sp) # 4-byte Folded Reload ; CHECK-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $sp, $sp, 32 %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 %4 = alloca i32, align 4 %5 = alloca i32, align 4 store i32 0, i32* %1, align 4 store i32 0, i32* %2, align 4 %6 = load i32, i32* %2, align 4 %7 = icmp ne i32 %6, 0 br i1 %7, label %9, label %8 store i32 1, i32* %2, align 4 store i32 2, i32* %3, align 4 store i32 3, i32* %4, align 4 store i32 4, i32* %5, align 4 br label %10 store i32 1, i32* %4, align 4 br label %10 %11 = load i32, i32* %2, align 4 %12 = icmp ne i32 %11, 0 br i1 %12, label %14, label %13 store i32 1, i32* %2, align 4 store i32 2, i32* %3, align 4 store i32 3, i32* %4, align 4 store i32 4, i32* %5, align 4 br label %15 store i32 1, i32* %4, align 4 br label %15 ret i32 0 } define dso_local i32 @main() #0 { ; CHECK-LABEL: main: ; CHECK: # %bb.0: ; CHECK-NEXT: addiu $sp, $sp, -32 ; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill ; CHECK-NEXT: sw $fp, 24($sp) # 4-byte Folded Spill ; CHECK-NEXT: .cfi_offset 31, -4 ; CHECK-NEXT: .cfi_offset 30, -8 ; CHECK-NEXT: move $fp, $sp ; CHECK-NEXT: .cfi_def_cfa_register 30 ; CHECK-NEXT: lui $1, %hi(x) ; CHECK-NEXT: addiu $2, $zero, 1 ; CHECK-NEXT: sw $2, %lo(x)($1) ; CHECK-NEXT: sw $2, 16($fp) ; CHECK-NEXT: addiu $1, $zero, 2 ; CHECK-NEXT: sw $1, 12($fp) ; CHECK-NEXT: addiu $3, $zero, 3 ; CHECK-NEXT: sw $3, 8($fp) ; CHECK-NEXT: addiu $4, $zero, 4 ; CHECK-NEXT: sw $4, 4($fp) ; CHECK-NEXT: sw $zero, 20($fp) ; CHECK-NEXT: #APP ; CHECK-NEXT: #NO_APP ; CHECK-NEXT: sw $1, 12($fp) ; CHECK-NEXT: sw $2, 16($fp) ; CHECK-NEXT: sw $3, 8($fp) ; CHECK-NEXT: sw $4, 4($fp) ; CHECK-NEXT: addiu $2, $zero, 0 ; CHECK-NEXT: move $sp, $fp ; CHECK-NEXT: lw $fp, 24($sp) # 4-byte Folded Reload ; CHECK-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload ; CHECK-NEXT: jr $ra ; CHECK-NEXT: addiu $sp, $sp, 32 %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 %4 = alloca i32, align 4 %5 = alloca i32, align 4 store i32 0, i32* %1, align 4 store i32 0, i32* @x, align 4 store i32 1, i32* %2, align 4 store i32 2, i32* %3, align 4 store i32 3, i32* %4, align 4 store i32 4, i32* %5, align 4 store i32 1, i32* @x, align 4 call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() store i32 1, i32* %2, align 4 store i32 2, i32* %3, align 4 store i32 3, i32* %4, align 4 store i32 4, i32* %5, align 4 ret i32 0 } attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }