; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
; RUN: llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o -| FileCheck --check-prefix=X86PIC %s
; Tests come from clang/test/CodeGen/ms-inline-asm-variables.c
;
; int gVar;
; void t1() {
; __asm add eax, dword ptr gVar[eax]
; __asm add dword ptr [eax+gVar], eax
; __asm add ebx, dword ptr gVar[271 - 82 + 81 + ebx]
; __asm add dword ptr [ebx + gVar + 828], ebx
; gVar = 3;
; }
;
; void t2(void) {
; int lVar;
; __asm mov eax, dword ptr lVar[eax]
; __asm mov dword ptr [eax+lVar], eax
; __asm mov ebx, dword ptr lVar[271 - 82 + 81 + ebx]
; __asm mov dword ptr [ebx + lVar + 828], ebx
; __asm mov 5 + 8 + 13 + 21[lVar + ebx], eax
; lVar = 2;
; }
@gVar = global i32 0, align 4
; Function Attrs: noinline nounwind optnone uwtable
define void @t1() #0 {
; X86-LABEL: t1:
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: #APP
; X86-EMPTY:
; X86-NEXT: addl gVar(%eax), %eax
; X86-NEXT: addl %eax, gVar(%eax)
; X86-NEXT: addl gVar+270(%ebx), %ebx
; X86-NEXT: addl %ebx, gVar+828(%ebx)
; X86-EMPTY:
; X86-NEXT: #NO_APP
; X86-NEXT: movl $3, gVar
; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: retl
;
; X86PIC-LABEL: t1:
; X86PIC: # %bb.0: # %entry
; X86PIC-NEXT: pushl %ebp
; X86PIC-NEXT: .cfi_def_cfa_offset 8
; X86PIC-NEXT: .cfi_offset %ebp, -8
; X86PIC-NEXT: movl %esp, %ebp
; X86PIC-NEXT: .cfi_def_cfa_register %ebp
; X86PIC-NEXT: pushl %ebx
; X86PIC-NEXT: .cfi_offset %ebx, -12
; X86PIC-NEXT: calll .L0$pb
; X86PIC-NEXT: .L0$pb:
; X86PIC-NEXT: popl %ecx
; X86PIC-NEXT: .Ltmp0:
; X86PIC-NEXT: addl $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %ecx
; X86PIC-NEXT: movl gVar@GOT(%ecx), %edx
; X86PIC-NEXT: #APP
; X86PIC-EMPTY:
; X86PIC-NEXT: addl (%edx,%eax), %eax
; X86PIC-NEXT: addl %eax, (%edx,%eax)
; X86PIC-NEXT: addl 270(%edx,%ebx), %ebx
; X86PIC-NEXT: addl %ebx, 828(%edx,%ebx)
; X86PIC-EMPTY:
; X86PIC-NEXT: #NO_APP
; X86PIC-NEXT: movl gVar@GOT(%ecx), %eax
; X86PIC-NEXT: movl $3, (%eax)
; X86PIC-NEXT: popl %ebx
; X86PIC-NEXT: popl %ebp
; X86PIC-NEXT: .cfi_def_cfa %esp, 4
; X86PIC-NEXT: retl
entry:
call void asm sideeffect inteldialect "add eax, dword ptr $2[eax]\0A\09add dword ptr $0[eax], eax\0A\09add ebx, dword ptr $3[ebx + $$270]\0A\09add dword ptr $1[ebx + $$828], ebx", "=*m,=*m,*m,*m,~{eax},~{ebx},~{flags},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar, ptr elementtype(i32) @gVar)
store i32 3, ptr @gVar, align 4
ret void
}
; Function Attrs: noinline nounwind optnone uwtable
define void @t2() #0 {
; X86-LABEL: t2:
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_offset %ebx, -12
; X86-NEXT: #APP
; X86-EMPTY:
; X86-NEXT: movl -8(%ebp,%eax), %eax
; X86-NEXT: movl %eax, -8(%ebp,%eax)
; X86-NEXT: movl 262(%ebp,%ebx), %ebx
; X86-NEXT: movl %ebx, 820(%ebp,%ebx)
; X86-NEXT: movl %eax, 39(%ebp,%ebx)
; X86-EMPTY:
; X86-NEXT: #NO_APP
; X86-NEXT: movl $2, -8(%ebp)
; X86-NEXT: addl $4, %esp
; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: retl
;
; X86PIC-LABEL: t2:
; X86PIC: # %bb.0: # %entry
; X86PIC-NEXT: pushl %ebp
; X86PIC-NEXT: .cfi_def_cfa_offset 8
; X86PIC-NEXT: .cfi_offset %ebp, -8
; X86PIC-NEXT: movl %esp, %ebp
; X86PIC-NEXT: .cfi_def_cfa_register %ebp
; X86PIC-NEXT: pushl %ebx
; X86PIC-NEXT: pushl %eax
; X86PIC-NEXT: .cfi_offset %ebx, -12
; X86PIC-NEXT: #APP
; X86PIC-EMPTY:
; X86PIC-NEXT: movl -8(%ebp,%eax), %eax
; X86PIC-NEXT: movl %eax, -8(%ebp,%eax)
; X86PIC-NEXT: movl 262(%ebp,%ebx), %ebx
; X86PIC-NEXT: movl %ebx, 820(%ebp,%ebx)
; X86PIC-NEXT: movl %eax, 39(%ebp,%ebx)
; X86PIC-EMPTY:
; X86PIC-NEXT: #NO_APP
; X86PIC-NEXT: movl $2, -8(%ebp)
; X86PIC-NEXT: addl $4, %esp
; X86PIC-NEXT: popl %ebx
; X86PIC-NEXT: popl %ebp
; X86PIC-NEXT: .cfi_def_cfa %esp, 4
; X86PIC-NEXT: retl
entry:
%lVar = alloca i32, align 4
call void asm sideeffect inteldialect "mov eax, dword ptr $3[eax]\0A\09mov dword ptr $0[eax], eax\0A\09mov ebx, dword ptr $4[ebx + $$270]\0A\09mov dword ptr $1[ebx + $$828], ebx\0A\09mov $2[ebx + $$47], eax", "=*m,=*m,=*m,*m,*m,~{eax},~{ebx},~{dirflag},~{fpsr},~{flags}"(ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar, ptr elementtype(i32) %lVar)
store i32 2, ptr %lVar, align 4
ret void
}
attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="pentium4" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"NumRegisterParameters", i32 0}