# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck %s
---
name: ptrmask_p3_s32_sgpr_sgpr_sgpr
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_sgpr
; CHECK: liveins: $sgpr0, $sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%1:sgpr(s32) = COPY $sgpr1
%2:sgpr(p3) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f0
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xf0f0f0f0
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -252645136
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -252645136
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_0xffffffff
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0xffffffff
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -1
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -1
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_0x00000000
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_0x00000000
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 0
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearhi1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi1
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2147483648
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -2147483648
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearhi2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearhi2
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -1073741824
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -1073741824
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearlo1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo1
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -2
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -2
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo2
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -4
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -4
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearlo3
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo3
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -8
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -8
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearlo4
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo4
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -16
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -16
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_s32_sgpr_sgpr_clearlo29
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_s32_sgpr_sgpr_clearlo29
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; CHECK-NEXT: %const:sreg_32 = S_MOV_B32 -536870912
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]]
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -536870912
%1:sgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_sgpr
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr
; CHECK: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%1:sgpr(s64) = COPY $sgpr2_sgpr3
%2:sgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xffffffffffffffff
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY1]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%1:sgpr(s64) = G_CONSTANT i64 -1
%2:sgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0x0000000000000000
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[S_MOV_B64_]], implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%1:sgpr(s64) = G_CONSTANT i64 0
%2:sgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_sgpr_0xf0f0f0f0f0f0f0f0
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4042322160
; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -252645136
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[REG_SEQUENCE]], implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%1:sgpr(s64) = G_CONSTANT i64 -1085102592571150096
%2:sgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearhi1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi1
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -2147483648
; CHECK-NEXT: %const:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -9223372036854775808
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearhi32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearhi32
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
; CHECK-NEXT: %const:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -4294967296
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clear_32
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clear_32
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; CHECK-NEXT: %const:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], %const, implicit-def $scc
; CHECK-NEXT: S_ENDPGM 0, implicit [[S_AND_B64_]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 4294967296
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearlo1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo1
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -2
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo2
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -4
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -4
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearlo3
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo3
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -8
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -8
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearlo4
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo4
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: %const:sreg_64 = S_MOV_B64 -16
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -16
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_sgpr_sgpr_clearlo29
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_sgpr_sgpr_clearlo29
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 3758096384
; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 -1
; CHECK-NEXT: %const:sreg_64 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY %const.sub0
; CHECK-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[COPY3]], implicit-def $scc
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_AND_B32_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s64) = G_CONSTANT i64 -536870912
%1:sgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_0xf0f0f0f0
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_0xf0f0f0f0
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -252645136, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -252645136
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_clearlo1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo1
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -2, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -2
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo2
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -4, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -4
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_clearlo3
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo3
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -8
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_clearlo4
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo4
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -16, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -16
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_vgpr_clearlo29
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_vgpr_clearlo29
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; CHECK-NEXT: %const:vgpr_32 = V_MOV_B32_e32 -536870912, implicit $exec
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY]], %const, implicit $exec
; CHECK-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
%0:vgpr(p3) = COPY $vgpr0
%const:vgpr(s32) = G_CONSTANT i32 -536870912
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_vgpr_vgpr
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr
; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec
; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY3]], [[COPY5]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%1:vgpr(s64) = COPY $vgpr2_vgpr3
%2:vgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_vgpr_0xf0f0f0f0f0f0f0f0
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4042322160, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -252645136, implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub1
; CHECK-NEXT: [[V_AND_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY2]], [[COPY4]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[V_AND_B32_e64_1]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE1]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%1:vgpr(s64) = G_CONSTANT i64 -1085102592571150096
%2:vgpr(p0) = G_PTRMASK %0, %1
S_ENDPGM 0, implicit %2
...
---
name: ptrmask_p0_s64_vgpr_vgpr_clearlo1
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo1
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294967294, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
; CHECK-NEXT: %const:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%const:vgpr(s64) = G_CONSTANT i64 -2
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_vgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo2
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294967292, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
; CHECK-NEXT: %const:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%const:vgpr(s64) = G_CONSTANT i64 -4
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_vgpr_clearlo3
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo3
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294967292, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
; CHECK-NEXT: %const:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%const:vgpr(s64) = G_CONSTANT i64 -4
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_vgpr_clearlo4
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo4
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4294967280, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
; CHECK-NEXT: %const:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%const:vgpr(s64) = G_CONSTANT i64 -16
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_vgpr_clearlo29
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_vgpr_clearlo29
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3758096384, implicit $exec
; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
; CHECK-NEXT: %const:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %const.sub0
; CHECK-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[COPY3]], implicit $exec
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
; CHECK-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
%0:vgpr(p0) = COPY $vgpr0_vgpr1
%const:vgpr(s64) = G_CONSTANT i64 -536870912
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p3_vgpr_sgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: ptrmask_p3_vgpr_sgpr_clearlo2
; CHECK: liveins: $sgpr0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4
; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p3) = G_PTRMASK [[COPY]], %const(s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p3)
%0:sgpr(p3) = COPY $sgpr0
%const:sgpr(s32) = G_CONSTANT i32 -4
%1:vgpr(p3) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...
---
name: ptrmask_p0_s64_vgpr_sgpr_clearlo2
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $sgpr0_sgpr1
; CHECK-LABEL: name: ptrmask_p0_s64_vgpr_sgpr_clearlo2
; CHECK: liveins: $sgpr0_sgpr1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1
; CHECK-NEXT: %const:sgpr(s32) = G_CONSTANT i32 -4
; CHECK-NEXT: [[PTRMASK:%[0-9]+]]:vgpr(p0) = G_PTRMASK [[COPY]], %const(s32)
; CHECK-NEXT: S_ENDPGM 0, implicit [[PTRMASK]](p0)
%0:sgpr(p0) = COPY $sgpr0_sgpr1
%const:sgpr(s32) = G_CONSTANT i32 -4
%1:vgpr(p0) = G_PTRMASK %0, %const
S_ENDPGM 0, implicit %1
...