Compiler projects using llvm
# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
# RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=asm -o - \
# RUN:   | FileCheck %s

#------------------------------------------------------------------------------
# CollapseMOVEM pass finds sequences of MOVEM instructions and collapse them
# into a single instruciton with merged masks. This only works with stack data
#------------------------------------------------------------------------------

--- # CollapseMOVEM_RM
#
# CHECK-LABEL: CollapseMOVEM_RM
# CHECK:       movem.l (0,%sp), %d0-%d2/%d7/%a1-%a3/%a5
name: CollapseMOVEM_RM
body: |
  bb.0:
    MOVM32mp 1,     0, $sp
    MOVM32mp 2,     4, $sp
    MOVM32mp 4,     8, $sp
    MOVM32mp 128,  12, $sp
    MOVM32mp 512,  16, $sp
    MOVM32mp 1024, 20, $sp
    MOVM32mp 2048, 24, $sp
    MOVM32mp 8192, 28, $sp

...
#
# CHECK-LABEL: CollapseMOVEM_RM_Reversed
# CHECK:       movem.l (0,%sp), %d0-%d2/%d7/%a1-%a3/%a5
name: CollapseMOVEM_RM_Reversed
body: |
  bb.0:
    MOVM32mp 8192, 28, $sp
    MOVM32mp 2048, 24, $sp
    MOVM32mp 1024, 20, $sp
    MOVM32mp 512,  16, $sp
    MOVM32mp 128,  12, $sp
    MOVM32mp 4,     8, $sp
    MOVM32mp 2,     4, $sp
    MOVM32mp 1,     0, $sp

...
# This async reg/mem order is impossible to store with MOVEM
# CHECK-LABEL: CollapseMOVEM_RM_ReversedStoreOrder
# CHECK:       movem.l (0,%sp), %a5
# CHECK:       movem.l (4,%sp), %a3
# CHECK:       movem.l (8,%sp), %a2
# CHECK:       movem.l (12,%sp), %a1
# CHECK:       movem.l (16,%sp), %d7
# CHECK:       movem.l (20,%sp), %d2
# CHECK:       movem.l (24,%sp), %d1
# CHECK:       movem.l (28,%sp), %d0
name: CollapseMOVEM_RM_ReversedStoreOrder
body: |
  bb.0:
    MOVM32mp 8192,  0, $sp
    MOVM32mp 2048,  4, $sp
    MOVM32mp 1024,  8, $sp
    MOVM32mp 512,  12, $sp
    MOVM32mp 128,  16, $sp
    MOVM32mp 4,    20, $sp
    MOVM32mp 2,    24, $sp
    MOVM32mp 1,    28, $sp

...
--- # CollapseMOVEM_MR
#
# CHECK-LABEL: CollapseMOVEM_MR
# CHECK:       movem.l %d0-%d2/%d7/%a1-%a3/%a5, (0,%sp)
name: CollapseMOVEM_MR
body: |
  bb.0:
    MOVM32pm   0, $sp, 1
    MOVM32pm   4, $sp, 2
    MOVM32pm   8, $sp, 4
    MOVM32pm  12, $sp, 128
    MOVM32pm  16, $sp, 512
    MOVM32pm  20, $sp, 1024
    MOVM32pm  24, $sp, 2048
    MOVM32pm  28, $sp, 8192

...
--- # CollapseMOVEM_Mixed
#
# CHECK-LABEL: CollapseMOVEM_Mixed
# CHECK:       movem.l %d0-%d1, (0,%sp)
# CHECK:       movem.l (8,%sp), %d2/%d7
# CHECK:       movem.l %a1-%a2, (16,%sp)
# CHECK:       movem.l (24,%sp), %a3
# CHECK:       movem.l %a5, (28,%sp)
name: CollapseMOVEM_Mixed
body: |
  bb.0:
    MOVM32pm  0, $sp, 1
    MOVM32pm  4, $sp, 2
    MOVM32mp  4, 8, $sp
    MOVM32mp  128, 12, $sp
    MOVM32pm  16, $sp, 512
    MOVM32pm  20, $sp, 1024
    MOVM32mp  2048, 24, $sp
    MOVM32pm  28, $sp, 8192

...
--- # CollapseMOVEM_Zero
#
# CHECK-LABEL: CollapseMOVEM_Zero
# CHECK:       movem.l %d0-%d4, (-8,%sp)
name: CollapseMOVEM_Zero
body: |
  bb.0:
    MOVM32pm -8, $sp,  1
    MOVM32pm -4, $sp,  2
    MOVM32pm  0, $sp,  4
    MOVM32pm  4, $sp,  8
    MOVM32pm  8, $sp, 16

...
#
# CHECK-LABEL: CollapseMOVEM_Zero_Mixed
# CHECK:       movem.l %d3, (4,%sp)
# CHECK:       movem.l %d0-%d2, (-8,%sp)
# CHECK:       movem.l %d4, (8,%sp)
name: CollapseMOVEM_Zero_Mixed
body: |
  bb.0:
    MOVM32pm  4, $sp,  8
    MOVM32pm -4, $sp,  2
    MOVM32pm -8, $sp,  1
    MOVM32pm  0, $sp,  4
    MOVM32pm  8, $sp, 16

...
--- # CollapseMOVEM_Zero_Reversed
#
# CHECK-LABEL: CollapseMOVEM_Zero_Reversed
# CHECK:       movem.l %d0-%d4, (-8,%sp)
name: CollapseMOVEM_Zero_Reversed
body: |
  bb.0:
    MOVM32pm  8, $sp, 16
    MOVM32pm  4, $sp,  8
    MOVM32pm  0, $sp,  4
    MOVM32pm -4, $sp,  2
    MOVM32pm -8, $sp,  1

...
#
# CHECK-LABEL: CollapseMOVEM_Zero_ReversedStoreOrder
# CHECK:       movem.l %d0, (8,%sp)
# CHECK:       movem.l %d1, (4,%sp)
# CHECK:       movem.l %d2, (0,%sp)
# CHECK:       movem.l %d3, (-4,%sp)
# CHECK:       movem.l %d4, (-8,%sp)
name: CollapseMOVEM_Zero_ReversedStoreOrder
body: |
  bb.0:
    MOVM32pm  8, $sp,  1
    MOVM32pm  4, $sp,  2
    MOVM32pm  0, $sp,  4
    MOVM32pm -4, $sp,  8
    MOVM32pm -8, $sp, 16

...