# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple arm-arm-eabi -mcpu=cortex-m7 -verify-machineinstrs -run-pass=postmisched %s -o - | FileCheck %s
---
name:            test_groups
alignment:       2
tracksRegLiveness: true
liveins:
  - { reg: '$d0' }
  - { reg: '$r0' }
  - { reg: '$r1' }
  - { reg: '$r2' }
  - { reg: '$r3' }
  - { reg: '$r4' }
frameInfo:
  maxAlignment:    1
  maxCallFrameSize: 0
machineFunctionInfo: {}
body:             |
  bb.0:
    liveins: $d0, $r0, $r1, $r2, $r3, $r4

    ; CHECK-LABEL: name: test_groups
    ; CHECK: liveins: $d0, $r0, $r1, $r2, $r3, $r4
    ; CHECK: renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg
    ; CHECK: renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg
    ; CHECK: VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg
    ; CHECK: t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg
    ; CHECK: renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $d0
    renamable $s2 = VLDRS killed renamable $r0, 0, 14 /* CC::al */, $noreg
    renamable $d0 = VADDD killed renamable $d0, renamable $d0, 14 /* CC::al */, $noreg
    VSTRS killed renamable $s2, killed renamable $r1, 0, 14 /* CC::al */, $noreg
    renamable $r3 = t2ADDrr killed renamable $r3, renamable $r3, 14 /* CC::al */, $noreg, $noreg
    t2STRi12 killed renamable $r3, killed renamable $r2, 0, 14 /* CC::al */, $noreg
    renamable $r4 = t2ADDrr killed renamable $r4, renamable $r4, 14 /* CC::al */, $noreg, $noreg
    tBX_RET 14 /* CC::al */, $noreg, implicit $d0

...