# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=si-fold-operands -o - %s | FileCheck %s # This was attempting to look back through the REG_SEQUENCE source # operands and trying to look for physreg defs. --- name: fold_reg_sequence_of_copy_from_physreg_0 tracksRegLiveness: true machineFunctionInfo: isEntryFunction: true scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' stackPtrOffsetReg: '$sgpr32' occupancy: 8 body: | bb.0: ; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_0 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[DEF]], killed [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) ; CHECK-NEXT: S_ENDPGM 0 $vgpr0 = V_MOV_B32_e32 0, implicit $exec $vgpr1 = V_MOV_B32_e32 1, implicit $exec S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 %0:vgpr_32 = COPY $vgpr0 %1:vgpr_32 = COPY $vgpr1 %2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1 %3:vreg_64_align2 = IMPLICIT_DEF FLAT_STORE_DWORDX2 killed %3, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) S_ENDPGM 0 ... --- name: fold_reg_sequence_of_copy_from_physreg_1 tracksRegLiveness: true machineFunctionInfo: isEntryFunction: true scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' stackPtrOffsetReg: '$sgpr32' occupancy: 8 body: | bb.0: ; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_1 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]] ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[REG_SEQUENCE]], killed [[DEF]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) ; CHECK-NEXT: S_ENDPGM 0 $vgpr0 = V_MOV_B32_e32 0, implicit $exec $vgpr1 = V_MOV_B32_e32 1, implicit $exec S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 %0:vgpr_32 = COPY $vgpr0 %1:vgpr_32 = V_MOV_B32_e32 2, implicit $exec %2:vgpr_32 = COPY %0 %3:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %2, %subreg.sub1 %4:vreg_64_align2 = IMPLICIT_DEF FLAT_STORE_DWORDX2 killed %3, killed %4, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) S_ENDPGM 0 ... --- name: fold_reg_sequence_of_copy_from_physreg_2 tracksRegLiveness: true machineFunctionInfo: isEntryFunction: true scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' stackPtrOffsetReg: '$sgpr32' occupancy: 8 body: | bb.0: ; CHECK-LABEL: name: fold_reg_sequence_of_copy_from_physreg_2 ; CHECK: $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[COPY]], %subreg.sub1 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vreg_64_align2 = IMPLICIT_DEF ; CHECK-NEXT: FLAT_STORE_DWORDX2 killed [[DEF]], killed [[REG_SEQUENCE]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) ; CHECK-NEXT: S_ENDPGM 0 $vgpr0 = V_MOV_B32_e32 0, implicit $exec $vgpr1 = V_MOV_B32_e32 1, implicit $exec S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1 %0:vgpr_32 = V_MOV_B32_e32 2, implicit $exec %1:vgpr_32 = COPY $vgpr0 %2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1 %3:vreg_64_align2 = IMPLICIT_DEF FLAT_STORE_DWORDX2 killed %3, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64)) S_ENDPGM 0 ... # This would crash looking for a def in any mayLoad instruction --- name: fold_inlineasm_def tracksRegLiveness: true body: | bb.0: ; CHECK-LABEL: name: fold_inlineasm_def ; CHECK: INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0 ; CHECK-NEXT: S_ENDPGM 0 INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0 S_ENDPGM 0 ...