nuudlman/llvm: llvm/test/MC/Disassembler/ARM/sub-sp-imm-thumb2.txt

Compiler projects using llvm
# RUN: llvm-mc -triple=thumbv7 -disassemble -show-inst < %s | FileCheck %s

# https://bugs.llvm.org/show_bug.cgi?id=49974
# Incorrect number of predicate operands were inserted to the
# disassembled MCInst.

# CHECK:      subw sp, sp, #1148
# CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm12
# CHECK-NEXT: <MCOperand Reg:[[SP:[0-9]+]]>
# CHECK-NEXT: <MCOperand Reg:[[SP]]>
# CHECK-NEXT: <MCOperand Imm:1148>
# CHECK-NEXT: <MCOperand Imm:14>
# CHECK-NEXT: <MCOperand Reg:0>>

0xad 0xf2 0x7c 0x4d

# CHECK:      sub.w   sp, sp, #1024
# CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm
# CHECK-NEXT: <MCOperand Reg:[[SP]]>
# CHECK-NEXT: <MCOperand Reg:[[SP]]>
# CHECK-NEXT: <MCOperand Imm:1024>
# CHECK-NEXT: <MCOperand Imm:14>
# CHECK-NEXT: <MCOperand Reg:0>
# CHECK-NEXT: <MCOperand Reg:0>>

0xad,0xf5,0x80,0x6d

# CHECK:      subs.w  sp, sp, #1024
# CHECK-SAME: <MCInst #{{[0-9]+}} t2SUBspImm
# CHECK-NEXT: <MCOperand Reg:[[SP]]>
# CHECK-NEXT: <MCOperand Reg:[[SP]]>
# CHECK-NEXT: <MCOperand Imm:1024>
# CHECK-NEXT: <MCOperand Imm:14>
# CHECK-NEXT: <MCOperand Reg:0>
# CHECK-NEXT: <MCOperand Reg:3>>

0xbd,0xf5,0x80,0x6d