// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -no-opaque-pointers -triple riscv64 -target-feature +zbkb -emit-llvm %s -o - \
// RUN: | FileCheck %s -check-prefix=RV64ZBKB
// RV64ZBKB-LABEL: @brev8(
// RV64ZBKB-NEXT: entry:
// RV64ZBKB-NEXT: [[RS1_ADDR:%.*]] = alloca i64, align 8
// RV64ZBKB-NEXT: store i64 [[RS1:%.*]], i64* [[RS1_ADDR]], align 8
// RV64ZBKB-NEXT: [[TMP0:%.*]] = load i64, i64* [[RS1_ADDR]], align 8
// RV64ZBKB-NEXT: [[TMP1:%.*]] = call i64 @llvm.riscv.brev8.i64(i64 [[TMP0]])
// RV64ZBKB-NEXT: ret i64 [[TMP1]]
//
long