// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple arm -target-feature -fpregs -verify=arm-nofp %s
// w: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d31, or q0-q15.
float
// x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3.
float
// t: A 32, 64, or 128-bit floating-point/SIMD register: s0-s31, d0-d15, or q0-q7.
float