# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=msa,+fp64 -mattr=nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600 --- name: load_store_v16i8 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v16i8 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY1]](p0) :: (load (<16 x s8>)) ; P5600-NEXT: G_STORE [[LOAD]](<16 x s8>), [[COPY]](p0) :: (store (<16 x s8>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<16 x s8>) = G_LOAD %1(p0) :: (load (<16 x s8>)) G_STORE %2(<16 x s8>), %0(p0) :: (store (<16 x s8>)) RetRA ... --- name: load_store_v8i16 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v8i16 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[COPY1]](p0) :: (load (<8 x s16>)) ; P5600-NEXT: G_STORE [[LOAD]](<8 x s16>), [[COPY]](p0) :: (store (<8 x s16>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<8 x s16>) = G_LOAD %1(p0) :: (load (<8 x s16>)) G_STORE %2(<8 x s16>), %0(p0) :: (store (<8 x s16>)) RetRA ... --- name: load_store_v4i32 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v4i32 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load (<4 x s32>)) ; P5600-NEXT: G_STORE [[LOAD]](<4 x s32>), [[COPY]](p0) :: (store (<4 x s32>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>)) G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>)) RetRA ... --- name: load_store_v2i64 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v2i64 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load (<2 x s64>)) ; P5600-NEXT: G_STORE [[LOAD]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>)) G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>)) RetRA ... --- name: load_store_v4f32 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v4f32 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load (<4 x s32>)) ; P5600-NEXT: G_STORE [[LOAD]](<4 x s32>), [[COPY]](p0) :: (store (<4 x s32>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>)) G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>)) RetRA ... --- name: load_store_v2f64 alignment: 4 tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1 ; P5600-LABEL: name: load_store_v2f64 ; P5600: liveins: $a0, $a1 ; P5600-NEXT: {{ $}} ; P5600-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 ; P5600-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 ; P5600-NEXT: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load (<2 x s64>)) ; P5600-NEXT: G_STORE [[LOAD]](<2 x s64>), [[COPY]](p0) :: (store (<2 x s64>)) ; P5600-NEXT: RetRA %0:_(p0) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>)) G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>)) RetRA ...