; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512bw-builtins.c
define i64 @test_mm512_kunpackd(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) {
; X86-LABEL: test_mm512_kunpackd:
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-64, %esp
; X86-NEXT: subl $64, %esp
; X86-NEXT: vmovdqa64 136(%ebp), %zmm3
; X86-NEXT: vpcmpneqb %zmm0, %zmm1, %k0
; X86-NEXT: vpcmpneqb 8(%ebp), %zmm2, %k1
; X86-NEXT: vpcmpneqb 72(%ebp), %zmm3, %k2
; X86-NEXT: kandd %k0, %k2, %k0
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: kshiftrq $32, %k2, %k0
; X86-NEXT: kandd %k1, %k0, %k0
; X86-NEXT: kmovd %k0, %edx
; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_kunpackd:
; X64: # %bb.0: # %entry
; X64-NEXT: vpcmpneqb %zmm0, %zmm1, %k0
; X64-NEXT: vpcmpneqb %zmm3, %zmm2, %k1
; X64-NEXT: kunpckdq %k0, %k1, %k1
; X64-NEXT: vpcmpneqb %zmm5, %zmm4, %k0 {%k1}
; X64-NEXT: kmovq %k0, %rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__E to <64 x i8>
%1 = bitcast <8 x i64> %__F to <64 x i8>
%2 = bitcast <8 x i64> %__B to <64 x i8>
%3 = bitcast <8 x i64> %__A to <64 x i8>
%4 = icmp ne <64 x i8> %2, %3
%5 = bitcast <8 x i64> %__C to <64 x i8>
%6 = bitcast <8 x i64> %__D to <64 x i8>
%7 = icmp ne <64 x i8> %5, %6
%8 = shufflevector <64 x i1> %4, <64 x i1> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%9 = shufflevector <64 x i1> %7, <64 x i1> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%10 = shufflevector <32 x i1> %8, <32 x i1> %9, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%11 = icmp ne <64 x i8> %0, %1
%12 = and <64 x i1> %11, %10
%13 = bitcast <64 x i1> %12 to i64
ret i64 %13
}
define i32 @test_mm512_kunpackw(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) {
; X86-LABEL: test_mm512_kunpackw:
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-64, %esp
; X86-NEXT: subl $64, %esp
; X86-NEXT: vmovdqa64 136(%ebp), %zmm3
; X86-NEXT: vpcmpneqw %zmm0, %zmm1, %k0
; X86-NEXT: vpcmpneqw 8(%ebp), %zmm2, %k1
; X86-NEXT: kunpckwd %k0, %k1, %k1
; X86-NEXT: vpcmpneqw 72(%ebp), %zmm3, %k0 {%k1}
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp
; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_kunpackw:
; X64: # %bb.0: # %entry
; X64-NEXT: vpcmpneqw %zmm0, %zmm1, %k0
; X64-NEXT: vpcmpneqw %zmm3, %zmm2, %k1
; X64-NEXT: kunpckwd %k0, %k1, %k1
; X64-NEXT: vpcmpneqw %zmm5, %zmm4, %k0 {%k1}
; X64-NEXT: kmovd %k0, %eax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__E to <32 x i16>
%1 = bitcast <8 x i64> %__F to <32 x i16>
%2 = bitcast <8 x i64> %__B to <32 x i16>
%3 = bitcast <8 x i64> %__A to <32 x i16>
%4 = icmp ne <32 x i16> %2, %3
%5 = bitcast <8 x i64> %__C to <32 x i16>
%6 = bitcast <8 x i64> %__D to <32 x i16>
%7 = icmp ne <32 x i16> %5, %6
%8 = shufflevector <32 x i1> %4, <32 x i1> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%9 = shufflevector <32 x i1> %7, <32 x i1> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%10 = shufflevector <16 x i1> %8, <16 x i1> %9, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%11 = icmp ne <32 x i16> %0, %1
%12 = and <32 x i1> %11, %10
%13 = bitcast <32 x i1> %12 to i32
ret i32 %13
}
define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext %__A) {
; X86-LABEL: test_mm512_mask_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kunpckdq %k1, %k0, %k1
; X86-NEXT: vpbroadcastb %eax, %zmm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_set1_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovq %rdi, %k1
; X64-NEXT: vpbroadcastb %esi, %zmm0 {%k1}
; X64-NEXT: retq
entry:
%vecinit.i.i = insertelement <64 x i8> undef, i8 %__A, i32 0
%vecinit63.i.i = shufflevector <64 x i8> %vecinit.i.i, <64 x i8> undef, <64 x i32> zeroinitializer
%0 = bitcast <8 x i64> %__O to <64 x i8>
%1 = bitcast i64 %__M to <64 x i1>
%2 = select <64 x i1> %1, <64 x i8> %vecinit63.i.i, <64 x i8> %0
%3 = bitcast <64 x i8> %2 to <8 x i64>
ret <8 x i64> %3
}
define <8 x i64> @test_mm512_maskz_set1_epi8(i64 %__M, i8 signext %__A) {
; X86-LABEL: test_mm512_maskz_set1_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k0
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kunpckdq %k1, %k0, %k1
; X86-NEXT: vpbroadcastb %eax, %zmm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_set1_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovq %rdi, %k1
; X64-NEXT: vpbroadcastb %esi, %zmm0 {%k1} {z}
; X64-NEXT: retq
entry:
%vecinit.i.i = insertelement <64 x i8> undef, i8 %__A, i32 0
%vecinit63.i.i = shufflevector <64 x i8> %vecinit.i.i, <64 x i8> undef, <64 x i32> zeroinitializer
%0 = bitcast i64 %__M to <64 x i1>
%1 = select <64 x i1> %0, <64 x i8> %vecinit63.i.i, <64 x i8> zeroinitializer
%2 = bitcast <64 x i8> %1 to <8 x i64>
ret <8 x i64> %2
}
define <8 x i64> @test_mm512_mask_set1_epi16(<8 x i64> %__O, i32 %__M, i16 signext %__A) {
; X86-LABEL: test_mm512_mask_set1_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastw %eax, %zmm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_set1_epi16:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpbroadcastw %esi, %zmm0 {%k1}
; X64-NEXT: retq
entry:
%vecinit.i.i = insertelement <32 x i16> undef, i16 %__A, i32 0
%vecinit31.i.i = shufflevector <32 x i16> %vecinit.i.i, <32 x i16> undef, <32 x i32> zeroinitializer
%0 = bitcast <8 x i64> %__O to <32 x i16>
%1 = bitcast i32 %__M to <32 x i1>
%2 = select <32 x i1> %1, <32 x i16> %vecinit31.i.i, <32 x i16> %0
%3 = bitcast <32 x i16> %2 to <8 x i64>
ret <8 x i64> %3
}
define <8 x i64> @test_mm512_maskz_set1_epi16(i32 %__M, i16 signext %__A) {
; X86-LABEL: test_mm512_maskz_set1_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastw %eax, %zmm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_set1_epi16:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpbroadcastw %esi, %zmm0 {%k1} {z}
; X64-NEXT: retq
entry:
%vecinit.i.i = insertelement <32 x i16> undef, i16 %__A, i32 0
%vecinit31.i.i = shufflevector <32 x i16> %vecinit.i.i, <32 x i16> undef, <32 x i32> zeroinitializer
%0 = bitcast i32 %__M to <32 x i1>
%1 = select <32 x i1> %0, <32 x i16> %vecinit31.i.i, <32 x i16> zeroinitializer
%2 = bitcast <32 x i16> %1 to <8 x i64>
ret <8 x i64> %2
}
define <8 x i64> @test_mm512_broadcastb_epi8(<2 x i64> %a0) {
; CHECK-LABEL: test_mm512_broadcastb_epi8:
; CHECK: # %bb.0:
; CHECK-NEXT: vpbroadcastb %xmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
%res0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <64 x i32> zeroinitializer
%res1 = bitcast <64 x i8> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_mask_broadcastb_epi8(<8 x i64> %a0, ptr %a1, <2 x i64> %a2) {
; X86-LABEL: test_mm512_mask_broadcastb_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpbroadcastb %xmm1, %zmm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_broadcastb_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpbroadcastb %xmm1, %zmm0 {%k1}
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%arg1 = load <64 x i1>, ptr %a1
%arg2 = bitcast <2 x i64> %a2 to <16 x i8>
%res0 = shufflevector <16 x i8> %arg2, <16 x i8> undef, <64 x i32> zeroinitializer
%res1 = select <64 x i1> %arg1, <64 x i8> %res0, <64 x i8> %arg0
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_broadcastb_epi8(ptr %a0, <2 x i64> %a1) {
; X86-LABEL: test_mm512_maskz_broadcastb_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpbroadcastb %xmm0, %zmm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_broadcastb_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpbroadcastb %xmm0, %zmm0 {%k1} {z}
; X64-NEXT: retq
%arg0 = load <64 x i1>, ptr %a0
%arg1 = bitcast <2 x i64> %a1 to <16 x i8>
%res0 = shufflevector <16 x i8> %arg1, <16 x i8> undef, <64 x i32> zeroinitializer
%res1 = select <64 x i1> %arg0, <64 x i8> %res0, <64 x i8> zeroinitializer
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_broadcastw_epi16(<2 x i64> %a0) {
; CHECK-LABEL: test_mm512_broadcastw_epi16:
; CHECK: # %bb.0:
; CHECK-NEXT: vpbroadcastw %xmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
%res0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <32 x i32> zeroinitializer
%res1 = bitcast <32 x i16> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_mask_broadcastw_epi16(<8 x i64> %a0, i32 %a1, <2 x i64> %a2) {
; X86-LABEL: test_mm512_mask_broadcastw_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastw %xmm1, %zmm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_broadcastw_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpbroadcastw %xmm1, %zmm0 {%k1}
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <32 x i16>
%arg1 = bitcast i32 %a1 to <32 x i1>
%arg2 = bitcast <2 x i64> %a2 to <8 x i16>
%res0 = shufflevector <8 x i16> %arg2, <8 x i16> undef, <32 x i32> zeroinitializer
%res1 = select <32 x i1> %arg1, <32 x i16> %res0, <32 x i16> %arg0
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_broadcastw_epi16(i32 %a0, <2 x i64> %a1) {
; X86-LABEL: test_mm512_maskz_broadcastw_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpbroadcastw %xmm0, %zmm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_broadcastw_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpbroadcastw %xmm0, %zmm0 {%k1} {z}
; X64-NEXT: retq
%arg0 = bitcast i32 %a0 to <32 x i1>
%arg1 = bitcast <2 x i64> %a1 to <8 x i16>
%res0 = shufflevector <8 x i16> %arg1, <8 x i16> undef, <32 x i32> zeroinitializer
%res1 = select <32 x i1> %arg0, <32 x i16> %res0, <32 x i16> zeroinitializer
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_bslli_epi128(<8 x i64> %a0) {
; CHECK-LABEL: test_mm512_bslli_epi128:
; CHECK: # %bb.0:
; CHECK-NEXT: vpsrldq {{.*#+}} zmm0 = zmm0[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[27,28,29,30,31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[43,44,45,46,47],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[59,60,61,62,63],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg0, <64 x i8> zeroinitializer, <64 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122>
%res1 = bitcast <64 x i8> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_bsrli_epi128(<8 x i64> %a0) {
; CHECK-LABEL: test_mm512_bsrli_epi128:
; CHECK: # %bb.0:
; CHECK-NEXT: vpsrldq {{.*#+}} zmm0 = zmm0[5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zmm0[21,22,23,24,25,26,27,28,29,30,31],zero,zero,zero,zero,zero,zmm0[37,38,39,40,41,42,43,44,45,46,47],zero,zero,zero,zero,zero,zmm0[53,54,55,56,57,58,59,60,61,62,63],zero,zero,zero,zero,zero
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg0, <64 x i8> zeroinitializer, <64 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 64, i32 65, i32 66, i32 67, i32 68, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 80, i32 81, i32 82, i32 83, i32 84, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 96, i32 97, i32 98, i32 99, i32 100, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 112, i32 113, i32 114, i32 115, i32 116>
%res1 = bitcast <64 x i8> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_unpackhi_epi8(<8 x i64> %a0, <8 x i64> %a1) {
; CHECK-LABEL: test_mm512_unpackhi_epi8:
; CHECK: # %bb.0:
; CHECK-NEXT: vpunpckhbw {{.*#+}} zmm0 = zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31],zmm0[40],zmm1[40],zmm0[41],zmm1[41],zmm0[42],zmm1[42],zmm0[43],zmm1[43],zmm0[44],zmm1[44],zmm0[45],zmm1[45],zmm0[46],zmm1[46],zmm0[47],zmm1[47],zmm0[56],zmm1[56],zmm0[57],zmm1[57],zmm0[58],zmm1[58],zmm0[59],zmm1[59],zmm0[60],zmm1[60],zmm0[61],zmm1[61],zmm0[62],zmm1[62],zmm0[63],zmm1[63]
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%arg1 = bitcast <8 x i64> %a1 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg0, <64 x i8> %arg1, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>
%res1 = bitcast <64 x i8> %res0 to <8 x i64>
ret <8 x i64> %res1
}
; TODO - improve support for i64 -> mmask64 on 32-bit targets
define <8 x i64> @test_mm512_mask_unpackhi_epi8(<8 x i64> %a0, ptr %a1, <8 x i64> %a2, <8 x i64> %a3) {
; X86-LABEL: test_mm512_mask_unpackhi_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpunpckhbw {{.*#+}} zmm0 {%k1} = zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[12],zmm2[12],zmm1[13],zmm2[13],zmm1[14],zmm2[14],zmm1[15],zmm2[15],zmm1[24],zmm2[24],zmm1[25],zmm2[25],zmm1[26],zmm2[26],zmm1[27],zmm2[27],zmm1[28],zmm2[28],zmm1[29],zmm2[29],zmm1[30],zmm2[30],zmm1[31],zmm2[31],zmm1[40],zmm2[40],zmm1[41],zmm2[41],zmm1[42],zmm2[42],zmm1[43],zmm2[43],zmm1[44],zmm2[44],zmm1[45],zmm2[45],zmm1[46],zmm2[46],zmm1[47],zmm2[47],zmm1[56],zmm2[56],zmm1[57],zmm2[57],zmm1[58],zmm2[58],zmm1[59],zmm2[59],zmm1[60],zmm2[60],zmm1[61],zmm2[61],zmm1[62],zmm2[62],zmm1[63],zmm2[63]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_unpackhi_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpunpckhbw {{.*#+}} zmm0 {%k1} = zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[12],zmm2[12],zmm1[13],zmm2[13],zmm1[14],zmm2[14],zmm1[15],zmm2[15],zmm1[24],zmm2[24],zmm1[25],zmm2[25],zmm1[26],zmm2[26],zmm1[27],zmm2[27],zmm1[28],zmm2[28],zmm1[29],zmm2[29],zmm1[30],zmm2[30],zmm1[31],zmm2[31],zmm1[40],zmm2[40],zmm1[41],zmm2[41],zmm1[42],zmm2[42],zmm1[43],zmm2[43],zmm1[44],zmm2[44],zmm1[45],zmm2[45],zmm1[46],zmm2[46],zmm1[47],zmm2[47],zmm1[56],zmm2[56],zmm1[57],zmm2[57],zmm1[58],zmm2[58],zmm1[59],zmm2[59],zmm1[60],zmm2[60],zmm1[61],zmm2[61],zmm1[62],zmm2[62],zmm1[63],zmm2[63]
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%sel1 = load <64 x i1>, ptr %a1
%arg2 = bitcast <8 x i64> %a2 to <64 x i8>
%arg3 = bitcast <8 x i64> %a3 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg2, <64 x i8> %arg3, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>
%res1 = select <64 x i1> %sel1, <64 x i8> %res0, <64 x i8> %arg0
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_unpackhi_epi8(ptr %a0, <8 x i64> %a1, <8 x i64> %a2) {
; X86-LABEL: test_mm512_maskz_unpackhi_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpunpckhbw {{.*#+}} zmm0 {%k1} {z} = zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31],zmm0[40],zmm1[40],zmm0[41],zmm1[41],zmm0[42],zmm1[42],zmm0[43],zmm1[43],zmm0[44],zmm1[44],zmm0[45],zmm1[45],zmm0[46],zmm1[46],zmm0[47],zmm1[47],zmm0[56],zmm1[56],zmm0[57],zmm1[57],zmm0[58],zmm1[58],zmm0[59],zmm1[59],zmm0[60],zmm1[60],zmm0[61],zmm1[61],zmm0[62],zmm1[62],zmm0[63],zmm1[63]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_unpackhi_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpunpckhbw {{.*#+}} zmm0 {%k1} {z} = zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31],zmm0[40],zmm1[40],zmm0[41],zmm1[41],zmm0[42],zmm1[42],zmm0[43],zmm1[43],zmm0[44],zmm1[44],zmm0[45],zmm1[45],zmm0[46],zmm1[46],zmm0[47],zmm1[47],zmm0[56],zmm1[56],zmm0[57],zmm1[57],zmm0[58],zmm1[58],zmm0[59],zmm1[59],zmm0[60],zmm1[60],zmm0[61],zmm1[61],zmm0[62],zmm1[62],zmm0[63],zmm1[63]
; X64-NEXT: retq
%sel0 = load <64 x i1>, ptr %a0
%arg1 = bitcast <8 x i64> %a1 to <64 x i8>
%arg2 = bitcast <8 x i64> %a2 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg1, <64 x i8> %arg2, <64 x i32> <i32 8, i32 72, i32 9, i32 73, i32 10, i32 74, i32 11, i32 75, i32 12, i32 76, i32 13, i32 77, i32 14, i32 78, i32 15, i32 79, i32 24, i32 88, i32 25, i32 89, i32 26, i32 90, i32 27, i32 91, i32 28, i32 92, i32 29, i32 93, i32 30, i32 94, i32 31, i32 95, i32 40, i32 104, i32 41, i32 105, i32 42, i32 106, i32 43, i32 107, i32 44, i32 108, i32 45, i32 109, i32 46, i32 110, i32 47, i32 111, i32 56, i32 120, i32 57, i32 121, i32 58, i32 122, i32 59, i32 123, i32 60, i32 124, i32 61, i32 125, i32 62, i32 126, i32 63, i32 127>
%res1 = select <64 x i1> %sel0, <64 x i8> %res0, <64 x i8> zeroinitializer
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_unpackhi_epi16(<8 x i64> %a0, <8 x i64> %a1) {
; CHECK-LABEL: test_mm512_unpackhi_epi16:
; CHECK: # %bb.0:
; CHECK-NEXT: vpunpckhwd {{.*#+}} zmm0 = zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31]
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <32 x i16>
%arg1 = bitcast <8 x i64> %a1 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg0, <32 x i16> %arg1, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>
%res1 = bitcast <32 x i16> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_mask_unpackhi_epi16(<8 x i64> %a0, i32 %a1, <8 x i64> %a2, <8 x i64> %a3) {
; X86-LABEL: test_mm512_mask_unpackhi_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpunpckhwd {{.*#+}} zmm0 {%k1} = zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[12],zmm2[12],zmm1[13],zmm2[13],zmm1[14],zmm2[14],zmm1[15],zmm2[15],zmm1[20],zmm2[20],zmm1[21],zmm2[21],zmm1[22],zmm2[22],zmm1[23],zmm2[23],zmm1[28],zmm2[28],zmm1[29],zmm2[29],zmm1[30],zmm2[30],zmm1[31],zmm2[31]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_unpackhi_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpunpckhwd {{.*#+}} zmm0 {%k1} = zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[12],zmm2[12],zmm1[13],zmm2[13],zmm1[14],zmm2[14],zmm1[15],zmm2[15],zmm1[20],zmm2[20],zmm1[21],zmm2[21],zmm1[22],zmm2[22],zmm1[23],zmm2[23],zmm1[28],zmm2[28],zmm1[29],zmm2[29],zmm1[30],zmm2[30],zmm1[31],zmm2[31]
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <32 x i16>
%arg1 = bitcast i32 %a1 to <32 x i1>
%arg2 = bitcast <8 x i64> %a2 to <32 x i16>
%arg3 = bitcast <8 x i64> %a3 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg2, <32 x i16> %arg3, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>
%res1 = select <32 x i1> %arg1, <32 x i16> %res0, <32 x i16> %arg0
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_unpackhi_epi16(i32 %a0, <8 x i64> %a1, <8 x i64> %a2) {
; X86-LABEL: test_mm512_maskz_unpackhi_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpunpckhwd {{.*#+}} zmm0 {%k1} {z} = zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_unpackhi_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpunpckhwd {{.*#+}} zmm0 {%k1} {z} = zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31]
; X64-NEXT: retq
%arg0 = bitcast i32 %a0 to <32 x i1>
%arg1 = bitcast <8 x i64> %a1 to <32 x i16>
%arg2 = bitcast <8 x i64> %a2 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg1, <32 x i16> %arg2, <32 x i32> <i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63>
%res1 = select <32 x i1> %arg0, <32 x i16> %res0, <32 x i16> zeroinitializer
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_unpacklo_epi8(<8 x i64> %a0, <8 x i64> %a1) {
; CHECK-LABEL: test_mm512_unpacklo_epi8:
; CHECK: # %bb.0:
; CHECK-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[32],zmm1[32],zmm0[33],zmm1[33],zmm0[34],zmm1[34],zmm0[35],zmm1[35],zmm0[36],zmm1[36],zmm0[37],zmm1[37],zmm0[38],zmm1[38],zmm0[39],zmm1[39],zmm0[48],zmm1[48],zmm0[49],zmm1[49],zmm0[50],zmm1[50],zmm0[51],zmm1[51],zmm0[52],zmm1[52],zmm0[53],zmm1[53],zmm0[54],zmm1[54],zmm0[55],zmm1[55]
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%arg1 = bitcast <8 x i64> %a1 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg0, <64 x i8> %arg1, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>
%res1 = bitcast <64 x i8> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_mask_unpacklo_epi8(<8 x i64> %a0, ptr %a1, <8 x i64> %a2, <8 x i64> %a3) {
; X86-LABEL: test_mm512_mask_unpacklo_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpunpcklbw {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[16],zmm2[16],zmm1[17],zmm2[17],zmm1[18],zmm2[18],zmm1[19],zmm2[19],zmm1[20],zmm2[20],zmm1[21],zmm2[21],zmm1[22],zmm2[22],zmm1[23],zmm2[23],zmm1[32],zmm2[32],zmm1[33],zmm2[33],zmm1[34],zmm2[34],zmm1[35],zmm2[35],zmm1[36],zmm2[36],zmm1[37],zmm2[37],zmm1[38],zmm2[38],zmm1[39],zmm2[39],zmm1[48],zmm2[48],zmm1[49],zmm2[49],zmm1[50],zmm2[50],zmm1[51],zmm2[51],zmm1[52],zmm2[52],zmm1[53],zmm2[53],zmm1[54],zmm2[54],zmm1[55],zmm2[55]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_unpacklo_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpunpcklbw {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[4],zmm2[4],zmm1[5],zmm2[5],zmm1[6],zmm2[6],zmm1[7],zmm2[7],zmm1[16],zmm2[16],zmm1[17],zmm2[17],zmm1[18],zmm2[18],zmm1[19],zmm2[19],zmm1[20],zmm2[20],zmm1[21],zmm2[21],zmm1[22],zmm2[22],zmm1[23],zmm2[23],zmm1[32],zmm2[32],zmm1[33],zmm2[33],zmm1[34],zmm2[34],zmm1[35],zmm2[35],zmm1[36],zmm2[36],zmm1[37],zmm2[37],zmm1[38],zmm2[38],zmm1[39],zmm2[39],zmm1[48],zmm2[48],zmm1[49],zmm2[49],zmm1[50],zmm2[50],zmm1[51],zmm2[51],zmm1[52],zmm2[52],zmm1[53],zmm2[53],zmm1[54],zmm2[54],zmm1[55],zmm2[55]
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <64 x i8>
%sel1 = load <64 x i1>, ptr %a1
%arg2 = bitcast <8 x i64> %a2 to <64 x i8>
%arg3 = bitcast <8 x i64> %a3 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg2, <64 x i8> %arg3, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>
%res1 = select <64 x i1> %sel1, <64 x i8> %res0, <64 x i8> %arg0
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_unpacklo_epi8(ptr %a0, <8 x i64> %a1, <8 x i64> %a2) {
; X86-LABEL: test_mm512_maskz_unpacklo_epi8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: kmovq (%eax), %k1
; X86-NEXT: vpunpcklbw {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[32],zmm1[32],zmm0[33],zmm1[33],zmm0[34],zmm1[34],zmm0[35],zmm1[35],zmm0[36],zmm1[36],zmm0[37],zmm1[37],zmm0[38],zmm1[38],zmm0[39],zmm1[39],zmm0[48],zmm1[48],zmm0[49],zmm1[49],zmm0[50],zmm1[50],zmm0[51],zmm1[51],zmm0[52],zmm1[52],zmm0[53],zmm1[53],zmm0[54],zmm1[54],zmm0[55],zmm1[55]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_unpacklo_epi8:
; X64: # %bb.0:
; X64-NEXT: kmovq (%rdi), %k1
; X64-NEXT: vpunpcklbw {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[32],zmm1[32],zmm0[33],zmm1[33],zmm0[34],zmm1[34],zmm0[35],zmm1[35],zmm0[36],zmm1[36],zmm0[37],zmm1[37],zmm0[38],zmm1[38],zmm0[39],zmm1[39],zmm0[48],zmm1[48],zmm0[49],zmm1[49],zmm0[50],zmm1[50],zmm0[51],zmm1[51],zmm0[52],zmm1[52],zmm0[53],zmm1[53],zmm0[54],zmm1[54],zmm0[55],zmm1[55]
; X64-NEXT: retq
%sel0 = load <64 x i1>, ptr %a0
%arg1 = bitcast <8 x i64> %a1 to <64 x i8>
%arg2 = bitcast <8 x i64> %a2 to <64 x i8>
%res0 = shufflevector <64 x i8> %arg1, <64 x i8> %arg2, <64 x i32> <i32 0, i32 64, i32 1, i32 65, i32 2, i32 66, i32 3, i32 67, i32 4, i32 68, i32 5, i32 69, i32 6, i32 70, i32 7, i32 71, i32 16, i32 80, i32 17, i32 81, i32 18, i32 82, i32 19, i32 83, i32 20, i32 84, i32 21, i32 85, i32 22, i32 86, i32 23, i32 87, i32 32, i32 96, i32 33, i32 97, i32 34, i32 98, i32 35, i32 99, i32 36, i32 100, i32 37, i32 101, i32 38, i32 102, i32 39, i32 103, i32 48, i32 112, i32 49, i32 113, i32 50, i32 114, i32 51, i32 115, i32 52, i32 116, i32 53, i32 117, i32 54, i32 118, i32 55, i32 119>
%res1 = select <64 x i1> %sel0, <64 x i8> %res0, <64 x i8> zeroinitializer
%res2 = bitcast <64 x i8> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_unpacklo_epi16(<8 x i64> %a0, <8 x i64> %a1) {
; CHECK-LABEL: test_mm512_unpacklo_epi16:
; CHECK: # %bb.0:
; CHECK-NEXT: vpunpcklwd {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27]
; CHECK-NEXT: ret{{[l|q]}}
%arg0 = bitcast <8 x i64> %a0 to <32 x i16>
%arg1 = bitcast <8 x i64> %a1 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg0, <32 x i16> %arg1, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>
%res1 = bitcast <32 x i16> %res0 to <8 x i64>
ret <8 x i64> %res1
}
define <8 x i64> @test_mm512_mask_unpacklo_epi16(<8 x i64> %a0, i32 %a1, <8 x i64> %a2, <8 x i64> %a3) {
; X86-LABEL: test_mm512_mask_unpacklo_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpunpcklwd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[16],zmm2[16],zmm1[17],zmm2[17],zmm1[18],zmm2[18],zmm1[19],zmm2[19],zmm1[24],zmm2[24],zmm1[25],zmm2[25],zmm1[26],zmm2[26],zmm1[27],zmm2[27]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_unpacklo_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpunpcklwd {{.*#+}} zmm0 {%k1} = zmm1[0],zmm2[0],zmm1[1],zmm2[1],zmm1[2],zmm2[2],zmm1[3],zmm2[3],zmm1[8],zmm2[8],zmm1[9],zmm2[9],zmm1[10],zmm2[10],zmm1[11],zmm2[11],zmm1[16],zmm2[16],zmm1[17],zmm2[17],zmm1[18],zmm2[18],zmm1[19],zmm2[19],zmm1[24],zmm2[24],zmm1[25],zmm2[25],zmm1[26],zmm2[26],zmm1[27],zmm2[27]
; X64-NEXT: retq
%arg0 = bitcast <8 x i64> %a0 to <32 x i16>
%arg1 = bitcast i32 %a1 to <32 x i1>
%arg2 = bitcast <8 x i64> %a2 to <32 x i16>
%arg3 = bitcast <8 x i64> %a3 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg2, <32 x i16> %arg3, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>
%res1 = select <32 x i1> %arg1, <32 x i16> %res0, <32 x i16> %arg0
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define <8 x i64> @test_mm512_maskz_unpacklo_epi16(i32 %a0, <8 x i64> %a1, <8 x i64> %a2) {
; X86-LABEL: test_mm512_maskz_unpacklo_epi16:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpunpcklwd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27]
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_unpacklo_epi16:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpunpcklwd {{.*#+}} zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27]
; X64-NEXT: retq
%arg0 = bitcast i32 %a0 to <32 x i1>
%arg1 = bitcast <8 x i64> %a1 to <32 x i16>
%arg2 = bitcast <8 x i64> %a2 to <32 x i16>
%res0 = shufflevector <32 x i16> %arg1, <32 x i16> %arg2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59>
%res1 = select <32 x i1> %arg0, <32 x i16> %res0, <32 x i16> zeroinitializer
%res2 = bitcast <32 x i16> %res1 to <8 x i64>
ret <8 x i64> %res2
}
define i64 @test_mm512_test_epi8_mask(<8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_test_epi8_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: vptestmb %zmm0, %zmm1, %k0
; X86-NEXT: kshiftrq $32, %k0, %k1
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: kmovd %k1, %edx
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_test_epi8_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: vptestmb %zmm0, %zmm1, %k0
; X64-NEXT: kmovq %k0, %rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <64 x i8>
%1 = icmp ne <64 x i8> %0, zeroinitializer
%2 = bitcast <64 x i1> %1 to i64
ret i64 %2
}
define i64 @test_mm512_mask_test_epi8_mask(i64 %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_test_epi8_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: vptestmb %zmm0, %zmm1, %k0
; X86-NEXT: kshiftrq $32, %k0, %k1
; X86-NEXT: kmovd %k1, %edx
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_test_epi8_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovq %rdi, %k1
; X64-NEXT: vptestmb %zmm0, %zmm1, %k0 {%k1}
; X64-NEXT: kmovq %k0, %rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <64 x i8>
%1 = icmp ne <64 x i8> %0, zeroinitializer
%2 = bitcast i64 %__U to <64 x i1>
%3 = and <64 x i1> %1, %2
%4 = bitcast <64 x i1> %3 to i64
ret i64 %4
}
define i32 @test_mm512_test_epi16_mask(<8 x i64> %__A, <8 x i64> %__B) {
; CHECK-LABEL: test_mm512_test_epi16_mask:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vptestmw %zmm0, %zmm1, %k0
; CHECK-NEXT: kmovd %k0, %eax
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: ret{{[l|q]}}
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <32 x i16>
%1 = icmp ne <32 x i16> %0, zeroinitializer
%2 = bitcast <32 x i1> %1 to i32
ret i32 %2
}
define i32 @test_mm512_mask_test_epi16_mask(i32 %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_test_epi16_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vptestmw %zmm0, %zmm1, %k0 {%k1}
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_test_epi16_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vptestmw %zmm0, %zmm1, %k0 {%k1}
; X64-NEXT: kmovd %k0, %eax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <32 x i16>
%1 = icmp ne <32 x i16> %0, zeroinitializer
%2 = bitcast i32 %__U to <32 x i1>
%3 = and <32 x i1> %1, %2
%4 = bitcast <32 x i1> %3 to i32
ret i32 %4
}
define i64 @test_mm512_testn_epi8_mask(<8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_testn_epi8_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: vptestnmb %zmm0, %zmm1, %k0
; X86-NEXT: kshiftrq $32, %k0, %k1
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: kmovd %k1, %edx
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_testn_epi8_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: vptestnmb %zmm0, %zmm1, %k0
; X64-NEXT: kmovq %k0, %rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <64 x i8>
%1 = icmp eq <64 x i8> %0, zeroinitializer
%2 = bitcast <64 x i1> %1 to i64
ret i64 %2
}
define i64 @test_mm512_mask_testn_epi8_mask(i64 %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_testn_epi8_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: vptestnmb %zmm0, %zmm1, %k0
; X86-NEXT: kshiftrq $32, %k0, %k1
; X86-NEXT: kmovd %k1, %edx
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_testn_epi8_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovq %rdi, %k1
; X64-NEXT: vptestnmb %zmm0, %zmm1, %k0 {%k1}
; X64-NEXT: kmovq %k0, %rax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <64 x i8>
%1 = icmp eq <64 x i8> %0, zeroinitializer
%2 = bitcast i64 %__U to <64 x i1>
%3 = and <64 x i1> %1, %2
%4 = bitcast <64 x i1> %3 to i64
ret i64 %4
}
define i32 @test_mm512_testn_epi16_mask(<8 x i64> %__A, <8 x i64> %__B) {
; CHECK-LABEL: test_mm512_testn_epi16_mask:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vptestnmw %zmm0, %zmm1, %k0
; CHECK-NEXT: kmovd %k0, %eax
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: ret{{[l|q]}}
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <32 x i16>
%1 = icmp eq <32 x i16> %0, zeroinitializer
%2 = bitcast <32 x i1> %1 to i32
ret i32 %2
}
define i32 @test_mm512_mask_testn_epi16_mask(i32 %__U, <8 x i64> %__A, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_testn_epi16_mask:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vptestnmw %zmm0, %zmm1, %k0 {%k1}
; X86-NEXT: kmovd %k0, %eax
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_testn_epi16_mask:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vptestnmw %zmm0, %zmm1, %k0 {%k1}
; X64-NEXT: kmovd %k0, %eax
; X64-NEXT: vzeroupper
; X64-NEXT: retq
entry:
%and1.i.i = and <8 x i64> %__B, %__A
%0 = bitcast <8 x i64> %and1.i.i to <32 x i16>
%1 = icmp eq <32 x i16> %0, zeroinitializer
%2 = bitcast i32 %__U to <32 x i1>
%3 = and <32 x i1> %1, %2
%4 = bitcast <32 x i1> %3 to i32
ret i32 %4
}
define <4 x i64> @test_mm512_cvtepi16_epi8(<8 x i64> %__A) {
; CHECK-LABEL: test_mm512_cvtepi16_epi8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpmovwb %zmm0, %ymm0
; CHECK-NEXT: ret{{[l|q]}}
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%conv.i = trunc <32 x i16> %0 to <32 x i8>
%1 = bitcast <32 x i8> %conv.i to <4 x i64>
ret <4 x i64> %1
}
define <4 x i64> @test_mm512_mask_cvtepi16_epi8(<4 x i64> %__O, i32 %__M, <8 x i64> %__A) {
; X86-LABEL: test_mm512_mask_cvtepi16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpmovwb %zmm1, %ymm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_cvtepi16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpmovwb %zmm1, %ymm0 {%k1}
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%conv.i.i = trunc <32 x i16> %0 to <32 x i8>
%1 = bitcast <4 x i64> %__O to <32 x i8>
%2 = bitcast i32 %__M to <32 x i1>
%3 = select <32 x i1> %2, <32 x i8> %conv.i.i, <32 x i8> %1
%4 = bitcast <32 x i8> %3 to <4 x i64>
ret <4 x i64> %4
}
define <4 x i64> @test_mm512_maskz_cvtepi16_epi8(i32 %__M, <8 x i64> %__A) {
; X86-LABEL: test_mm512_maskz_cvtepi16_epi8:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpmovwb %zmm0, %ymm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_cvtepi16_epi8:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpmovwb %zmm0, %ymm0 {%k1} {z}
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%conv.i.i = trunc <32 x i16> %0 to <32 x i8>
%1 = bitcast i32 %__M to <32 x i1>
%2 = select <32 x i1> %1, <32 x i8> %conv.i.i, <32 x i8> zeroinitializer
%3 = bitcast <32 x i8> %2 to <4 x i64>
ret <4 x i64> %3
}
define <8 x i64> @test_mm512_mask2_permutex2var_epi16(<8 x i64> %__A, <8 x i64> %__I, i32 %__U, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask2_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpermi2w %zmm2, %zmm0, %zmm1 {%k1}
; X86-NEXT: vmovdqa64 %zmm1, %zmm0
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask2_permutex2var_epi16:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpermi2w %zmm2, %zmm0, %zmm1 {%k1}
; X64-NEXT: vmovdqa64 %zmm1, %zmm0
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%1 = bitcast <8 x i64> %__I to <32 x i16>
%2 = bitcast <8 x i64> %__B to <32 x i16>
%3 = tail call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %0, <32 x i16> %1, <32 x i16> %2)
%4 = bitcast i32 %__U to <32 x i1>
%5 = select <32 x i1> %4, <32 x i16> %3, <32 x i16> %1
%6 = bitcast <32 x i16> %5 to <8 x i64>
ret <8 x i64> %6
}
define <8 x i64> @test_mm512_permutex2var_epi16(<8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {
; CHECK-LABEL: test_mm512_permutex2var_epi16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpermt2w %zmm2, %zmm1, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%1 = bitcast <8 x i64> %__I to <32 x i16>
%2 = bitcast <8 x i64> %__B to <32 x i16>
%3 = tail call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %0, <32 x i16> %1, <32 x i16> %2)
%4 = bitcast <32 x i16> %3 to <8 x i64>
ret <8 x i64> %4
}
define <8 x i64> @test_mm512_mask_permutex2var_epi16(<8 x i64> %__A, i32 %__U, <8 x i64> %__I, <8 x i64> %__B) {
; X86-LABEL: test_mm512_mask_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpermt2w %zmm2, %zmm1, %zmm0 {%k1}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_mask_permutex2var_epi16:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpermt2w %zmm2, %zmm1, %zmm0 {%k1}
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%1 = bitcast <8 x i64> %__I to <32 x i16>
%2 = bitcast <8 x i64> %__B to <32 x i16>
%3 = tail call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %0, <32 x i16> %1, <32 x i16> %2)
%4 = bitcast i32 %__U to <32 x i1>
%5 = select <32 x i1> %4, <32 x i16> %3, <32 x i16> %0
%6 = bitcast <32 x i16> %5 to <8 x i64>
ret <8 x i64> %6
}
define <8 x i64> @test_mm512_maskz_permutex2var_epi16(i32 %__U, <8 x i64> %__A, <8 x i64> %__I, <8 x i64> %__B) {
; X86-LABEL: test_mm512_maskz_permutex2var_epi16:
; X86: # %bb.0: # %entry
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1
; X86-NEXT: vpermt2w %zmm2, %zmm1, %zmm0 {%k1} {z}
; X86-NEXT: retl
;
; X64-LABEL: test_mm512_maskz_permutex2var_epi16:
; X64: # %bb.0: # %entry
; X64-NEXT: kmovd %edi, %k1
; X64-NEXT: vpermt2w %zmm2, %zmm1, %zmm0 {%k1} {z}
; X64-NEXT: retq
entry:
%0 = bitcast <8 x i64> %__A to <32 x i16>
%1 = bitcast <8 x i64> %__I to <32 x i16>
%2 = bitcast <8 x i64> %__B to <32 x i16>
%3 = tail call <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16> %0, <32 x i16> %1, <32 x i16> %2)
%4 = bitcast i32 %__U to <32 x i1>
%5 = select <32 x i1> %4, <32 x i16> %3, <32 x i16> zeroinitializer
%6 = bitcast <32 x i16> %5 to <8 x i64>
ret <8 x i64> %6
}
declare <32 x i16> @llvm.x86.avx512.vpermi2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>)
!0 = !{i32 1}