# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-cp-islands %s -o - --verify-machineinstrs | FileCheck %s
--- |
%struct.head_s = type { %struct.head_s*, %struct.data_s* }
%struct.data_s = type { i16, i16 }
define dso_local arm_aapcscc %struct.head_s* @search(%struct.head_s* readonly %list, %struct.data_s* nocapture readonly %info) local_unnamed_addr {
entry:
%idx = getelementptr inbounds %struct.data_s, %struct.data_s* %info, i32 0, i32 1
%tmp = load i16, i16* %idx, align 2
%cmp = icmp sgt i16 %tmp, -1
br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader
while.cond9.preheader: ; preds = %entry
%0 = icmp eq %struct.head_s* %list, null
br i1 %0, label %return, label %land.rhs11.lr.ph
land.rhs11.lr.ph: ; preds = %while.cond9.preheader
%data16143 = bitcast %struct.data_s* %info to i16*
%tmp1 = load i16, i16* %data16143, align 2
%conv15 = sext i16 %tmp1 to i32
br label %land.rhs11
while.cond.preheader: ; preds = %entry
%1 = icmp eq %struct.head_s* %list, null
br i1 %1, label %return, label %land.rhs.preheader
land.rhs.preheader: ; preds = %while.cond.preheader
br label %land.rhs
while.body: ; preds = %land.rhs
%next4 = bitcast %struct.head_s* %list.addr.033 to %struct.head_s**
%tmp4 = load %struct.head_s*, %struct.head_s** %next4, align 4
%tobool = icmp eq %struct.head_s* %tmp4, null
br i1 %tobool, label %return, label %land.rhs
land.rhs: ; preds = %land.rhs.preheader, %while.body
%list.addr.033 = phi %struct.head_s* [ %tmp4, %while.body ], [ %list, %land.rhs.preheader ]
%info2 = getelementptr inbounds %struct.head_s, %struct.head_s* %list.addr.033, i32 0, i32 1
%tmp2 = load %struct.data_s*, %struct.data_s** %info2, align 4
%idx3 = getelementptr inbounds %struct.data_s, %struct.data_s* %tmp2, i32 0, i32 1
%tmp3 = load i16, i16* %idx3, align 2
%cmp7 = icmp eq i16 %tmp3, %tmp
br i1 %cmp7, label %return, label %while.body
while.body19: ; preds = %land.rhs11
%next205 = bitcast %struct.head_s* %list.addr.136 to %struct.head_s**
%tmp8 = load %struct.head_s*, %struct.head_s** %next205, align 4
%tobool10 = icmp eq %struct.head_s* %tmp8, null
br i1 %tobool10, label %return, label %land.rhs11
land.rhs11: ; preds = %while.body19, %land.rhs11.lr.ph
%list.addr.136 = phi %struct.head_s* [ %list, %land.rhs11.lr.ph ], [ %tmp8, %while.body19 ]
%info12 = getelementptr inbounds %struct.head_s, %struct.head_s* %list.addr.136, i32 0, i32 1
%tmp5 = load %struct.data_s*, %struct.data_s** %info12, align 4
%data166 = bitcast %struct.data_s* %tmp5 to i16*
%tmp6 = load i16, i16* %data166, align 2
%2 = and i16 %tmp6, 255
%and = zext i16 %2 to i32
%cmp16 = icmp eq i32 %and, %conv15
br i1 %cmp16, label %return, label %while.body19
return: ; preds = %land.rhs11, %while.body19, %land.rhs, %while.body, %while.cond.preheader, %while.cond9.preheader
%retval.0 = phi %struct.head_s* [ null, %while.cond.preheader ], [ null, %while.cond9.preheader ], [ null, %while.body ], [ %list.addr.033, %land.rhs ], [ null, %while.body19 ], [ %list.addr.136, %land.rhs11 ]
ret %struct.head_s* %retval.0
}
...
---
name: search
alignment: 2
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins:
- { reg: '$r0', virtual-reg: '' }
- { reg: '$r1', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack: []
stack: []
callSites: []
constants: []
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: search
; CHECK: bb.0.entry:
; CHECK: successors: %bb.1(0x50000000), %bb.6(0x30000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx)
; CHECK: t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: tBcc %bb.6, 13 /* CC::le */, killed $cpsr
; CHECK: bb.1.while.cond.preheader:
; CHECK: successors: %bb.2(0x80000000)
; CHECK: liveins: $r0, $r2
; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2IT 0, 4, implicit-def $itstate
; CHECK: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
; CHECK: tB %bb.2, 14 /* CC::al */, $noreg
; CHECK: bb.2:
; CHECK: successors: %bb.3(0x80000000)
; CHECK: liveins: $r0, $r2
; CHECK: renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg
; CHECK: bb.3.land.rhs:
; CHECK: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info2)
; CHECK: renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx3)
; CHECK: tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: tBcc %bb.5, 0 /* CC::eq */, killed $cpsr
; CHECK: bb.4.while.body:
; CHECK: successors: %bb.3(0x80000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next4)
; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2IT 0, 4, implicit-def $itstate
; CHECK: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
; CHECK: tB %bb.3, 14 /* CC::al */, $noreg
; CHECK: bb.5.return:
; CHECK: liveins: $r0
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
; CHECK: bb.6.while.cond9.preheader:
; CHECK: successors: %bb.7(0x80000000)
; CHECK: liveins: $r0, $r1
; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2IT 0, 4, implicit-def $itstate
; CHECK: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
; CHECK: tB %bb.7, 14 /* CC::al */, $noreg
; CHECK: bb.7.land.rhs11.lr.ph:
; CHECK: successors: %bb.8(0x80000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r1 = t2LDRSHi12 killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (load (s16) from %ir.data16143)
; CHECK: bb.8.land.rhs11:
; CHECK: successors: %bb.9(0x80000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info12)
; CHECK: renamable $r2 = tLDRBi killed renamable $r2, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.data166, align 2)
; CHECK: tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2IT 0, 8, implicit-def $itstate
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
; CHECK: tB %bb.9, 14 /* CC::al */, $noreg
; CHECK: bb.9.while.body19:
; CHECK: successors: %bb.8(0x80000000)
; CHECK: liveins: $r0, $r1
; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next205)
; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2IT 0, 4, implicit-def $itstate
; CHECK: renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
; CHECK: tB %bb.8, 14 /* CC::al */, $noreg
bb.0.entry:
successors: %bb.2(0x50000000), %bb.1(0x30000000)
liveins: $r0, $r1
renamable $r2 = t2LDRSHi12 renamable $r1, 2, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx)
t2CMPri renamable $r2, -1, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2Bcc %bb.1, 13 /* CC::le */, killed $cpsr
bb.2.while.cond.preheader:
successors: %bb.3(0x50000000)
liveins: $r0, $r2
tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2IT 0, 4, implicit-def $itstate
renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
t2B %bb.3, 14 /* CC::al */, $noreg
bb.3:
successors: %bb.4(0x80000000)
liveins: $r0, $r2
renamable $r1 = tUXTH killed renamable $r2, 14 /* CC::al */, $noreg
bb.4.land.rhs:
successors: %bb.9(0x04000000), %bb.5(0x7c000000)
liveins: $r0, $r1
renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info2)
renamable $r2 = tLDRHi killed renamable $r2, 1, 14 /* CC::al */, $noreg :: (load (s16) from %ir.idx3)
tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2Bcc %bb.9, 0 /* CC::eq */, killed $cpsr
bb.5.while.body:
successors: %bb.4(0x7c000000)
liveins: $r0, $r1
renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next4)
tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2IT 0, 4, implicit-def $itstate
renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
t2B %bb.4, 14 /* CC::al */, $noreg
bb.9.return:
liveins: $r0
tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
bb.1.while.cond9.preheader:
successors: %bb.7(0x50000000)
liveins: $r0, $r1
tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2IT 0, 4, implicit-def $itstate
renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
t2B %bb.7, 14 /* CC::al */, $noreg
bb.7.land.rhs11.lr.ph:
successors: %bb.8(0x80000000)
liveins: $r0, $r1
renamable $r1 = t2LDRSHi12 killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (load (s16) from %ir.data16143)
bb.8.land.rhs11:
successors: %bb.6(0x80000000)
liveins: $r0, $r1
renamable $r2 = tLDRi renamable $r0, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.info12)
renamable $r2 = tLDRBi killed renamable $r2, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.data166, align 2)
tCMPr killed renamable $r2, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2IT 0, 8, implicit-def $itstate
tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
t2B %bb.6, 14 /* CC::al */, $noreg
bb.6.while.body19:
successors: %bb.8(0x7c000000)
liveins: $r0, $r1
renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s32) from %ir.next205)
tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
t2IT 0, 4, implicit-def $itstate
renamable $r0 = tMOVi8 $noreg, 0, 0 /* CC::eq */, $cpsr, implicit killed $r0, implicit $itstate
tBX_RET 0 /* CC::eq */, killed $cpsr, implicit $r0, implicit killed $itstate
t2B %bb.8, 14 /* CC::al */, $noreg
...