@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding < %s | FileCheck %s
@ RUN: llvm-mc -triple=thumbebv7-unknown-unknown -mcpu=cortex-a8 -show-encoding < %s | FileCheck --check-prefix=CHECK-BE %s
.syntax unified
.globl _func
@ Check that the assembler can handle the documented syntax from the ARM ARM.
@ For complex constructs like shifter operands, check more thoroughly for them
@ once then spot check that following instructions accept the form generally.
@ This gives us good coverage while keeping the overall size of the test
@ more reasonable.
@ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
_func:
@ CHECK: _func
@------------------------------------------------------------------------------
@ ADC (immediate)
@------------------------------------------------------------------------------
adc r0, r1, adcs r0, r1, adc r1, r2, adc r3, r7, adc r8, r12, adc r9, r7, adc r5, r3, adc r4, r2, adc r4, r2,
@ CHECK: adc r0, r1, @ CHECK: adcs r0, r1, @ CHECK: adc r1, r2, @ CHECK: adc r3, r7, @ CHECK: adc r8, r12, @ CHECK: adc r9, r7, @ CHECK: adc r5, r3, @ CHECK: adc r4, r2, @ CHECK: adc r4, r2,
@------------------------------------------------------------------------------
@ ADC (register)
@------------------------------------------------------------------------------
adc r4, r5, r6
adcs r4, r5, r6
adc.w r9, r1, r3
adcs.w r9, r1, r3
adc r0, r1, r3, ror adcs r0, r1, r3, lsl adc.w r0, r1, r3, lsr adcs.w r0, r1, r3, asr
@ CHECK: adc.w r4, r5, r6 @ encoding: [0x45,0xeb,0x06,0x04]
@ CHECK: adcs.w r4, r5, r6 @ encoding: [0x55,0xeb,0x06,0x04]
@ CHECK: adc.w r9, r1, r3 @ encoding: [0x41,0xeb,0x03,0x09]
@ CHECK: adcs.w r9, r1, r3 @ encoding: [0x51,0xeb,0x03,0x09]
@ CHECK: adc.w r0, r1, r3, ror @ CHECK: adcs.w r0, r1, r3, lsl @ CHECK: adc.w r0, r1, r3, lsr @ CHECK: adcs.w r0, r1, r3, asr
@------------------------------------------------------------------------------
@ ADD (immediate)
@------------------------------------------------------------------------------
itet eq
addeq r1, r2, addwne r5, r3, addeq r4, r5, add r2, sp, add r2, r8, add r2, r3, addw r2, r3, add r12, r6, addw r12, r6, adds r1, r2, add r2, add r0, r0, adds r2, r2, adds r2, add r1, r7,
adds.w r2, adds.w r2, r2, addw r2, addw r2, addw r2, r2,
@ CHECK: itet eq @ encoding: [0x0a,0xbf]
@ CHECK: addeq r1, r2, @ CHECK: addwne r5, r3, @ CHECK: addweq r4, r5, @ CHECK: add.w r2, sp, @ CHECK: add.w r2, r8, @ CHECK: addw r2, r3, @ CHECK: addw r2, r3, @ CHECK: add.w r12, r6, @ CHECK: addw r12, r6, @ CHECK: adds.w r1, r2, @ CHECK: add.w r2, r2, @ CHECK: add.w r0, r0, @ CHECK: adds r2, @ CHECK: adds r2, @ CHECK: add.w r1, r7,
@ CHECK: subs.w r2, r2, @ CHECK: subs.w r2, r2, @ CHECK: subw r2, r2, @ CHECK: subw r2, r2, @ CHECK: subw r2, r2,
@------------------------------------------------------------------------------
@ ADD (register, not SP) A8.8.6
@------------------------------------------------------------------------------
add r1, r2, r8
add r5, r9, r2, asr adds r7, r3, r1, lsl adds.w r0, r3, r6, lsr add.w r4, r8, r1, ror adds r1, r1, r7 // T1
it eq
addeq r1, r3, r5 // T1
it eq
addeq r1, r1, r5 // T1
it eq
addseq r1, r3, r5 // T3
it eq
addseq r1, r1, r5 // T3
add r10, r8
add r10, r10, r8
it eq
addeq r1, r10 // T2
it eq
addseq r1, r10 // T3
@ CHECK: add.w r1, r2, r8 @ encoding: [0x02,0xeb,0x08,0x01]
@ CHECK: add.w r5, r9, r2, asr @ CHECK: adds.w r7, r3, r1, lsl @ CHECK: adds.w r0, r3, r6, lsr @ CHECK: add.w r4, r8, r1, ror @ CHECK: adds r1, r1, r7 @ encoding: [0xc9,0x19]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addeq r1, r3, r5 @ encoding: [0x59,0x19]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addeq r1, r1, r5 @ encoding: [0x49,0x19]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addseq.w r1, r3, r5 @ encoding: [0x13,0xeb,0x05,0x01]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addseq.w r1, r1, r5 @ encoding: [0x11,0xeb,0x05,0x01]
@ CHECK: add r10, r8 @ encoding: [0xc2,0x44]
@ CHECK: add r10, r8 @ encoding: [0xc2,0x44]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addeq r1, r10 @ encoding: [0x51,0x44]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: addseq.w r1, r1, r10 @ encoding: [0x11,0xeb,0x0a,0x01]
@------------------------------------------------------------------------------
@ ADD (SP plus immediate) A8.8.9
@------------------------------------------------------------------------------
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq r7, sp, @ CHECK: addeq r7, sp,
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq sp, sp, @ FIXME: ARMARM says 'addeq sp, sp, #508'
@ CHECK: addeq sp,
add r7, sp, @ CHECK: add.w r7, sp, adds r7, sp, @ CHECK: adds.w r7, sp, add r8, sp, @ CHECK: add.w r8, sp,
addw r6, sp, @ CHECK: addw r6, sp, add r6, sp, @ CHECK: addw r6, sp, addw r0, r0, addw r0, add r0, r0, add r0, @ CHECK-NEXT: addw r0, r0, @ CHECK-NEXT: addw r0, r0, @ CHECK-NEXT: addw r0, r0, @ CHECK-NEXT: addw r0, r0, add.w r0, r0, add r0, r0, add.w r0, add r0, @ CHECK-NEXT: sub.w r0, r0, @ CHECK-NEXT: sub.w r0, r0, @ CHECK-NEXT: sub.w r0, r0, @ CHECK-NEXT: sub.w r0, r0, adds.w r0, r0, adds r0, r0, adds.w r0, adds r0, @ CHECK-NEXT: subs.w r0, r0, @ CHECK-NEXT: subs.w r0, r0, @ CHECK-NEXT: subs.w r0, r0, @ CHECK-NEXT: subs.w r0, r0, @------------------------------------------------------------------------------
@ ADD (SP plus immediate, writing to SP)
@------------------------------------------------------------------------------
add.w sp, sp, add.w sp, add sp, sp, add sp, @ CHECK-NEXT: add.w sp, sp, @ CHECK-NEXT: add.w sp, sp, @ CHECK-NEXT: add.w sp, sp, @ CHECK-NEXT: add.w sp, sp, adds.w sp, sp, adds.w sp, adds sp, sp, adds sp, @ CHECK-NEXT: adds.w sp, sp, @ CHECK-NEXT: adds.w sp, sp, @ CHECK-NEXT: adds.w sp, sp, @ CHECK-NEXT: adds.w sp, sp, addw sp, sp, add sp, sp, addw sp, add sp, @ CHECK-NEXT: addw sp, sp, @ CHECK-NEXT: addw sp, sp, @ CHECK-NEXT: addw sp, sp, @ CHECK-NEXT: addw sp, sp, add sp, sp, add sp, @ CHECK-NEXT: add sp, @ CHECK-NEXT: add sp, adds sp, sp, adds sp, @ CHECK-NEXT: adds.w sp, sp, @ CHECK-NEXT: adds.w sp, sp, add r0, sp, @ CHECK-NEXT: add r0, sp, adds r0, sp, @ CHECK-NEXT: adds.w r0, sp, addw r0, sp, @ CHECK-NEXT: addw r0, sp, @------------------------------------------------------------------------------
@ ADD (SP plus negative immediate, writing to SP)
@------------------------------------------------------------------------------
add sp, sp, add sp, @ CHECK-NEXT: sub sp, @ CHECK-NEXT: sub sp, addw sp, sp, add sp, sp, addw sp, add sp, @ CHECK-NEXT: subw sp, sp, @ CHECK-NEXT: subw sp, sp, @ CHECK-NEXT: subw sp, sp, @ CHECK-NEXT: subw sp, sp, add.w sp, sp, add sp, sp, add.w sp, add sp, @ CHECK-NEXT: sub.w sp, sp, @ CHECK-NEXT: sub.w sp, sp, @ CHECK-NEXT: sub.w sp, sp, @ CHECK-NEXT: sub.w sp, sp, adds.w sp, sp, adds sp, sp, adds.w sp, adds sp, @ CHECK-NEXT: subs.w sp, sp, @ CHECK-NEXT: subs.w sp, sp, @ CHECK-NEXT: subs.w sp, sp, @ CHECK-NEXT: subs.w sp, sp, @------------------------------------------------------------------------------
@ ADD (SP plus register) A8.8.10
@------------------------------------------------------------------------------
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq r8, sp, r8 // T1
@ CHECK: addeq r8, sp, r8 @ encoding: [0xe8,0x44]
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq r8, sp // T1
@ CHECK: addeq r8, sp @ encoding: [0xe8,0x44]
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq sp, r9 // T2
@ CHECK: addeq sp, r9 @ encoding: [0xcd,0x44]
add r2, sp, ip // T3
@ CHECK: add.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
it eq
@ CHECK: it eq @ encoding: [0x08,0xbf]
addeq r2, sp, ip // T3
@ CHECK: addeq.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
add.w r0, sp, r0, ror add r0, sp, r0, ror add sp, r1, lsl adds.w r0, sp, r0, ror adds r0, sp, r0, ror adds.w sp, sp, r0, ror adds sp, sp, r0, ror adds sp, r0, ror @ CHECK-NEXT: add.w r0, sp, r0, ror @ CHECK-NEXT: add.w r0, sp, r0, ror @ CHECK-NEXT: add.w sp, sp, r1, lsl @ CHECK-NEXT: adds.w r0, sp, r0, ror @ CHECK-NEXT: adds.w r0, sp, r0, ror @ CHECK-NEXT: adds.w sp, sp, r0, ror @ CHECK-NEXT: adds.w sp, sp, r0, ror @ CHECK-NEXT: adds.w sp, sp, r0, ror @------------------------------------------------------------------------------
@ FIXME: ADR
@------------------------------------------------------------------------------
subw r11, pc, adr.w r2, adr.w r11, adr.w r1,
@ CHECK: subw r11, pc, @ CHECK: adr.w r2, @ CHECK: adr.w r11, @ CHECK: adr.w r1,
@------------------------------------------------------------------------------
@ AND (immediate)
@------------------------------------------------------------------------------
and r2, r5, ands r3, r12, and r1, and r1, r1, and r5, r4, ands r1, r9,
@ CHECK: and r2, r5, @ CHECK: ands r3, r12, @ CHECK: and r1, r1, @ CHECK: and r1, r1, @ CHECK: and r5, r4, @ CHECK: ands r1, r9,
@------------------------------------------------------------------------------
@ AND (register)
@------------------------------------------------------------------------------
and r4, r9, r8
and r1, r4, r8, asr ands r2, r1, r7, lsl ands.w r4, r5, r2, lsr and.w r9, r12, r1, ror
@ CHECK: and.w r4, r9, r8 @ encoding: [0x09,0xea,0x08,0x04]
@ CHECK: and.w r1, r4, r8, asr @ CHECK: ands.w r2, r1, r7, lsl @ CHECK: ands.w r4, r5, r2, lsr @ CHECK: and.w r9, r12, r1, ror
@------------------------------------------------------------------------------
@ ASR (immediate)
@------------------------------------------------------------------------------
asr r2, r3, asrs r8, r3, asrs.w r2, r3, asr r2, r3, asrs r2, r12,
asr r3, asrs r8, asrs.w r7, asr.w r12,
asrs r1, r2, itt eq
asrseq r1, r2, asreq r1, r2,
@ CHECK: asr.w r2, r3, @ CHECK: asrs.w r8, r3, @ CHECK: asrs.w r2, r3, @ CHECK: asr.w r2, r3, @ CHECK: asrs.w r2, r12,
@ CHECK: asr.w r3, r3, @ CHECK: asrs.w r8, r8, @ CHECK: asrs.w r7, r7, @ CHECK: asr.w r12, r12,
@ CHECK: asrs r1, r2, @ CHECK: itt eq @ encoding: [0x04,0xbf]
@ CHECK: asrseq.w r1, r2, @ CHECK: asreq r1, r2,
@------------------------------------------------------------------------------
@ ASR (register)
@------------------------------------------------------------------------------
asr r3, r4, r2
asr.w r1, r2
asrs r3, r4, r8
@ CHECK: asr.w r3, r4, r2 @ encoding: [0x44,0xfa,0x02,0xf3]
@ CHECK: asr.w r1, r1, r2 @ encoding: [0x41,0xfa,0x02,0xf1]
@ CHECK: asrs.w r3, r4, r8 @ encoding: [0x54,0xfa,0x08,0xf3]
@------------------------------------------------------------------------------
@ B
@------------------------------------------------------------------------------
b.w _bar
beq.w _bar
it eq
beq.w _bar
bmi.w
@ CHECK: b.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK-BE: b.w _bar @ encoding: [0xf0'A',A,0x90'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x80'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x80'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_condbranch
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: beq.w _bar @ encoding: [A,0xf0'A',A,0x90'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK-BE: beq.w _bar @ encoding: [0xf0'A',A,0x90'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_t2_uncondbranch
@ CHECK: bmi.w
@------------------------------------------------------------------------------
@ BFC
@------------------------------------------------------------------------------
bfc r5, it lo
bfccc r5,
@ CHECK: bfc r5, @ CHECK: it lo @ encoding: [0x38,0xbf]
@ CHECK: bfclo r5,
@------------------------------------------------------------------------------
@ BFI
@------------------------------------------------------------------------------
bfi r5, r2, it ne
bfine r5, r2,
@ CHECK: bfi r5, r2, @ CHECK: it ne @ encoding: [0x18,0xbf]
@ CHECK: bfine r5, r2,
@------------------------------------------------------------------------------
@ BIC
@------------------------------------------------------------------------------
bic r10, r1, bic r5, r2, bics r11, r10, bic r12, r3, r6
bic r11, r2, r6, lsl bic r8, r4, r1, lsr bic r7, r5, r7, lsr bic r6, r7, r9, asr bic r5, r6, r8, ror
@ destination register is optional
bic r1, bic r1, r1
bic r4, r2, lsl bic r6, r3, lsr bic r7, r4, lsr bic r8, r5, asr bic r12, r6, ror
@ CHECK: bic r10, r1, @ CHECK: bic r5, r2, @ CHECK: bics r11, r10, @ CHECK: bic.w r12, r3, r6 @ encoding: [0x23,0xea,0x06,0x0c]
@ CHECK: bic.w r11, r2, r6, lsl @ CHECK: bic.w r8, r4, r1, lsr @ CHECK: bic.w r7, r5, r7, lsr @ CHECK: bic.w r6, r7, r9, asr @ CHECK: bic.w r5, r6, r8, ror
@ CHECK: bic r1, r1, @ CHECK: bic.w r1, r1, r1 @ encoding: [0x21,0xea,0x01,0x01]
@ CHECK: bic.w r4, r4, r2, lsl @ CHECK: bic.w r6, r6, r3, lsr @ CHECK: bic.w r7, r7, r4, lsr @ CHECK: bic.w r8, r8, r5, asr @ CHECK: bic.w r12, r12, r6, ror
@------------------------------------------------------------------------------
@ BKPT
@------------------------------------------------------------------------------
it pl
bkpt
@ CHECK: it pl @ encoding: [0x58,0xbf]
@ CHECK: bkpt
@------------------------------------------------------------------------------
@ BXJ
@------------------------------------------------------------------------------
bxj r5
it ne
bxjne r7
@ CHECK: bxj r5 @ encoding: [0xc5,0xf3,0x00,0x8f]
@ CHECK: it ne @ encoding: [0x18,0xbf]
@ CHECK: bxjne r7 @ encoding: [0xc7,0xf3,0x00,0x8f]
@------------------------------------------------------------------------------
@ CBZ/CBNZ
@------------------------------------------------------------------------------
cbnz r7, cbnz r7, cbz r6, _bar
cbnz r6, _bar
@ CHECK: cbnz r7, @ CHECK: cbnz r7, @ CHECK: cbz r6, _bar @ encoding: [0x06'A',0xb1'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@ CHECK-BE: cbz r6, _bar @ encoding: [0xb1'A',0x06'A']
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@ CHECK: cbnz r6, _bar @ encoding: [0x06'A',0xb9'A']
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@ CHECK-BE: cbnz r6, _bar @ encoding: [0xb9'A',0x06'A']
@ CHECK-BE: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_cb
@------------------------------------------------------------------------------
@ CDP/CDP2
@------------------------------------------------------------------------------
cdp p7, cdp2 p7,
@ CHECK: cdp p7, @ CHECK: cdp2 p7,
@------------------------------------------------------------------------------
@ CLREX
@------------------------------------------------------------------------------
clrex
it ne
clrexne
@ CHECK: clrex @ encoding: [0xbf,0xf3,0x2f,0x8f]
@ CHECK: it ne @ encoding: [0x18,0xbf]
@ CHECK: clrexne @ encoding: [0xbf,0xf3,0x2f,0x8f]
@------------------------------------------------------------------------------
@ CLZ
@------------------------------------------------------------------------------
clz r1, r2
it eq
clzeq r1, r2
@ CHECK: clz r1, r2 @ encoding: [0xb2,0xfa,0x82,0xf1]
@ CHECK: it eq @ encoding: [0x08,0xbf]
@ CHECK: clzeq r1, r2 @ encoding: [0xb2,0xfa,0x82,0xf1]
@------------------------------------------------------------------------------
@ CMN
@------------------------------------------------------------------------------
cmn r1, cmn r8, r6
cmn r1, r6, lsl cmn r1, r6, lsr cmn sp, r6, lsr cmn r1, r6, asr cmn r1, r6, ror
@ CHECK: cmn.w r1, @ CHECK: cmn.w r8, r6 @ encoding: [0x18,0xeb,0x06,0x0f]
@ CHECK: cmn.w r1, r6, lsl @ CHECK: cmn.w r1, r6, lsr @ CHECK: cmn.w sp, r6, lsr @ CHECK: cmn.w r1, r6, asr @ CHECK: cmn.w r1, r6, ror
@------------------------------------------------------------------------------
@ CMP
@------------------------------------------------------------------------------
cmp r5, cmp.w r4, r12
cmp r9, r6, lsl cmp r3, r7, lsr cmp sp, r6, lsr cmp r2, r5, asr cmp r1, r4, ror cmp r2, cmp r9,
@ CHECK: cmp.w r5, @ CHECK: cmp.w r4, r12 @ encoding: [0xb4,0xeb,0x0c,0x0f]
@ CHECK: cmp.w r9, r6, lsl @ CHECK: cmp.w r3, r7, lsr @ CHECK: cmp.w sp, r6, lsr @ CHECK: cmp.w r2, r5, asr @ CHECK: cmp.w r1, r4, ror @ CHECK: cmn.w r2, @ CHECK: cmp.w r9,
@------------------------------------------------------------------------------
@ CPS
@------------------------------------------------------------------------------
cpsie f
cpsid a
cpsie.w f
cpsid.w a
cpsie i, cpsie.w i, cpsid f, cpsid.w f, cps cps.w
@ CHECK: cpsie f @ encoding: [0x61,0xb6]
@ CHECK: cpsid a @ encoding: [0x74,0xb6]
@ CHECK: cpsie.w f @ encoding: [0xaf,0xf3,0x20,0x84]
@ CHECK: cpsid.w a @ encoding: [0xaf,0xf3,0x80,0x86]
@ CHECK: cpsie i, @ CHECK: cpsie i, @ CHECK: cpsid f, @ CHECK: cpsid f, @ CHECK: cps @ CHECK: cps
@------------------------------------------------------------------------------
@ DBG
@------------------------------------------------------------------------------
dbg dbg dbg dbg.w it ne
dbgne.w
@ CHECK: dbg @ CHECK: dbg @ CHECK: dbg @ CHECK: dbg @ CHECK: it ne @ encoding: [0x18,0xbf]
@ CHECK: dbgne
@------------------------------------------------------------------------------
@ DMB
@------------------------------------------------------------------------------
dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb dmb
dmb sy
dmb.w sy
dmb st
dmb sh
dmb ish
dmb shst
dmb ishst
dmb un
dmb nsh
dmb unst
dmb nshst
dmb osh
dmb oshst
dmb
dmb.w
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f]
@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f]
@ CHECK: dmb @ CHECK: dmb @ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f]
@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f]
@ CHECK: dmb @ CHECK: dmb
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f]
@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f]
@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f]
@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f]
@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f]
@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f]
@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f]
@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f]
@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f]
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f]
@------------------------------------------------------------------------------
@ DSB
@------------------------------------------------------------------------------
dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb dsb
dsb sy
dsb.w sy
dsb st
dsb sh
dsb ish
dsb shst
dsb ishst
dsb un
dsb nsh
dsb unst
dsb nshst
dsb osh
dsb oshst
dsb
dsb.w
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
@ CHECK: dsb @ CHECK: dsb @ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
@ CHECK: dsb @ CHECK: dsb @ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
@ CHECK: dsb @ CHECK: pssbb @ encoding: [0xbf,0xf3,0x44,0x8f]
@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
@ CHECK: dsb @ CHECK: ssbb @ encoding: [0xbf,0xf3,0x40,0x8f]
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f]
@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f]
@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@------------------------------------------------------------------------------
@ EOR
@------------------------------------------------------------------------------
eor r4, r5, eor r4, r5, r6
eor r4, r5, r6, lsl eor r4, r5, r6, lsr eor r4, r5, r6, lsr eor r4, r5, r6, asr eor r4, r5, r6, ror
@ CHECK: eor r4, r5, @ CHECK: eor.w r4, r5, r6 @ encoding: [0x85,0xea,0x06,0x04]
@ CHECK: eor.w r4, r5, r6, lsl @ CHECK: eor.w r4, r5, r6, lsr @ CHECK: eor.w r4, r5, r6, lsr @ CHECK: eor.w r4, r5, r6, asr @ CHECK: eor.w r4, r5, r6, ror
@------------------------------------------------------------------------------
@ ISB
@------------------------------------------------------------------------------
isb sy
isb.w sy
isb
isb.w
isb isb
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb sy @ encoding: [0xbf,0xf3,0x6f,0x8f]
@ CHECK: isb
@------------------------------------------------------------------------------
@ IT
@------------------------------------------------------------------------------
@ Test encodings of a few full IT blocks, not just the IT instruction
iteet eq
addeq r0, r1, r2
nopne
subne r5, r6, r7
addeq r1, r2,
@ CHECK: iteet eq @ encoding: [0x0d,0xbf]
@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18]
@ CHECK: nopne @ encoding: [0x00,0xbf]
@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
@ CHECK: addeq r1, r2,
@ Should also work for UPPER CASE condition codes.
ITEET EQ
ADDEQ R0, R1, R2
NOPNE
SUBNE R5, R6, R7
ADDEQ R1, R2,
@ CHECK: iteet eq @ encoding: [0x0d,0xbf]
@ CHECK: addeq r0, r1, r2 @ encoding: [0x88,0x18]
@ CHECK: nopne @ encoding: [0x00,0xbf]
@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
@ CHECK: addeq r1, r2,
@------------------------------------------------------------------------------
@ LDC{L}/LDC2{L}
@------------------------------------------------------------------------------
ldc2 p0, c8, [r1, ldc2 p1, c7, [r2]
ldc2 p2, c6, [r3, ldc2 p3, c5, [r4, ldc2 p4, c4, [r5], ldc2 p5, c3, [r6], ldc2l p6, c2, [r7, ldc2l p7, c1, [r8]
ldc2l p8, c0, [r9, ldc2l p9, c1, [r10, ldc2l p0, c2, [r11], ldc2l p1, c3, [r12],
ldc p12, c4, [r0, ldc p13, c5, [r1]
ldc p14, c6, [r2, ldc p15, c7, [r3, ldc p5, c8, [r4], ldc p4, c9, [r5], ldcl p3, c10, [r6, ldcl p2, c11, [r7]
ldcl p1, c12, [r8, ldcl p0, c13, [r9, ldcl p6, c14, [r10], ldcl p7, c15, [r11],
ldc2 p2, c8, [r1], { 25 }
@ CHECK: ldc2 p0, c8, [r1, @ CHECK: ldc2 p1, c7, [r2] @ encoding: [0x92,0xfd,0x00,0x71]
@ CHECK: ldc2 p2, c6, [r3, @ CHECK: ldc2 p3, c5, [r4, @ CHECK: ldc2 p4, c4, [r5], @ CHECK: ldc2 p5, c3, [r6], @ CHECK: ldc2l p6, c2, [r7, @ CHECK: ldc2l p7, c1, [r8] @ encoding: [0xd8,0xfd,0x00,0x17]
@ CHECK: ldc2l p8, c0, [r9, @ CHECK: ldc2l p9, c1, [r10, @ CHECK: ldc2l p0, c2, [r11], @ CHECK: ldc2l p1, c3, [r12],
@ CHECK: ldc p12, c4, [r0, @ CHECK: ldc p13, c5, [r1] @ encoding: [0x91,0xed,0x00,0x5d]
@ CHECK: ldc p14, c6, [r2, @ CHECK: ldc p15, c7, [r3, @ CHECK: ldc p5, c8, [r4], @ CHECK: ldc p4, c9, [r5], @ CHECK: ldcl p3, c10, [r6, @ CHECK: ldcl p2, c11, [r7] @ encoding: [0xd7,0xed,0x00,0xb2]
@ CHECK: ldcl p1, c12, [r8, @ CHECK: ldcl p0, c13, [r9, @ CHECK: ldcl p6, c14, [r10], @ CHECK: ldcl p7, c15, [r11],
@ CHECK: ldc2 p2, c8, [r1], {25} @ encoding: [0x91,0xfc,0x19,0x82]
@------------------------------------------------------------------------------
@ LDMIA
@------------------------------------------------------------------------------
ldmia.w r4, {r4, r5, r8, r9}
ldmia.w r4, {r5, r6}
ldmia.w r5!, {r3, r8}
ldm.w r4, {r4, r5, r8, r9}
ldm.w r4, {r5, r6}
ldm.w r5!, {r3, r8}
ldm.w r5!, {r1, r2}
ldm.w r2, {r1, r2}
ldmia r4, {r4, r5, r8, r9}
ldmia r4, {r5, r6}
ldmia r5!, {r3, r8}
ldm r4, {r4, r5, r8, r9}
ldm r4, {r5, r6}
ldm r5!, {r3, r8}
ldmfd r5!, {r3, r8}
ldmia sp!, {r4-r11, pc}
@ CHECK: ldm.w r4, {r4, r5, r8, r9} @ encoding: [0x94,0xe8,0x30,0x03]
@ CHECK: ldm.w r4, {r5, r6} @ encoding: [0x94,0xe8,0x60,0x00]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: ldm.w r4, {r4, r5, r8, r9} @ encoding: [0x94,0xe8,0x30,0x03]
@ CHECK: ldm.w r4, {r5, r6} @ encoding: [0x94,0xe8,0x60,0x00]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: ldm.w r5!, {r1, r2} @ encoding: [0xb5,0xe8,0x06,0x00]
@ CHECK: ldm.w r2, {r1, r2} @ encoding: [0x92,0xe8,0x06,0x00]
@ CHECK: ldm.w r4, {r4, r5, r8, r9} @ encoding: [0x94,0xe8,0x30,0x03]
@ CHECK: ldm.w r4, {r5, r6} @ encoding: [0x94,0xe8,0x60,0x00]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: ldm.w r4, {r4, r5, r8, r9} @ encoding: [0x94,0xe8,0x30,0x03]
@ CHECK: ldm.w r4, {r5, r6} @ encoding: [0x94,0xe8,0x60,0x00]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: ldm.w r5!, {r3, r8} @ encoding: [0xb5,0xe8,0x08,0x01]
@ CHECK: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc} @ encoding: [0xbd,0xe8,0xf0,0x8f]
@------------------------------------------------------------------------------
@ LDMDB
@------------------------------------------------------------------------------
ldmdb r4, {r4, r5, r8, r9}
ldmdb r4, {r5, r6}
ldmdb r5!, {r3, r8}
ldmea r5!, {r3, r8}
ldmdb.w r4, {r5, r6}
ldmdb.w r5!, {r3, r8}
@ CHECK: ldmdb r4, {r4, r5, r8, r9} @ encoding: [0x14,0xe9,0x30,0x03]
@ CHECK: ldmdb r4, {r5, r6} @ encoding: [0x14,0xe9,0x60,0x00]
@ CHECK: ldmdb r5!, {r3, r8} @ encoding: [0x35,0xe9,0x08,0x01]
@ CHECK: ldmdb r5!, {r3, r8} @ encoding: [0x35,0xe9,0x08,0x01]
@ CHECK: ldmdb r4, {r5, r6} @ encoding: [0x14,0xe9,0x60,0x00]
@ CHECK: ldmdb r5!, {r3, r8} @ encoding: [0x35,0xe9,0x08,0x01]
@------------------------------------------------------------------------------
@ LDR(immediate)
@------------------------------------------------------------------------------
ldr r5, [r5, ldr r5, [r6, ldr r5, [r6, ldr r5, [r6, ldr.w pc, [r7, ldr r2, [r4, ldr r8, [sp, ldr lr, [sp, ldr r2, [r4], ldr r8, [sp], ldr lr, [sp],
@ CHECK: ldr r5, [r5, @ CHECK: ldr r5, [r6, @ CHECK: ldr.w r5, [r6, @ CHECK: ldr.w r5, [r6, @ CHECK: ldr.w pc, [r7, @ CHECK: ldr r2, [r4, @ CHECK: ldr r8, [sp, @ CHECK: ldr lr, [sp, @ CHECK: ldr r2, [r4], @ CHECK: ldr r8, [sp], @ CHECK: ldr lr, [sp],
@------------------------------------------------------------------------------
@ LDR(literal)
@------------------------------------------------------------------------------
ldr.w r5, _foo
ldr lr, (_strcmp-4)
ldr sp, _foo
ldr pc, _foo
@ CHECK: ldr.w r5, _foo @ encoding: [0x5f'A',0xf8'A',A,0x50'A']
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK-BE: ldr.w r5, _foo @ encoding: [0xf8'A',0x5f'A',0x50'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK: ldr.w lr, _strcmp-4 @ encoding: [0x5f'A',0xf8'A',A,0xe0'A']
@ CHECK: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
@ CHECK-BE: ldr.w lr, _strcmp-4 @ encoding: [0xf8'A',0x5f'A',0xe0'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _strcmp-4, kind: fixup_t2_ldst_pcrel_12
@ CHECK: ldr.w sp, _foo @ encoding: [0x5f'A',0xf8'A',A,0xd0'A']
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK-BE: ldr.w sp, _foo @ encoding: [0xf8'A',0x5f'A',0xd0'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK: ldr.w pc, _foo @ encoding: [0x5f'A',0xf8'A',A,0xf0'A']
@ CHECK: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
@ CHECK-BE: ldr.w pc, _foo @ encoding: [0xf8'A',0x5f'A',0xf0'A',A]
@ CHECK-BE: @ fixup A - offset: 0, value: _foo, kind: fixup_t2_ldst_pcrel_12
ldr r7, [pc, ldr.n r7, [pc, ldr.w r7, [pc, ldr r4, [pc, ldr r3, [pc, ldr r6, [pc, ldr r0, [pc, ldr r2, [pc, ldr r1, [pc, ldr r8, [pc, ldr pc, [pc, ldr pc, [pc, ldr sp, [pc,
@ CHECK: ldr r7, [pc, @ CHECK: ldr r7, [pc, @ CHECK: ldr.w r7, [pc, @ CHECK: ldr r4, [pc, @ CHECK: ldr.w r3, [pc, @ CHECK: ldr.w r6, [pc, @ CHECK: ldr.w r0, [pc, @ CHECK: ldr.w r2, [pc, @ CHECK: ldr.w r1, [pc, @ CHECK: ldr.w r8, [pc, @ CHECK: ldr.w pc, [pc, @ CHECK: ldr.w pc, [pc, @ CHECK: ldr.w sp, [pc,
ldrb r9, [pc, ldrsb r11, [pc, ldrh r10, [pc, ldrsh r1, [pc, ldr r5, [pc,
@ CHECK: ldrb.w r9, [pc, @ CHECK: ldrsb.w r11, [pc, @ CHECK: ldrh.w r10, [pc, @ CHECK: ldrsh.w r1, [pc, @ CHECK: ldr.w r5, [pc,
@------------------------------------------------------------------------------
@ LDR(register)
@------------------------------------------------------------------------------
ldr r1, [r8, r1]
ldr.w r4, [r5, r2]
ldr r6, [r0, r2, lsl ldr r8, [r8, r2, lsl ldr r7, [sp, r2, lsl ldr r7, [sp, r2, lsl
@ CHECK: ldr.w r1, [r8, r1] @ encoding: [0x58,0xf8,0x01,0x10]
@ CHECK: ldr.w r4, [r5, r2] @ encoding: [0x55,0xf8,0x02,0x40]
@ CHECK: ldr.w r6, [r0, r2, lsl @ CHECK: ldr.w r8, [r8, r2, lsl @ CHECK: ldr.w r7, [sp, r2, lsl @ CHECK: ldr.w r7, [sp, r2] @ encoding: [0x5d,0xf8,0x02,0x70]
@------------------------------------------------------------------------------
@ LDRB(immediate)
@------------------------------------------------------------------------------
ldrb r5, [r5, ldrb r5, [r6, ldrb r5, [r6, ldrb r5, [r6, ldrb.w lr, [r7, ldrb r5, [r8, ldrb r2, [r5, ldrb r1, [r4, ldrb lr, [r3], ldrb r9, [r2], ldrb r3, [sp],
@ CHECK: ldrb r5, [r5, @ CHECK: ldrb.w r5, [r6, @ CHECK: ldrb.w r5, [r6, @ CHECK: ldrb.w r5, [r6, @ CHECK: ldrb.w lr, [r7, @ CHECK: ldrb r5, [r8, @ CHECK: ldrb r2, [r5, @ CHECK: ldrb r1, [r4, @ CHECK: ldrb lr, [r3], @ CHECK: ldrb r9, [r2], @ CHECK: ldrb r3, [sp],
@------------------------------------------------------------------------------
@ LDRB(register)
@------------------------------------------------------------------------------
ldrb r1, [r8, r1]
ldrb.w r4, [r5, r2]
ldrb r6, [r0, r2, lsl ldrb r8, [r8, r2, lsl ldrb r7, [sp, r2, lsl ldrb r7, [sp, r2, lsl
@ CHECK: ldrb.w r1, [r8, r1] @ encoding: [0x18,0xf8,0x01,0x10]
@ CHECK: ldrb.w r4, [r5, r2] @ encoding: [0x15,0xf8,0x02,0x40]
@ CHECK: ldrb.w r6, [r0, r2, lsl @ CHECK: ldrb.w r8, [r8, r2, lsl @ CHECK: ldrb.w r7, [sp, r2, lsl @ CHECK: ldrb.w r7, [sp, r2] @ encoding: [0x1d,0xf8,0x02,0x70]
@------------------------------------------------------------------------------
@ LDRBT
@------------------------------------------------------------------------------
ldrbt r1, [r2]
ldrbt r1, [r8, ldrbt r1, [r8, ldrbt r1, [r8,
@ CHECK: ldrbt r1, [r2] @ encoding: [0x12,0xf8,0x00,0x1e]
@ CHECK: ldrbt r1, [r8] @ encoding: [0x18,0xf8,0x00,0x1e]
@ CHECK: ldrbt r1, [r8, @ CHECK: ldrbt r1, [r8,
@------------------------------------------------------------------------------
@ LDRD
@------------------------------------------------------------------------------
ldrd r3, r5, [r6, ldrd r3, r5, [r6, ldrd r3, r5, [r6], ldrd r3, r5, [r6], ldrd r3, r5, [r6]
ldrd r8, r1, [r3, ldrd r0, r1, [r2, ldrd r0, r1, [r2, ldrd r0, r1, [r2],
@ CHECK: ldrd r3, r5, [r6, @ CHECK: ldrd r3, r5, [r6, @ CHECK: ldrd r3, r5, [r6], @ CHECK: ldrd r3, r5, [r6], @ CHECK: ldrd r3, r5, [r6] @ encoding: [0xd6,0xe9,0x00,0x35]
@ CHECK: ldrd r8, r1, [r3] @ encoding: [0xd3,0xe9,0x00,0x81]
@ CHECK: ldrd r0, r1, [r2, @ CHECK: ldrd r0, r1, [r2, @ CHECK: ldrd r0, r1, [r2],
@------------------------------------------------------------------------------
@ FIXME: LDRD(literal)
@------------------------------------------------------------------------------
@------------------------------------------------------------------------------
@ LDREX/LDREXB/LDREXH/LDREXD
@------------------------------------------------------------------------------
ldrex r1, [r4]
ldrex r8, [r4, ldrex r2, [sp, ldrexb r5, [r7]
ldrexh r9, [r12]
ldrexd r9, r3, [r4]
@ CHECK: ldrex r1, [r4] @ encoding: [0x54,0xe8,0x00,0x1f]
@ CHECK: ldrex r8, [r4] @ encoding: [0x54,0xe8,0x00,0x8f]
@ CHECK: ldrex r2, [sp, @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
@ CHECK: ldrexh r9, [r12] @ encoding: [0xdc,0xe8,0x5f,0x9f]
@ CHECK: ldrexd r9, r3, [r4] @ encoding: [0xd4,0xe8,0x7f,0x93]
@------------------------------------------------------------------------------
@ LDRH(immediate)
@------------------------------------------------------------------------------
ldrh r5, [r5, ldrh r5, [r6,