; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
; RUN:   --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
; RUN:   --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr8 < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
; RUN:   --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
; RUN:   --ppc-asm-full-reg-names -mattr=+msync -mcpu=pwr7 < %s | FileCheck %s

define dso_local void @test_builtin_ppc_iospace_lwsync() {
; CHECK-LABEL: test_builtin_ppc_iospace_lwsync:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    msync
; CHECK-NEXT:    blr
entry:
  call void @llvm.ppc.iospace.lwsync()
  ret void
}
declare void @llvm.ppc.iospace.lwsync()

define dso_local void @test_builtin_ppc_iospace_sync() {
; CHECK-LABEL: test_builtin_ppc_iospace_sync:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    msync
; CHECK-NEXT:    blr
entry:
  call void @llvm.ppc.iospace.sync()
  ret void
}
declare void @llvm.ppc.iospace.sync()