#ifndef LLVM_LIB_TARGET_POWERPC_PPC_H
#define LLVM_LIB_TARGET_POWERPC_PPC_H
#include "llvm/Support/CodeGen.h"
#undef PPC
namespace llvm {
class PPCRegisterBankInfo;
class PPCSubtarget;
class PPCTargetMachine;
class PassRegistry;
class FunctionPass;
class InstructionSelector;
class MachineInstr;
class MachineOperand;
class AsmPrinter;
class MCInst;
class MCOperand;
class ModulePass;
#ifndef NDEBUG
  FunctionPass *createPPCCTRLoopsVerify();
#endif
  FunctionPass *createPPCLoopInstrFormPrepPass(PPCTargetMachine &TM);
  FunctionPass *createPPCTOCRegDepsPass();
  FunctionPass *createPPCEarlyReturnPass();
  FunctionPass *createPPCVSXCopyPass();
  FunctionPass *createPPCVSXFMAMutatePass();
  FunctionPass *createPPCVSXSwapRemovalPass();
  FunctionPass *createPPCReduceCRLogicalsPass();
  FunctionPass *createPPCMIPeepholePass();
  FunctionPass *createPPCBranchSelectionPass();
  FunctionPass *createPPCBranchCoalescingPass();
  FunctionPass *createPPCISelDag(PPCTargetMachine &TM, CodeGenOpt::Level OL);
  FunctionPass *createPPCTLSDynamicCallPass();
  FunctionPass *createPPCBoolRetToIntPass();
  FunctionPass *createPPCExpandISELPass();
  FunctionPass *createPPCPreEmitPeepholePass();
  FunctionPass *createPPCExpandAtomicPseudoPass();
  FunctionPass *createPPCCTRLoopsPass();
  void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
                                    AsmPrinter &AP);
  bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO,
                                         MCOperand &OutMO, AsmPrinter &AP);
#ifndef NDEBUG
  void initializePPCCTRLoopsVerifyPass(PassRegistry&);
#endif
  void initializePPCLoopInstrFormPrepPass(PassRegistry&);
  void initializePPCTOCRegDepsPass(PassRegistry&);
  void initializePPCEarlyReturnPass(PassRegistry&);
  void initializePPCVSXCopyPass(PassRegistry&);
  void initializePPCVSXFMAMutatePass(PassRegistry&);
  void initializePPCVSXSwapRemovalPass(PassRegistry&);
  void initializePPCReduceCRLogicalsPass(PassRegistry&);
  void initializePPCBSelPass(PassRegistry&);
  void initializePPCBranchCoalescingPass(PassRegistry&);
  void initializePPCBoolRetToIntPass(PassRegistry&);
  void initializePPCExpandISELPass(PassRegistry &);
  void initializePPCPreEmitPeepholePass(PassRegistry &);
  void initializePPCTLSDynamicCallPass(PassRegistry &);
  void initializePPCMIPeepholePass(PassRegistry&);
  void initializePPCExpandAtomicPseudoPass(PassRegistry &);
  void initializePPCCTRLoopsPass(PassRegistry &);
  extern char &PPCVSXFMAMutateID;
  ModulePass *createPPCLowerMASSVEntriesPass();
  void initializePPCLowerMASSVEntriesPass(PassRegistry &);
  extern char &PPCLowerMASSVEntriesID;
  ModulePass *createPPCGenScalarMASSEntriesPass();
  void initializePPCGenScalarMASSEntriesPass(PassRegistry &);
  extern char &PPCGenScalarMASSEntriesID;
  InstructionSelector *
  createPPCInstructionSelector(const PPCTargetMachine &, const PPCSubtarget &,
                               const PPCRegisterBankInfo &);
  namespace PPCII {
    enum TOF {
            MO_NO_FLAG,
                MO_PLT = 1,
            MO_PIC_FLAG = 2,
            MO_PCREL_FLAG = 4,
                MO_GOT_FLAG = 8,
            MO_PCREL_OPT_FLAG = 16,
                MO_TLSGD_FLAG = 32,
            MO_TPREL_FLAG = 64,
            MO_TLSLD_FLAG = 128,
            MO_TLSGDM_FLAG = 256,
                MO_GOT_TLSGD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSGD_FLAG,
                MO_GOT_TLSLD_PCREL_FLAG = MO_PCREL_FLAG | MO_GOT_FLAG | MO_TLSLD_FLAG,
                MO_GOT_TPREL_PCREL_FLAG = MO_GOT_FLAG | MO_TPREL_FLAG | MO_PCREL_FLAG,
        MO_ACCESS_MASK = 0xf00,
        MO_LO = 1 << 8,
    MO_HA = 2 << 8,
    MO_TPREL_LO = 4 << 8,
    MO_TPREL_HA = 3 << 8,
            MO_DTPREL_LO = 5 << 8,
    MO_TLSLD_LO = 6 << 8,
    MO_TOC_LO = 7 << 8,
        MO_TLS = 8 << 8
  };
  } 
} 
#endif