; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f -O0 | FileCheck %s

define <16 x float> @makefloat(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, float %f9, float %f10, float %f11, float %f12, float %f13, float %f14, float %f15, float %f16) #0 {
; CHECK-LABEL: makefloat:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    .cfi_offset %rbp, -16
; CHECK-NEXT:    movq %rsp, %rbp
; CHECK-NEXT:    .cfi_def_cfa_register %rbp
; CHECK-NEXT:    andq $-64, %rsp
; CHECK-NEXT:    subq $256, %rsp # imm = 0x100
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm1, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm2, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm3, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm4, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm5, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm6, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm7, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss {{.*#+}} xmm15 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm14 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm13 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm12 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm11 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm10 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm9 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm8 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss %xmm15, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm14, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm13, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm12, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm11, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm10, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm9, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm8, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm7, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm6, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm5, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm4, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm3, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm2, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm1, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss %xmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm1 = xmm0[0,1,2],xmm1[0]
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm2 = xmm0[0,1,2],xmm2[0]
; CHECK-NEXT:    # implicit-def: $ymm0
; CHECK-NEXT:    vmovaps %xmm2, %xmm0
; CHECK-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm1
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[2,3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm2 = xmm0[0,1,2],xmm2[0]
; CHECK-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[2,3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm3[0],xmm0[3]
; CHECK-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT:    vinsertps {{.*#+}} xmm3 = xmm0[0,1,2],xmm3[0]
; CHECK-NEXT:    # implicit-def: $ymm0
; CHECK-NEXT:    vmovaps %xmm3, %xmm0
; CHECK-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm2
; CHECK-NEXT:    # implicit-def: $zmm0
; CHECK-NEXT:    vmovaps %ymm2, %ymm0
; CHECK-NEXT:    vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
; CHECK-NEXT:    vmovaps %zmm0, {{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovaps {{[0-9]+}}(%rsp), %zmm0
; CHECK-NEXT:    movq %rbp, %rsp
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    .cfi_def_cfa %rsp, 8
; CHECK-NEXT:    retq
entry:
  %__A.addr.i = alloca float, align 4
  %__B.addr.i = alloca float, align 4
  %__C.addr.i = alloca float, align 4
  %__D.addr.i = alloca float, align 4
  %__E.addr.i = alloca float, align 4
  %__F.addr.i = alloca float, align 4
  %__G.addr.i = alloca float, align 4
  %__H.addr.i = alloca float, align 4
  %__I.addr.i = alloca float, align 4
  %__J.addr.i = alloca float, align 4
  %__K.addr.i = alloca float, align 4
  %__L.addr.i = alloca float, align 4
  %__M.addr.i = alloca float, align 4
  %__N.addr.i = alloca float, align 4
  %__O.addr.i = alloca float, align 4
  %__P.addr.i = alloca float, align 4
  %.compoundliteral.i = alloca <16 x float>, align 64
  %f1.addr = alloca float, align 4
  %f2.addr = alloca float, align 4
  %f3.addr = alloca float, align 4
  %f4.addr = alloca float, align 4
  %f5.addr = alloca float, align 4
  %f6.addr = alloca float, align 4
  %f7.addr = alloca float, align 4
  %f8.addr = alloca float, align 4
  %f9.addr = alloca float, align 4
  %f10.addr = alloca float, align 4
  %f11.addr = alloca float, align 4
  %f12.addr = alloca float, align 4
  %f13.addr = alloca float, align 4
  %f14.addr = alloca float, align 4
  %f15.addr = alloca float, align 4
  %f16.addr = alloca float, align 4
  store float %f1, ptr %f1.addr, align 4
  store float %f2, ptr %f2.addr, align 4
  store float %f3, ptr %f3.addr, align 4
  store float %f4, ptr %f4.addr, align 4
  store float %f5, ptr %f5.addr, align 4
  store float %f6, ptr %f6.addr, align 4
  store float %f7, ptr %f7.addr, align 4
  store float %f8, ptr %f8.addr, align 4
  store float %f9, ptr %f9.addr, align 4
  store float %f10, ptr %f10.addr, align 4
  store float %f11, ptr %f11.addr, align 4
  store float %f12, ptr %f12.addr, align 4
  store float %f13, ptr %f13.addr, align 4
  store float %f14, ptr %f14.addr, align 4
  store float %f15, ptr %f15.addr, align 4
  store float %f16, ptr %f16.addr, align 4
  %0 = load float, ptr %f16.addr, align 4
  %1 = load float, ptr %f15.addr, align 4
  %2 = load float, ptr %f14.addr, align 4
  %3 = load float, ptr %f13.addr, align 4
  %4 = load float, ptr %f12.addr, align 4
  %5 = load float, ptr %f11.addr, align 4
  %6 = load float, ptr %f10.addr, align 4
  %7 = load float, ptr %f9.addr, align 4
  %8 = load float, ptr %f8.addr, align 4
  %9 = load float, ptr %f7.addr, align 4
  %10 = load float, ptr %f6.addr, align 4
  %11 = load float, ptr %f5.addr, align 4
  %12 = load float, ptr %f4.addr, align 4
  %13 = load float, ptr %f3.addr, align 4
  %14 = load float, ptr %f2.addr, align 4
  %15 = load float, ptr %f1.addr, align 4
  store float %0, ptr %__A.addr.i, align 4
  store float %1, ptr %__B.addr.i, align 4
  store float %2, ptr %__C.addr.i, align 4
  store float %3, ptr %__D.addr.i, align 4
  store float %4, ptr %__E.addr.i, align 4
  store float %5, ptr %__F.addr.i, align 4
  store float %6, ptr %__G.addr.i, align 4
  store float %7, ptr %__H.addr.i, align 4
  store float %8, ptr %__I.addr.i, align 4
  store float %9, ptr %__J.addr.i, align 4
  store float %10, ptr %__K.addr.i, align 4
  store float %11, ptr %__L.addr.i, align 4
  store float %12, ptr %__M.addr.i, align 4
  store float %13, ptr %__N.addr.i, align 4
  store float %14, ptr %__O.addr.i, align 4
  store float %15, ptr %__P.addr.i, align 4
  %16 = load float, ptr %__P.addr.i, align 4
  %vecinit.i = insertelement <16 x float> undef, float %16, i32 0
  %17 = load float, ptr %__O.addr.i, align 4
  %vecinit1.i = insertelement <16 x float> %vecinit.i, float %17, i32 1
  %18 = load float, ptr %__N.addr.i, align 4
  %vecinit2.i = insertelement <16 x float> %vecinit1.i, float %18, i32 2
  %19 = load float, ptr %__M.addr.i, align 4
  %vecinit3.i = insertelement <16 x float> %vecinit2.i, float %19, i32 3
  %20 = load float, ptr %__L.addr.i, align 4
  %vecinit4.i = insertelement <16 x float> %vecinit3.i, float %20, i32 4
  %21 = load float, ptr %__K.addr.i, align 4
  %vecinit5.i = insertelement <16 x float> %vecinit4.i, float %21, i32 5
  %22 = load float, ptr %__J.addr.i, align 4
  %vecinit6.i = insertelement <16 x float> %vecinit5.i, float %22, i32 6
  %23 = load float, ptr %__I.addr.i, align 4
  %vecinit7.i = insertelement <16 x float> %vecinit6.i, float %23, i32 7
  %24 = load float, ptr %__H.addr.i, align 4
  %vecinit8.i = insertelement <16 x float> %vecinit7.i, float %24, i32 8
  %25 = load float, ptr %__G.addr.i, align 4
  %vecinit9.i = insertelement <16 x float> %vecinit8.i, float %25, i32 9
  %26 = load float, ptr %__F.addr.i, align 4
  %vecinit10.i = insertelement <16 x float> %vecinit9.i, float %26, i32 10
  %27 = load float, ptr %__E.addr.i, align 4
  %vecinit11.i = insertelement <16 x float> %vecinit10.i, float %27, i32 11
  %28 = load float, ptr %__D.addr.i, align 4
  %vecinit12.i = insertelement <16 x float> %vecinit11.i, float %28, i32 12
  %29 = load float, ptr %__C.addr.i, align 4
  %vecinit13.i = insertelement <16 x float> %vecinit12.i, float %29, i32 13
  %30 = load float, ptr %__B.addr.i, align 4
  %vecinit14.i = insertelement <16 x float> %vecinit13.i, float %30, i32 14
  %31 = load float, ptr %__A.addr.i, align 4
  %vecinit15.i = insertelement <16 x float> %vecinit14.i, float %31, i32 15
  store <16 x float> %vecinit15.i, ptr %.compoundliteral.i, align 64
  %32 = load <16 x float>, ptr %.compoundliteral.i, align 64
  ret <16 x float> %32
}