# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R6
--- |
%struct.MemSize3_Align1 = type { [3 x i8], i8 }
%struct.MemSize3_Align2 = type { [3 x i8], i8 }
%struct.MemSize3_Align4 = type { [3 x i8], i8 }
%struct.MemSize3_Align8 = type { [3 x i8], i8, [4 x i8] }
%struct.MemSize5_Align1 = type <{ [5 x i8], i16, i8 }>
%struct.MemSize5_Align2 = type <{ [5 x i8], i16, i8 }>
%struct.MemSize5_Align4 = type <{ [5 x i8], i16, i8 }>
%struct.MemSize5_Align8 = type <{ [5 x i8], i16, i8 }>
%struct.MemSize6_Align1 = type { [6 x i8], i16 }
%struct.MemSize6_Align2 = type { [6 x i8], i16 }
%struct.MemSize6_Align4 = type { [6 x i8], i16 }
%struct.MemSize6_Align8 = type { [6 x i8], i16 }
%struct.MemSize7_Align1 = type { [7 x i8], i8 }
%struct.MemSize7_Align2 = type { [7 x i8], i8 }
%struct.MemSize7_Align4 = type { [7 x i8], i8 }
%struct.MemSize7_Align8 = type { [7 x i8], i8 }
@double_align1 = common global double 0.000000e+00, align 1
@double_align2 = common global double 0.000000e+00, align 2
@double_align4 = common global double 0.000000e+00, align 4
@double_align8 = common global double 0.000000e+00, align 8
@i64_align1 = common global i64 0, align 1
@i64_align2 = common global i64 0, align 2
@i64_align4 = common global i64 0, align 4
@i64_align8 = common global i64 0, align 8
define void @store3align1(%struct.MemSize3_Align1* %S, i32 signext %a) {
entry:
%0 = bitcast %struct.MemSize3_Align1* %S to i24*
%1 = trunc i32 %a to i24
store i24 %1, i24* %0, align 1
ret void
}
define void @store3align2(%struct.MemSize3_Align2* %S, i32 signext %a) {
entry:
%0 = bitcast %struct.MemSize3_Align2* %S to i24*
%1 = trunc i32 %a to i24
store i24 %1, i24* %0, align 2
ret void
}
define void @store3align4(%struct.MemSize3_Align4* %S, i32 signext %a) {
entry:
%0 = bitcast %struct.MemSize3_Align4* %S to i24*
%1 = trunc i32 %a to i24
store i24 %1, i24* %0, align 4
ret void
}
define void @store3align8(%struct.MemSize3_Align8* %S, i32 signext %a) {
entry:
%0 = bitcast %struct.MemSize3_Align8* %S to i24*
%1 = trunc i32 %a to i24
store i24 %1, i24* %0, align 8
ret void
}
define void @store5align1(%struct.MemSize5_Align1* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize5_Align1* %S to i40*
%1 = trunc i64 %a to i40
store i40 %1, i40* %0, align 1
ret void
}
define void @store5align2(%struct.MemSize5_Align2* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize5_Align2* %S to i40*
%1 = trunc i64 %a to i40
store i40 %1, i40* %0, align 2
ret void
}
define void @store5align4(%struct.MemSize5_Align4* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize5_Align4* %S to i40*
%1 = trunc i64 %a to i40
store i40 %1, i40* %0, align 4
ret void
}
define void @store5align8(%struct.MemSize5_Align8* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize5_Align8* %S to i40*
%1 = trunc i64 %a to i40
store i40 %1, i40* %0, align 8
ret void
}
define void @store6align1(%struct.MemSize6_Align1* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize6_Align1* %S to i48*
%1 = trunc i64 %a to i48
store i48 %1, i48* %0, align 1
ret void
}
define void @store6align2(%struct.MemSize6_Align2* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize6_Align2* %S to i48*
%1 = trunc i64 %a to i48
store i48 %1, i48* %0, align 2
ret void
}
define void @store6align4(%struct.MemSize6_Align4* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize6_Align4* %S to i48*
%1 = trunc i64 %a to i48
store i48 %1, i48* %0, align 4
ret void
}
define void @store6align8(%struct.MemSize6_Align8* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize6_Align8* %S to i48*
%1 = trunc i64 %a to i48
store i48 %1, i48* %0, align 8
ret void
}
define void @store7align1(%struct.MemSize7_Align1* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize7_Align1* %S to i56*
%1 = trunc i64 %a to i56
store i56 %1, i56* %0, align 1
ret void
}
define void @store7align2(%struct.MemSize7_Align2* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize7_Align2* %S to i56*
%1 = trunc i64 %a to i56
store i56 %1, i56* %0, align 2
ret void
}
define void @store7align4(%struct.MemSize7_Align4* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize7_Align4* %S to i56*
%1 = trunc i64 %a to i56
store i56 %1, i56* %0, align 4
ret void
}
define void @store7align8(%struct.MemSize7_Align8* %S, i64 %a) {
entry:
%0 = bitcast %struct.MemSize7_Align8* %S to i56*
%1 = trunc i64 %a to i56
store i56 %1, i56* %0, align 8
ret void
}
define void @store_double_align1(double %a) {
entry:
store double %a, double* @double_align1, align 1
ret void
}
define void @store_double_align2(double %a) {
entry:
store double %a, double* @double_align2, align 2
ret void
}
define void @store_double_align4(double %a) {
entry:
store double %a, double* @double_align4, align 4
ret void
}
define void @store_double_align8(double %a) {
entry:
store double %a, double* @double_align8, align 8
ret void
}
define void @store_i64_align1(i64 %a) {
entry:
store i64 %a, i64* @i64_align1, align 1
ret void
}
define void @store_i64_align2(i64 signext %a) {
entry:
store i64 %a, i64* @i64_align2, align 2
ret void
}
define void @store_i64_align4(i64 %a) {
entry:
store i64 %a, i64* @i64_align4, align 4
ret void
}
define void @store_i64_align8(i64 signext %a) {
entry:
store i64 %a, i64* @i64_align8, align 8
ret void
}
...
---
name: store3align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store3align1
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s8) into %ir.0)
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C2]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD1]](p0) :: (store (s8) into %ir.0 + 1)
; MIPS32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C3]](s32)
; MIPS32: G_STORE [[LSHR1]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store3align1
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0, align 1)
; MIPS32R6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32R6: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32R6: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s24) = G_TRUNC %1(s32)
G_STORE %2(s24), %0(p0) :: (store (s24) into %ir.0, align 1)
RetRA
...
---
name: store3align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store3align2
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store3align2
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0)
; MIPS32R6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32R6: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32R6: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s24) = G_TRUNC %1(s32)
G_STORE %2(s24), %0(p0) :: (store (s24) into %ir.0, align 2)
RetRA
...
---
name: store3align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store3align4
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0, align 4)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2, basealign 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store3align4
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0, align 4)
; MIPS32R6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32R6: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32R6: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2, basealign 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s24) = G_TRUNC %1(s32)
G_STORE %2(s24), %0(p0) :: (store (s24) into %ir.0, align 4)
RetRA
...
---
name: store3align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store3align8
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0, align 8)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2, basealign 8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store3align8
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s16) into %ir.0, align 8)
; MIPS32R6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
; MIPS32R6: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C1]](s32)
; MIPS32R6: G_STORE [[LSHR]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 2, align 2, basealign 8)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%1:_(s32) = COPY $a1
%2:_(s24) = G_TRUNC %1(s32)
G_STORE %2(s24), %0(p0) :: (store (s24) into %ir.0, align 8)
RetRA
...
---
name: store5align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store5align1
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store5align1
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s40) = G_TRUNC %1(s64)
G_STORE %4(s40), %0(p0) :: (store (s40) into %ir.0, align 1)
RetRA
...
---
name: store5align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store5align2
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 2)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store5align2
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 2)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s40) = G_TRUNC %1(s64)
G_STORE %4(s40), %0(p0) :: (store (s40) into %ir.0, align 2)
RetRA
...
---
name: store5align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store5align4
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store5align4
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s40) = G_TRUNC %1(s64)
G_STORE %4(s40), %0(p0) :: (store (s40) into %ir.0, align 4)
RetRA
...
---
name: store5align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store5align8
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 4, basealign 8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store5align8
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4, align 4, basealign 8)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s40) = G_TRUNC %1(s64)
G_STORE %4(s40), %0(p0) :: (store (s40) into %ir.0, align 8)
RetRA
...
---
name: store6align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store6align1
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s32)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4)
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C2]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD1]](p0) :: (store (s8) into %ir.0 + 5)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store6align1
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 1)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s48) = G_TRUNC %1(s64)
G_STORE %4(s48), %0(p0) :: (store (s48) into %ir.0, align 1)
RetRA
...
---
name: store6align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store6align2
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store6align2
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s48) = G_TRUNC %1(s64)
G_STORE %4(s48), %0(p0) :: (store (s48) into %ir.0, align 2)
RetRA
...
---
name: store6align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store6align4
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store6align4
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s48) = G_TRUNC %1(s64)
G_STORE %4(s48), %0(p0) :: (store (s48) into %ir.0, align 4)
RetRA
...
---
name: store6align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store6align8
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4, basealign 8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store6align8
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4, basealign 8)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s48) = G_TRUNC %1(s64)
G_STORE %4(s48), %0(p0) :: (store (s48) into %ir.0, align 8)
RetRA
...
---
name: store7align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store7align1
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; MIPS32: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C1]](s32)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s8) into %ir.0 + 4)
; MIPS32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; MIPS32: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C2]](s32)
; MIPS32: G_STORE [[LSHR]](s32), [[PTR_ADD1]](p0) :: (store (s8) into %ir.0 + 5)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store7align1
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 1)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 1)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s56) = G_TRUNC %1(s64)
G_STORE %4(s56), %0(p0) :: (store (s42) into %ir.0, align 1)
RetRA
...
---
name: store7align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store7align2
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store7align2
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 2)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s56) = G_TRUNC %1(s64)
G_STORE %4(s56), %0(p0) :: (store (s42) into %ir.0, align 2)
RetRA
...
---
name: store7align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store7align4
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store7align4
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s56) = G_TRUNC %1(s64)
G_STORE %4(s56), %0(p0) :: (store (s42) into %ir.0, align 4)
RetRA
...
---
name: store7align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; MIPS32-LABEL: name: store7align8
; MIPS32: liveins: $a0, $a2, $a3
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4, basealign 8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store7align8
; MIPS32R6: liveins: $a0, $a2, $a3
; MIPS32R6: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a2
; MIPS32R6: [[COPY2:%[0-9]+]]:_(s32) = COPY $a3
; MIPS32R6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32R6: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
; MIPS32R6: G_STORE [[COPY1]](s32), [[COPY]](p0) :: (store (s32) into %ir.0, align 8)
; MIPS32R6: G_STORE [[COPY2]](s32), [[PTR_ADD]](p0) :: (store (s16) into %ir.0 + 4, align 4, basealign 8)
; MIPS32R6: RetRA
%0:_(p0) = COPY $a0
%2:_(s32) = COPY $a2
%3:_(s32) = COPY $a3
%1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
%4:_(s56) = G_TRUNC %1(s64)
G_STORE %4(s56), %0(p0) :: (store (s42) into %ir.0, align 8)
RetRA
...
---
name: store_double_align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; MIPS32-LABEL: name: store_double_align1
; MIPS32: liveins: $d6
; MIPS32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; MIPS32: G_STORE [[UV]](s32), [[GV]](p0) :: (store (s32) into @double_align1, align 1)
; MIPS32: G_STORE [[UV1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @double_align1 + 4, align 1)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_double_align1
; MIPS32R6: liveins: $d6
; MIPS32R6: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align1
; MIPS32R6: G_STORE [[COPY]](s64), [[GV]](p0) :: (store (s64) into @double_align1, align 1)
; MIPS32R6: RetRA
%0:_(s64) = COPY $d6
%1:_(p0) = G_GLOBAL_VALUE @double_align1
G_STORE %0(s64), %1(p0) :: (store (s64) into @double_align1, align 1)
RetRA
...
---
name: store_double_align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; MIPS32-LABEL: name: store_double_align2
; MIPS32: liveins: $d6
; MIPS32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align2
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; MIPS32: G_STORE [[UV]](s32), [[GV]](p0) :: (store (s32) into @double_align2, align 2)
; MIPS32: G_STORE [[UV1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @double_align2 + 4, align 2)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_double_align2
; MIPS32R6: liveins: $d6
; MIPS32R6: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align2
; MIPS32R6: G_STORE [[COPY]](s64), [[GV]](p0) :: (store (s64) into @double_align2, align 2)
; MIPS32R6: RetRA
%0:_(s64) = COPY $d6
%1:_(p0) = G_GLOBAL_VALUE @double_align2
G_STORE %0(s64), %1(p0) :: (store (s64) into @double_align2, align 2)
RetRA
...
---
name: store_double_align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; MIPS32-LABEL: name: store_double_align4
; MIPS32: liveins: $d6
; MIPS32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align4
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
; MIPS32: G_STORE [[UV]](s32), [[GV]](p0) :: (store (s32) into @double_align4)
; MIPS32: G_STORE [[UV1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @double_align4 + 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_double_align4
; MIPS32R6: liveins: $d6
; MIPS32R6: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align4
; MIPS32R6: G_STORE [[COPY]](s64), [[GV]](p0) :: (store (s64) into @double_align4, align 4)
; MIPS32R6: RetRA
%0:_(s64) = COPY $d6
%1:_(p0) = G_GLOBAL_VALUE @double_align4
G_STORE %0(s64), %1(p0) :: (store (s64) into @double_align4, align 4)
RetRA
...
---
name: store_double_align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; MIPS32-LABEL: name: store_double_align8
; MIPS32: liveins: $d6
; MIPS32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align8
; MIPS32: G_STORE [[COPY]](s64), [[GV]](p0) :: (store (s64) into @double_align8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_double_align8
; MIPS32R6: liveins: $d6
; MIPS32R6: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @double_align8
; MIPS32R6: G_STORE [[COPY]](s64), [[GV]](p0) :: (store (s64) into @double_align8)
; MIPS32R6: RetRA
%0:_(s64) = COPY $d6
%1:_(p0) = G_GLOBAL_VALUE @double_align8
G_STORE %0(s64), %1(p0) :: (store (s64) into @double_align8)
RetRA
...
---
name: store_i64_align1
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store_i64_align1
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align1
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: G_STORE [[COPY]](s32), [[GV]](p0) :: (store (s32) into @i64_align1, align 1)
; MIPS32: G_STORE [[COPY1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @i64_align1 + 4, align 1)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_i64_align1
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align1
; MIPS32R6: G_STORE [[MV]](s64), [[GV]](p0) :: (store (s64) into @i64_align1, align 1)
; MIPS32R6: RetRA
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(p0) = G_GLOBAL_VALUE @i64_align1
G_STORE %0(s64), %3(p0) :: (store (s64) into @i64_align1, align 1)
RetRA
...
---
name: store_i64_align2
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store_i64_align2
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align2
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: G_STORE [[COPY]](s32), [[GV]](p0) :: (store (s32) into @i64_align2, align 2)
; MIPS32: G_STORE [[COPY1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @i64_align2 + 4, align 2)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_i64_align2
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align2
; MIPS32R6: G_STORE [[MV]](s64), [[GV]](p0) :: (store (s64) into @i64_align2, align 2)
; MIPS32R6: RetRA
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(p0) = G_GLOBAL_VALUE @i64_align2
G_STORE %0(s64), %3(p0) :: (store (s64) into @i64_align2, align 2)
RetRA
...
---
name: store_i64_align4
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store_i64_align4
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align4
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; MIPS32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[GV]], [[C]](s32)
; MIPS32: G_STORE [[COPY]](s32), [[GV]](p0) :: (store (s32) into @i64_align4)
; MIPS32: G_STORE [[COPY1]](s32), [[PTR_ADD]](p0) :: (store (s32) into @i64_align4 + 4)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_i64_align4
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align4
; MIPS32R6: G_STORE [[MV]](s64), [[GV]](p0) :: (store (s64) into @i64_align4, align 4)
; MIPS32R6: RetRA
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(p0) = G_GLOBAL_VALUE @i64_align4
G_STORE %0(s64), %3(p0) :: (store (s64) into @i64_align4, align 4)
RetRA
...
---
name: store_i64_align8
alignment: 4
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: store_i64_align8
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align8
; MIPS32: G_STORE [[MV]](s64), [[GV]](p0) :: (store (s64) into @i64_align8)
; MIPS32: RetRA
; MIPS32R6-LABEL: name: store_i64_align8
; MIPS32R6: liveins: $a0, $a1
; MIPS32R6: [[COPY:%[0-9]+]]:_(s32) = COPY $a0
; MIPS32R6: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1
; MIPS32R6: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; MIPS32R6: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @i64_align8
; MIPS32R6: G_STORE [[MV]](s64), [[GV]](p0) :: (store (s64) into @i64_align8)
; MIPS32R6: RetRA
%1:_(s32) = COPY $a0
%2:_(s32) = COPY $a1
%0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)
%3:_(p0) = G_GLOBAL_VALUE @i64_align8
G_STORE %0(s64), %3(p0) :: (store (s64) into @i64_align8)
RetRA
...