# RUN: llc -O0 -march=mips -mcpu=mips32r3 -mattr=+micromips,+eva -start-after=finalize-isel \
# RUN:     -filetype obj %s -o - | llvm-objdump --mattr=+eva -d - | FileCheck %s

# Test that MIPS unaligned load/store instructions can be mapped to their
# corresponding microMIPS instructions.
--- |
  define void @g(i32* %a, i32* %b) {
  entry:
    %0 = load i32, i32* %a, align 1
    store i32 %0, i32* %b, align 1
    ret void
  }

  define void @g2(i32* %a, i32* %b) {
  entry:
    %0 = load i32, i32* %a, align 1
    store i32 %0, i32* %b, align 1
    ret void
  }
...
---
name:            g
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
liveins:
  - { reg: '$a0', virtual-reg: '%0' }
  - { reg: '$a1', virtual-reg: '%1' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.0.entry:
    liveins: $a0, $a1

    %1:gpr32 = COPY $a1
    %0:gpr32 = COPY $a0
    %3:gpr32 = IMPLICIT_DEF
    %2:gpr32 = LWL %0, 0, %3 :: (load (s32) from %ir.a, align 1)
    %4:gpr32 = LWR %0, 3, %2 :: (load (s32) from %ir.a, align 1)
    SWL %4, %1, 0 :: (store (s32) into %ir.b, align 1)
    SWR %4, %1, 3 :: (store (s32) into %ir.b, align 1)
    RetRA

...
---
name:            g2
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
liveins:
  - { reg: '$a0', virtual-reg: '%0' }
  - { reg: '$a1', virtual-reg: '%1' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  bb.0.entry:
    liveins: $a0, $a1

    %1:gpr32 = COPY $a1
    %0:gpr32 = COPY $a0
    %3:gpr32 = IMPLICIT_DEF
    %2:gpr32 = LWLE %0, 0, %3 :: (load (s32) from %ir.a, align 1)
    %4:gpr32 = LWRE %0, 3, %2 :: (load (s32) from %ir.a, align 1)
    SWLE %4, %1, 0 :: (store (s32) into %ir.b, align 1)
    SWRE %4, %1, 3 :: (store (s32) into %ir.b, align 1)
    RetRA

...

# CHECK-LABEL: <g>:
# CHECK:  0: 60 24 00 00   lwl $1, 0($4)
# CHECK:  4: 60 24 10 03   lwr $1, 3($4)
# CHECK:  8: 60 25 80 00   swl $1, 0($5)
# CHECK:  c: 60 25 90 03   swr $1, 3($5)

# CHECK-LABEL: <g2>:
# CHECK: 14: 60 24 64 00   lwle  $1, 0($4)
# CHECK: 18: 60 24 66 03   lwre  $1, 3($4)
# CHECK: 1c: 60 25 a0 00   swle  $1, 0($5)
# CHECK: 20: 60 25 a2 03   swre  $1, 3($5)