# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=thumbv7-- -run-pass=machine-outliner -verify-machineinstrs \
# RUN: %s -o - | FileCheck %s

--- |
  define void @dont_outline_asm() #0 { ret void }
  define void @dont_outline_lr() #0 { ret void }
  define void @dont_outline_lr2() #0 { ret void }
  define void @dont_outline_it() #0 { ret void }
  define void @dont_outline_pic() #0 { ret void }
  define void @dont_outline_mve() #0 { ret void }
  declare void @z(i32, i32, i32, i32)

  attributes #0 = { minsize optsize }
...
---

name:           dont_outline_asm
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_asm
  ; CHECK: bb.0:
  ; CHECK:   INLINEASM &"movs  r0, #42", 1
  ; CHECK:   tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0
  ; CHECK: bb.1:
  ; CHECK:   INLINEASM &"movs  r0, #42", 1
  ; CHECK:   tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0
  bb.0:
    INLINEASM &"movs  r0, #42", 1
    $r0, dead $cpsr = tMOVi8 1, 14, $noreg
    $r1, dead $cpsr = tMOVi8 1, 14, $noreg
    $r2, dead $cpsr = tMOVi8 1, 14, $noreg
    $r3, dead $cpsr = tMOVi8 1, 14, $noreg
    tBL 14, $noreg, @z
  bb.1:
    INLINEASM &"movs  r0, #42", 1
    $r0, dead $cpsr = tMOVi8 1, 14, $noreg
    $r1, dead $cpsr = tMOVi8 1, 14, $noreg
    $r2, dead $cpsr = tMOVi8 1, 14, $noreg
    $r3, dead $cpsr = tMOVi8 1, 14, $noreg
    tBL 14, $noreg, @z
  bb.2:
    tBX_RET 14, $noreg
...
---

name:           dont_outline_lr
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_lr
  ; CHECK-NOT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION
  bb.0:
    liveins: $lr
    $r0 = tMOVr $lr, 14, $noreg
    $r1 = tMOVr $lr, 14, $noreg
    $r2 = tMOVr $lr, 14, $noreg
    $r3 = tMOVr $lr, 14, $noreg
    tBL 14, $noreg, @z
  bb.1:
    liveins: $lr
    $r0 = tMOVr $lr, 14, $noreg
    $r1 = tMOVr $lr, 14, $noreg
    $r2 = tMOVr $lr, 14, $noreg
    $r3 = tMOVr $lr, 14, $noreg
    tBL 14, $noreg, @z
  bb.2:
    tBX_RET 14, $noreg
...
---

name:           dont_outline_lr2
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_lr2
  ; CHECK-NOT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION
  bb.0:
    liveins: $r0
    $lr = tMOVr $r0, 14, $noreg
    $r1 = tMOVr $r0, 14, $noreg
    $r2 = tMOVr $r0, 14, $noreg
    $r3 = tMOVr $r0, 14, $noreg
    $r4 = tMOVr $r0, 14, $noreg
    tBLXr 14, $lr, $noreg
  bb.1:
    liveins: $r0
    $lr = tMOVr $r0, 14, $noreg
    $r1 = tMOVr $r0, 14, $noreg
    $r2 = tMOVr $r0, 14, $noreg
    $r3 = tMOVr $r0, 14, $noreg
    $r4 = tMOVr $r0, 14, $noreg
    tBLXr 14, $lr, $noreg
  bb.2:
    tBX_RET 14, $noreg
...
---

name:           dont_outline_it
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_it
  ; CHECK-NOT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION
  bb.0:
    t2IT 0, 1, implicit-def $itstate
    $r0, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r1, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r2, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r3, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    tBL 14, $noreg, @z
  bb.1:
    t2IT 0, 1, implicit-def $itstate
    $r0, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r1, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r2, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    $r3, dead $cpsr = tMOVi8 1, 0, $noreg, implicit $itstate
    tBL 14, $noreg, @z
  bb.2:
    tBX_RET 14, $noreg
...
---

name:           dont_outline_pic
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_pic
  ; CHECK-NOT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION
  bb.0:
    $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @z, 0
    $r0 = t2MOVTi16_ga_pcrel $r0, target-flags(arm-lo16, arm-nonlazy) @z, 0
    $r0 = PICADD $r0, 1, 14, $noreg
    $r1 = PICLDR $r0, 2, 14, $noreg
    PICSTR $r0, $r1, 3, 14, $noreg
    tBL 14, $noreg, @z
  bb.1:
    $r0 = t2MOVi16_ga_pcrel target-flags(arm-lo16, arm-nonlazy) @z, 0
    $r0 = t2MOVTi16_ga_pcrel $r0, target-flags(arm-lo16, arm-nonlazy) @z, 0
    $r0 = PICADD $r0, 1, 14, $noreg
    $r1 = PICLDR $r0, 2, 14, $noreg
    PICSTR $r0, $r1, 3, 14, $noreg
    tBL 14, $noreg, @z
  bb.2:
    tBX_RET 14, $noreg
...
---

name:           dont_outline_mve
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: dont_outline_mve
  ; CHECK-NOT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION
  bb.0:
    liveins: $r3, $r4, $q0, $q3, $q4, $q5
    $q5 = MVE_VDUP32 $r3, 0, $noreg, $noreg, $q5
    $q4 = MVE_VDUP32 $r4, 0, $noreg, $noreg, $q4
    $q0 = MVE_VADDf32 $q4, $q5, 0, $noreg, $noreg, $q0
    $lr = t2DoLoopStart $r4
    $r0 = MVE_VMOV_from_lane_32 renamable $q0, 1, 14, $noreg
    tBL 14, $noreg, @z
  bb.1:
    liveins: $r3, $r4, $q0, $q3, $q4, $q5
    $q5 = MVE_VDUP32 $r3, 0, $noreg, $noreg, $q5
    $q4 = MVE_VDUP32 $r4, 0, $noreg, $noreg, $q4
    $q0 = MVE_VADDf32 $q4, $q5, 0, $noreg, $noreg, $q0
    $lr = t2DoLoopStart $r4
    $r0 = MVE_VMOV_from_lane_32 renamable $q0, 1, 14, $noreg
    tBL 14, $noreg, @z
  bb.2:
    tBX_RET 14, $noreg