# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple aarch64 -debugify-and-strip-all-safe -run-pass=aarch64-prelegalizer-combiner --aarch64prelegalizercombinerhelper-only-enable-rule="addo_by_0" -global-isel -verify-machineinstrs %s -o - | FileCheck %s # REQUIRES: asserts # (G_*ADDO x, 0) -> x + no carry ... --- name: uadd_zero tracksRegLiveness: true body: | bb.0: liveins: $w0, $w1 ; CHECK-LABEL: name: uadd_zero ; CHECK: liveins: $w0, $w1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %lhs:_(s32) = COPY $w0 ; CHECK-NEXT: %add:_(s32) = COPY %lhs(s32) ; CHECK-NEXT: %o:_(s1) = G_CONSTANT i1 false ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1) ; CHECK-NEXT: $w0 = COPY %add(s32) ; CHECK-NEXT: $w1 = COPY %o_wide(s32) ; CHECK-NEXT: RET_ReallyLR implicit $w0 %lhs:_(s32) = COPY $w0 %zero:_(s32) = G_CONSTANT i32 0 %add:_(s32), %o:_(s1) = G_UADDO %lhs, %zero %o_wide:_(s32) = G_ZEXT %o(s1) $w0 = COPY %add(s32) $w1 = COPY %o_wide RET_ReallyLR implicit $w0 ... --- name: sadd_zero tracksRegLiveness: true body: | bb.0: liveins: $w0, $w1 ; CHECK-LABEL: name: sadd_zero ; CHECK: liveins: $w0, $w1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %lhs:_(s32) = COPY $w0 ; CHECK-NEXT: %add:_(s32) = COPY %lhs(s32) ; CHECK-NEXT: %o:_(s1) = G_CONSTANT i1 false ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1) ; CHECK-NEXT: $w0 = COPY %add(s32) ; CHECK-NEXT: $w1 = COPY %o_wide(s32) ; CHECK-NEXT: RET_ReallyLR implicit $w0 %lhs:_(s32) = COPY $w0 %zero:_(s32) = G_CONSTANT i32 0 %add:_(s32), %o:_(s1) = G_SADDO %lhs, %zero %o_wide:_(s32) = G_ZEXT %o(s1) $w0 = COPY %add(s32) $w1 = COPY %o_wide RET_ReallyLR implicit $w0 ... --- name: wrong_cst tracksRegLiveness: true body: | bb.0: liveins: $w0, $w1 ; CHECK-LABEL: name: wrong_cst ; CHECK: liveins: $w0, $w1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %lhs:_(s32) = COPY $w0 ; CHECK-NEXT: %not_zero:_(s32) = G_CONSTANT i32 3 ; CHECK-NEXT: %add:_(s32), %o:_(s1) = G_UADDO %lhs, %not_zero ; CHECK-NEXT: %o_wide:_(s32) = G_ZEXT %o(s1) ; CHECK-NEXT: $w0 = COPY %add(s32) ; CHECK-NEXT: $w1 = COPY %o_wide(s32) ; CHECK-NEXT: RET_ReallyLR implicit $w0 %lhs:_(s32) = COPY $w0 %not_zero:_(s32) = G_CONSTANT i32 3 %add:_(s32), %o:_(s1) = G_UADDO %lhs, %not_zero %o_wide:_(s32) = G_ZEXT %o(s1) $w0 = COPY %add(s32) $w1 = COPY %o_wide RET_ReallyLR implicit $w0 ... --- name: uadd_vec_zero tracksRegLiveness: true body: | bb.0: liveins: $q0, $x0 ; CHECK-LABEL: name: uadd_vec_zero ; CHECK: liveins: $q0, $x0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %lhs:_(<2 x s64>) = COPY $q0 ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0 ; CHECK-NEXT: %add:_(<2 x s64>) = COPY %lhs(<2 x s64>) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false ; CHECK-NEXT: %o:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1) ; CHECK-NEXT: %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o(<2 x s1>), %zero(s64) ; CHECK-NEXT: %o_wide:_(s64) = G_ZEXT %o_elt_0(s1) ; CHECK-NEXT: $q0 = COPY %add(<2 x s64>) ; CHECK-NEXT: $x0 = COPY %o_wide(s64) ; CHECK-NEXT: RET_ReallyLR implicit $q0 %lhs:_(<2 x s64>) = COPY $q0 %zero:_(s64) = G_CONSTANT i64 0 %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero %add:_(<2 x s64>), %o:_(<2 x s1>) = G_UADDO %lhs, %zero_vec %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x s1>), %zero:_(s64) %o_wide:_(s64) = G_ZEXT %o_elt_0 $q0 = COPY %add(<2 x s64>) $x0 = COPY %o_wide RET_ReallyLR implicit $q0 ... --- name: sadd_vec_zero tracksRegLiveness: true body: | bb.0: liveins: $q0, $x0 ; CHECK-LABEL: name: sadd_vec_zero ; CHECK: liveins: $q0, $x0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: %lhs:_(<2 x s64>) = COPY $q0 ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0 ; CHECK-NEXT: %add:_(<2 x s64>) = COPY %lhs(<2 x s64>) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false ; CHECK-NEXT: %o:_(<2 x s1>) = G_BUILD_VECTOR [[C]](s1), [[C]](s1) ; CHECK-NEXT: %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o(<2 x s1>), %zero(s64) ; CHECK-NEXT: %o_wide:_(s64) = G_ZEXT %o_elt_0(s1) ; CHECK-NEXT: $q0 = COPY %add(<2 x s64>) ; CHECK-NEXT: $x0 = COPY %o_wide(s64) ; CHECK-NEXT: RET_ReallyLR implicit $q0 %lhs:_(<2 x s64>) = COPY $q0 %zero:_(s64) = G_CONSTANT i64 0 %zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero %add:_(<2 x s64>), %o:_(<2 x s1>) = G_SADDO %lhs, %zero_vec %o_elt_0:_(s1) = G_EXTRACT_VECTOR_ELT %o:_(<2 x s1>), %zero:_(s64) %o_wide:_(s64) = G_ZEXT %o_elt_0 $q0 = COPY %add(<2 x s64>) $x0 = COPY %o_wide RET_ReallyLR implicit $q0