# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s --- name: trunc_s32_shl_s64_5 legalized: true tracksRegLiveness: true body: | bb.0: liveins: $vgpr0_vgpr1 ; CHECK-LABEL: name: trunc_s32_shl_s64_5 ; CHECK: liveins: $vgpr0_vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32) ; CHECK-NEXT: $vgpr0 = COPY [[SHL]](s32) %0:_(s64) = COPY $vgpr0_vgpr1 %1:_(s32) = G_CONSTANT i32 1 %2:_(s64) = G_SHL %0:_, %1 %3:_(s32) = G_TRUNC %2 $vgpr0 = COPY %3 ... --- name: trunc_s16_shl_s32_5 legalized: true tracksRegLiveness: true body: | bb.0: liveins: $vgpr0 ; CHECK-LABEL: name: trunc_s16_shl_s32_5 ; CHECK: liveins: $vgpr0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32) ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16) %0:_(s32) = COPY $vgpr0 %1:_(s32) = G_CONSTANT i32 1 %2:_(s32) = G_SHL %0:_, %1 %3:_(s16) = G_TRUNC %2 S_ENDPGM 0, implicit %3 ... --- name: trunc_s16_shl_s64_5 legalized: true tracksRegLiveness: true body: | bb.0: liveins: $vgpr0_vgpr1 ; CHECK-LABEL: name: trunc_s16_shl_s64_5 ; CHECK: liveins: $vgpr0_vgpr1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s32) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s64) ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16) %0:_(s64) = COPY $vgpr0_vgpr1 %1:_(s32) = G_CONSTANT i32 1 %2:_(s64) = G_SHL %0:_, %1 %3:_(s16) = G_TRUNC %2 S_ENDPGM 0, implicit %3 ...