Compiler projects using llvm
# RUN: llc %s -mtriple=loongarch64 -start-after=prologepilog -O0 -filetype=obj -o - \
# RUN:   | extract-section .text \
# RUN:   | FileCheck %s -check-prefix=CHECK-ENC
# RUN: llc %s -mtriple=loongarch64 -start-after=prologepilog -O0 -filetype=asm -o - \
# RUN:   | FileCheck %s -check-prefix=CHECK-ASM

# -------------------------------------------------------------------------------------------------
#                                           Encoding format: 3R
# -------------------------------------------------------------------------------------------------
# ---------------------------------------------------+--------------+--------------+---------------
#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
# ---------------------------------------------------+--------------+--------------+---------------
#                    opcode                          |      rk      |      rj      |      rd
# ---------------------------------------------------+--------------+--------------+---------------

---
# CHECK-LABEL: test_ADD_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: add.w	$a0, $a1, $a0
name: test_ADD_W
body: |
  bb.0:
    $r4 = ADD_W $r5, $r4
...
---
# CHECK-LABEL: test_ADD_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: add.d	$a0, $a1, $a0
name: test_ADD_D
body: |
  bb.0:
    $r4 = ADD_D $r5, $r4
...
---
# CHECK-LABEL: test_SUB_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sub.w	$a0, $a1, $a0
name: test_SUB_W
body: |
  bb.0:
    $r4 = SUB_W $r5, $r4
...
---
# CHECK-LABEL: test_SUB_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sub.d	$a0, $a1, $a0
name: test_SUB_D
body: |
  bb.0:
    $r4 = SUB_D $r5, $r4
...
---
# CHECK-LABEL: test_SLT:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: slt	$a0, $a1, $a0
name: test_SLT
body: |
  bb.0:
    $r4 = SLT $r5, $r4
...
---
# CHECK-LABEL: test_SLTU:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sltu	$a0, $a1, $a0
name: test_SLTU
body: |
  bb.0:
    $r4 = SLTU $r5, $r4
...
---
# CHECK-LABEL: test_MASKEQZ:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: maskeqz	$a0, $a1, $a0
name: test_MASKEQZ
body: |
  bb.0:
    $r4 = MASKEQZ $r5, $r4
...
---
# CHECK-LABEL: test_MASKNEZ:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: masknez	$a0, $a1, $a0
name: test_MASKNEZ
body: |
  bb.0:
    $r4 = MASKNEZ $r5, $r4
...
---
# CHECK-LABEL: test_NOR:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: nor	$a0, $a1, $a0
name: test_NOR
body: |
  bb.0:
    $r4 = NOR $r5, $r4
...
---
# CHECK-LABEL: test_AND:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: and	$a0, $a1, $a0
name: test_AND
body: |
  bb.0:
    $r4 = AND $r5, $r4
...
---
# CHECK-LABEL: test_OR:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: or	$a0, $a1, $a0
name: test_OR
body: |
  bb.0:
    $r4 = OR $r5, $r4
...
---
# CHECK-LABEL: test_XOR:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: xor	$a0, $a1, $a0
name: test_XOR
body: |
  bb.0:
    $r4 = XOR $r5, $r4
...
---
# CHECK-LABEL: test_ORN:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: orn	$a0, $a1, $a0
name: test_ORN
body: |
  bb.0:
    $r4 = ORN $r5, $r4
...
---
# CHECK-LABEL: test_ANDN:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: andn	$a0, $a1, $a0
name: test_ANDN
body: |
  bb.0:
    $r4 = ANDN $r5, $r4
...
---
# CHECK-LABEL: test_SLL_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sll.w	$a0, $a1, $a0
name: test_SLL_W
body: |
  bb.0:
    $r4 = SLL_W $r5, $r4
...
---
# CHECK-LABEL: test_SRL_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: srl.w	$a0, $a1, $a0
name: test_SRL_W
body: |
  bb.0:
    $r4 = SRL_W $r5, $r4
...
---
# CHECK-LABEL: test_SRA_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sra.w	$a0, $a1, $a0
name: test_SRA_W
body: |
  bb.0:
    $r4 = SRA_W $r5, $r4
...
---
# CHECK-LABEL: test_SLL_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sll.d	$a0, $a1, $a0
name: test_SLL_D
body: |
  bb.0:
    $r4 = SLL_D $r5, $r4
...
---
# CHECK-LABEL: test_SRL_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: srl.d	$a0, $a1, $a0
name: test_SRL_D
body: |
  bb.0:
    $r4 = SRL_D $r5, $r4
...
---
# CHECK-LABEL: test_SRA_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: sra.d	$a0, $a1, $a0
name: test_SRA_D
body: |
  bb.0:
    $r4 = SRA_D $r5, $r4
...
---
# CHECK-LABEL: test_ROTR_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: rotr.w	$a0, $a1, $a0
name: test_ROTR_W
body: |
  bb.0:
    $r4 = ROTR_W $r5, $r4
...
---
# CHECK-LABEL: test_ROTR_D:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: rotr.d	$a0, $a1, $a0
name: test_ROTR_D
body: |
  bb.0:
    $r4 = ROTR_D $r5, $r4
...
---
# CHECK-LABEL: test_MUL_W:
# CHECK-ENC: 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mul.w	$a0, $a1, $a0
name: test_MUL_W
body: |
  bb.0:
    $r4 = MUL_W $r5, $r4
...
---
# CHECK-LABEL: test_MULH_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulh.w	$a0, $a1, $a0
name: test_MULH_W
body: |
  bb.0:
    $r4 = MULH_W $r5, $r4
...
---
# CHECK-LABEL: test_MULH_WU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulh.wu	$a0, $a1, $a0
name: test_MULH_WU
body: |
  bb.0:
    $r4 = MULH_WU $r5, $r4
...
---
# CHECK-LABEL: test_MUL_D:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mul.d	$a0, $a1, $a0
name: test_MUL_D
body: |
  bb.0:
    $r4 = MUL_D $r5, $r4
...
---
# CHECK-LABEL: test_MULH_D:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulh.d	$a0, $a1, $a0
name: test_MULH_D
body: |
  bb.0:
    $r4 = MULH_D $r5, $r4
...
---
# CHECK-LABEL: test_MULH_DU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulh.du	$a0, $a1, $a0
name: test_MULH_DU
body: |
  bb.0:
    $r4 = MULH_DU $r5, $r4
...
---
# CHECK-LABEL: test_MULW_D_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulw.d.w	$a0, $a1, $a0
name: test_MULW_D_W
body: |
  bb.0:
    $r4 = MULW_D_W $r5, $r4
...
---
# CHECK-LABEL: test_MULW_D_WU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mulw.d.wu	$a0, $a1, $a0
name: test_MULW_D_WU
body: |
  bb.0:
    $r4 = MULW_D_WU $r5, $r4
...
---
# CHECK-LABEL: test_DIV_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: div.w	$a0, $a1, $a0
name: test_DIV_W
body: |
  bb.0:
    $r4 = DIV_W $r5, $r4
...
---
# CHECK-LABEL: test_MOD_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mod.w	$a0, $a1, $a0
name: test_MOD_W
body: |
  bb.0:
    $r4 = MOD_W $r5, $r4
...
---
# CHECK-LABEL: test_DIV_WU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: div.wu	$a0, $a1, $a0
name: test_DIV_WU
body: |
  bb.0:
    $r4 = DIV_WU $r5, $r4
...
---
# CHECK-LABEL: test_MOD_WU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mod.wu	$a0, $a1, $a0
name: test_MOD_WU
body: |
  bb.0:
    $r4 = MOD_WU $r5, $r4
...
---
# CHECK-LABEL: test_DIV_D:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: div.d	$a0, $a1, $a0
name: test_DIV_D
body: |
  bb.0:
    $r4 = DIV_D $r5, $r4
...
---
# CHECK-LABEL: test_MOD_D:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mod.d	$a0, $a1, $a0
name: test_MOD_D
body: |
  bb.0:
    $r4 = MOD_D $r5, $r4
...
---
# CHECK-LABEL: test_DIV_DU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: div.du	$a0, $a1, $a0
name: test_DIV_DU
body: |
  bb.0:
    $r4 = DIV_DU $r5, $r4
...
---
# CHECK-LABEL: test_MOD_DU:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: mod.du	$a0, $a1, $a0
name: test_MOD_DU
body: |
  bb.0:
    $r4 = MOD_DU $r5, $r4
...
---
# CHECK-LABEL: test_CRC_W_B_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crc.w.b.w	$a0, $a1, $a0
name: test_CRC_W_B_W
body: |
  bb.0:
    $r4 = CRC_W_B_W $r5, $r4
...
---
# CHECK-LABEL: test_CRC_W_H_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crc.w.h.w	$a0, $a1, $a0
name: test_CRC_W_H_W
body: |
  bb.0:
    $r4 = CRC_W_H_W $r5, $r4
...
---
# CHECK-LABEL: test_CRC_W_W_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crc.w.w.w	$a0, $a1, $a0
name: test_CRC_W_W_W
body: |
  bb.0:
    $r4 = CRC_W_W_W $r5, $r4
...
---
# CHECK-LABEL: test_CRC_W_D_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crc.w.d.w	$a0, $a1, $a0
name: test_CRC_W_D_W
body: |
  bb.0:
    $r4 = CRC_W_D_W $r5, $r4
...
---
# CHECK-LABEL: test_CRCC_W_B_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crcc.w.b.w	$a0, $a1, $a0
name: test_CRCC_W_B_W
body: |
  bb.0:
    $r4 = CRCC_W_B_W $r5, $r4
...
---
# CHECK-LABEL: test_CRCC_W_H_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crcc.w.h.w	$a0, $a1, $a0
name: test_CRCC_W_H_W
body: |
  bb.0:
    $r4 = CRCC_W_H_W $r5, $r4
...
---
# CHECK-LABEL: test_CRCC_W_W_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crcc.w.w.w	$a0, $a1, $a0
name: test_CRCC_W_W_W
body: |
  bb.0:
    $r4 = CRCC_W_W_W $r5, $r4
...
---
# CHECK-LABEL: test_CRCC_W_D_W:
# CHECK-ENC:  0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: crcc.w.d.w	$a0, $a1, $a0
name: test_CRCC_W_D_W
body: |
  bb.0:
    $r4 = CRCC_W_D_W $r5, $r4
...
---
# CHECK-LABEL: test_AMSWAP_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amswap_db.w	$a0, $a1, $a2
name: test_AMSWAP_DB_W
body: |
  bb.0:
    $r4 = AMSWAP_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMSWAP_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amswap_db.d	$a0, $a1, $a2
name: test_AMSWAP_DB_D
body: |
  bb.0:
    $r4 = AMSWAP_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMADD_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amadd_db.w	$a0, $a1, $a2
name: test_AMADD_DB_W
body: |
  bb.0:
    $r4 = AMADD_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMADD_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amadd_db.d	$a0, $a1, $a2
name: test_AMADD_DB_D
body: |
  bb.0:
    $r4 = AMADD_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMAND_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amand_db.w	$a0, $a1, $a2
name: test_AMAND_DB_W
body: |
  bb.0:
    $r4 = AMAND_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMAND_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 1 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amand_db.d	$a0, $a1, $a2
name: test_AMAND_DB_D
body: |
  bb.0:
    $r4 = AMAND_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMOR_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amor_db.w	$a0, $a1, $a2
name: test_AMOR_DB_W
body: |
  bb.0:
    $r4 = AMOR_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMOR_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amor_db.d	$a0, $a1, $a2
name: test_AMOR_DB_D
body: |
  bb.0:
    $r4 = AMOR_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMXOR_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amxor_db.w	$a0, $a1, $a2
name: test_AMXOR_DB_W
body: |
  bb.0:
    $r4 = AMXOR_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMXOR_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amxor_db.d	$a0, $a1, $a2
name: test_AMXOR_DB_D
body: |
  bb.0:
    $r4 = AMXOR_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax_db.w	$a0, $a1, $a2
name: test_AMMAX_DB_W
body: |
  bb.0:
    $r4 = AMMAX_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax_db.d	$a0, $a1, $a2
name: test_AMMAX_DB_D
body: |
  bb.0:
    $r4 = AMMAX_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_DB_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin_db.w	$a0, $a1, $a2
name: test_AMMIN_DB_W
body: |
  bb.0:
    $r4 = AMMIN_DB_W $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_DB_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 1 1 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin_db.d	$a0, $a1, $a2
name: test_AMMIN_DB_D
body: |
  bb.0:
    $r4 = AMMIN_DB_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_DB_WU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax_db.wu	$a0, $a1, $a2
name: test_AMMAX_DB_WU
body: |
  bb.0:
    $r4 = AMMAX_DB_WU $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_DB_DU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax_db.du	$a0, $a1, $a2
name: test_AMMAX_DB_DU
body: |
  bb.0:
    $r4 = AMMAX_DB_DU $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_DB_WU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin_db.wu	$a0, $a1, $a2
name: test_AMMIN_DB_WU
body: |
  bb.0:
    $r4 = AMMIN_DB_WU $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_DB_DU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin_db.du	$a0, $a1, $a2
name: test_AMMIN_DB_DU
body: |
  bb.0:
    $r4 = AMMIN_DB_DU $r5, $r6
...
---
# CHECK-LABEL: test_AMSWAP_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amswap.w	$a0, $a1, $a2
name: test_AMSWAP_W
body: |
  bb.0:
    $r4 = AMSWAP_W $r5, $r6
...
---
# CHECK-LABEL: test_AMSWAP_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amswap.d	$a0, $a1, $a2
name: test_AMSWAP_D
body: |
  bb.0:
    $r4 = AMSWAP_D $r5, $r6
...
---
# CHECK-LABEL: test_AMADD_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amadd.w	$a0, $a1, $a2
name: test_AMADD_W
body: |
  bb.0:
    $r4 = AMADD_W $r5, $r6
...
---
# CHECK-LABEL: test_AMADD_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amadd.d	$a0, $a1, $a2
name: test_AMADD_D
body: |
  bb.0:
    $r4 = AMADD_D $r5, $r6
...
---
# CHECK-LABEL: test_AMAND_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amand.w	$a0, $a1, $a2
name: test_AMAND_W
body: |
  bb.0:
    $r4 = AMAND_W $r5, $r6
...
---
# CHECK-LABEL: test_AMAND_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amand.d	$a0, $a1, $a2
name: test_AMAND_D
body: |
  bb.0:
    $r4 = AMAND_D $r5, $r6
...
---
# CHECK-LABEL: test_AMOR_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amor.w	$a0, $a1, $a2
name: test_AMOR_W
body: |
  bb.0:
    $r4 = AMOR_W $r5, $r6
...
---
# CHECK-LABEL: test_AMOR_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 0 1 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amor.d	$a0, $a1, $a2
name: test_AMOR_D
body: |
  bb.0:
    $r4 = AMOR_D $r5, $r6
...
---
# CHECK-LABEL: test_AMXOR_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amxor.w	$a0, $a1, $a2
name: test_AMXOR_W
body: |
  bb.0:
    $r4 = AMXOR_W $r5, $r6
...
---
# CHECK-LABEL: test_AMXOR_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: amxor.d	$a0, $a1, $a2
name: test_AMXOR_D
body: |
  bb.0:
    $r4 = AMXOR_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax.w	$a0, $a1, $a2
name: test_AMMAX_W
body: |
  bb.0:
    $r4 = AMMAX_W $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax.d	$a0, $a1, $a2
name: test_AMMAX_D
body: |
  bb.0:
    $r4 = AMMAX_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin.w	$a0, $a1, $a2
name: test_AMMIN_W
body: |
  bb.0:
    $r4 = AMMIN_W $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin.d	$a0, $a1, $a2
name: test_AMMIN_D
body: |
  bb.0:
    $r4 = AMMIN_D $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_WU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 1 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax.wu	$a0, $a1, $a2
name: test_AMMAX_WU
body: |
  bb.0:
    $r4 = AMMAX_WU $r5, $r6
...
---
# CHECK-LABEL: test_AMMAX_DU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 1 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammax.du	$a0, $a1, $a2
name: test_AMMAX_DU
body: |
  bb.0:
    $r4 = AMMAX_DU $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_WU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin.wu	$a0, $a1, $a2
name: test_AMMIN_WU
body: |
  bb.0:
    $r4 = AMMIN_WU $r5, $r6
...
---
# CHECK-LABEL: test_AMMIN_DU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 0 1 0 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0
# CHECK-ASM: ammin.du	$a0, $a1, $a2
name: test_AMMIN_DU
body: |
  bb.0:
    $r4 = AMMIN_DU $r5, $r6
...
---
# CHECK-LABEL: test_LDX_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.b	$a0, $a1, $a2
name: test_LDX_B
body: |
  bb.0:
    $r4 = LDX_B  $r5, $r6
...
---
# CHECK-LABEL: test_LDX_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.h	$a0, $a1, $a2
name: test_LDX_H
body: |
  bb.0:
    $r4 = LDX_H  $r5, $r6
...
---
# CHECK-LABEL: test_LDX_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.w	$a0, $a1, $a2
name: test_LDX_W
body: |
  bb.0:
    $r4 = LDX_W $r5, $r6
...
---
# CHECK-LABEL: test_LDX_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.d	$a0, $a1, $a2
name: test_LDX_D
body: |
  bb.0:
    $r4 = LDX_D $r5, $r6
...
---
# CHECK-LABEL: test_LDX_BU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.bu	$a0, $a1, $a2
name: test_LDX_BU
body: |
  bb.0:
    $r4 = LDX_BU $r5, $r6
...
---
# CHECK-LABEL: test_LDX_HU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.hu	$a0, $a1, $a2
name: test_LDX_HU
body: |
  bb.0:
    $r4 = LDX_HU $r5, $r6
...
---
# CHECK-LABEL: test_LDX_WU:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldx.wu	$a0, $a1, $a2
name: test_LDX_WU
body: |
  bb.0:
    $r4 = LDX_WU $r5, $r6
...
---
# CHECK-LABEL: test_LDGT_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldgt.b	$a0, $a1, $a2
name: test_LDGT_B
body: |
  bb.0:
    $r4 = LDGT_B $r5, $r6
...
---
# CHECK-LABEL: test_LDGT_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldgt.h	$a0, $a1, $a2
name: test_LDGT_H
body: |
  bb.0:
    $r4 = LDGT_H $r5, $r6
...
---
# CHECK-LABEL: test_LDGT_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldgt.w	$a0, $a1, $a2
name: test_LDGT_W
body: |
  bb.0:
    $r4 = LDGT_W $r5, $r6
...
---
# CHECK-LABEL: test_LDGT_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldgt.d	$a0, $a1, $a2
name: test_LDGT_D
body: |
  bb.0:
    $r4 = LDGT_D $r5, $r6
...
---
# CHECK-LABEL: test_LDLE_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldle.b	$a0, $a1, $a2
name: test_LDLE_B
body: |
  bb.0:
    $r4 = LDLE_B $r5, $r6
...
---
# CHECK-LABEL: test_LDLE_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldle.h	$a0, $a1, $a2
name: test_LDLE_H
body: |
  bb.0:
    $r4 = LDLE_H $r5, $r6
...
---
# CHECK-LABEL: test_LDLE_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldle.w	$a0, $a1, $a2
name: test_LDLE_W
body: |
  bb.0:
    $r4 = LDLE_W $r5, $r6
...
---
# CHECK-LABEL: test_LDLE_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: ldle.d	$a0, $a1, $a2
name: test_LDLE_D
body: |
  bb.0:
    $r4 = LDLE_D $r5, $r6
...
---
# CHECK-LABEL: test_STX_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stx.b	$a0, $a1, $a2
name: test_STX_B
body: |
  bb.0:
    STX_B $r4, $r5, $r6
...
---
# CHECK-LABEL: test_STX_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stx.h	$a0, $a1, $a2
name: test_STX_H
body: |
  bb.0:
    STX_H $r4, $r5, $r6
...
---
# CHECK-LABEL: test_STX_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stx.w	$a0, $a1, $a2
name: test_STX_W
body: |
  bb.0:
    STX_W $r4, $r5, $r6
...
---
# CHECK-LABEL: test_STX_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stx.d	$a0, $a1, $a2
name: test_STX_D
body: |
  bb.0:
    STX_D $r4, $r5, $r6
...
---
# CHECK-LABEL: test_STGT_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stgt.b	$a0, $a1, $a2
name: test_STGT_B
body: |
  bb.0:
    STGT_B $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STGT_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stgt.h	$a0, $a1, $a2
name: test_STGT_H
body: |
  bb.0:
    STGT_H $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STGT_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stgt.w	$a0, $a1, $a2
name: test_STGT_W
body: |
  bb.0:
    STGT_W $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STGT_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stgt.d	$a0, $a1, $a2
name: test_STGT_D
body: |
  bb.0:
    STGT_D $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STLE_B:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stle.b	$a0, $a1, $a2
name: test_STLE_B
body: |
  bb.0:
    STLE_B $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STLE_H:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stle.h	$a0, $a1, $a2
name: test_STLE_H
body: |
  bb.0:
    STLE_H $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STLE_W:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stle.w	$a0, $a1, $a2
name: test_STLE_W
body: |
  bb.0:
    STLE_W $r4,  $r5, $r6
...
---
# CHECK-LABEL: test_STLE_D:
# CHECK-ENC: 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 1 0 1 0 0 1 0 0
# CHECK-ASM: stle.d	$a0, $a1, $a2
name: test_STLE_D
body: |
  bb.0:
    STLE_D $r4,  $r5, $r6