; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -mtriple=thumbv8.1m.main -mattr=+mve -S %s -o - | FileCheck %s --check-prefix=CHECK-MVE
; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -mtriple=thumbv8.1m.main -S %s -o - | FileCheck %s --check-prefix=CHECK-NOMVE
define i32 @speculate_vector_extract(i32 %d, <4 x i32> %v) {
; CHECK-MVE-LABEL: @speculate_vector_extract(
; CHECK-MVE-NEXT: entry:
; CHECK-MVE-NEXT: [[CONV:%.*]] = insertelement <4 x i32> undef, i32 [[D:%.*]], i32 0
; CHECK-MVE-NEXT: [[CONV2:%.*]] = insertelement <4 x i32> [[CONV]], i32 [[D]], i32 1
; CHECK-MVE-NEXT: [[CONV3:%.*]] = insertelement <4 x i32> [[CONV2]], i32 [[D]], i32 2
; CHECK-MVE-NEXT: [[CONV4:%.*]] = insertelement <4 x i32> [[CONV3]], i32 [[D]], i32 3
; CHECK-MVE-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[CONV4]], <i32 0, i32 -1, i32 -2, i32 -3>
; CHECK-MVE-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP6]], zeroinitializer
; CHECK-MVE-NEXT: [[CMP_EXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
; CHECK-MVE-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 0
; CHECK-MVE-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP8]], 0
; CHECK-MVE-NEXT: br i1 [[TOBOOL]], label [[COND_ELSE:%.*]], label [[COND_THEN:%.*]]
; CHECK-MVE: cond.then:
; CHECK-MVE-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0
; CHECK-MVE-NEXT: br label [[COND_END:%.*]]
; CHECK-MVE: cond.else:
; CHECK-MVE-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[V]], i32 3
; CHECK-MVE-NEXT: br label [[COND_END]]
; CHECK-MVE: cond.end:
; CHECK-MVE-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_THEN]] ], [ [[TMP12]], [[COND_ELSE]] ]
; CHECK-MVE-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 1
; CHECK-MVE-NEXT: [[TOBOOL15:%.*]] = icmp eq i32 [[TMP14]], 0
; CHECK-MVE-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[V]], i32 1
; CHECK-MVE-NEXT: [[COND22:%.*]] = select i1 [[TOBOOL15]], i32 [[COND]], i32 [[TMP20]]
; CHECK-MVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 2
; CHECK-MVE-NEXT: [[TOBOOL25:%.*]] = icmp eq i32 [[TMP24]], 0
; CHECK-MVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[V]], i32 2
; CHECK-MVE-NEXT: [[COND32:%.*]] = select i1 [[TOBOOL25]], i32 [[COND22]], i32 [[TMP30]]
; CHECK-MVE-NEXT: ret i32 [[COND32]]
;
; CHECK-NOMVE-LABEL: @speculate_vector_extract(
; CHECK-NOMVE-NEXT: entry:
; CHECK-NOMVE-NEXT: [[CONV:%.*]] = insertelement <4 x i32> undef, i32 [[D:%.*]], i32 0
; CHECK-NOMVE-NEXT: [[CONV2:%.*]] = insertelement <4 x i32> [[CONV]], i32 [[D]], i32 1
; CHECK-NOMVE-NEXT: [[CONV3:%.*]] = insertelement <4 x i32> [[CONV2]], i32 [[D]], i32 2
; CHECK-NOMVE-NEXT: [[CONV4:%.*]] = insertelement <4 x i32> [[CONV3]], i32 [[D]], i32 3
; CHECK-NOMVE-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[CONV4]], <i32 0, i32 -1, i32 -2, i32 -3>
; CHECK-NOMVE-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP6]], zeroinitializer
; CHECK-NOMVE-NEXT: [[CMP_EXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
; CHECK-NOMVE-NEXT: [[TMP8:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 0
; CHECK-NOMVE-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP8]], 0
; CHECK-NOMVE-NEXT: [[TMP10:%.*]] = extractelement <4 x i32> [[V:%.*]], i32 0
; CHECK-NOMVE-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[V]], i32 3
; CHECK-NOMVE-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 [[TMP12]], i32 [[TMP10]]
; CHECK-NOMVE-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 1
; CHECK-NOMVE-NEXT: [[TOBOOL15:%.*]] = icmp eq i32 [[TMP14]], 0
; CHECK-NOMVE-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[V]], i32 1
; CHECK-NOMVE-NEXT: [[COND22:%.*]] = select i1 [[TOBOOL15]], i32 [[COND]], i32 [[TMP20]]
; CHECK-NOMVE-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[CMP_EXT]], i32 2
; CHECK-NOMVE-NEXT: [[TOBOOL25:%.*]] = icmp eq i32 [[TMP24]], 0
; CHECK-NOMVE-NEXT: [[TMP30:%.*]] = extractelement <4 x i32> [[V]], i32 2
; CHECK-NOMVE-NEXT: [[COND32:%.*]] = select i1 [[TOBOOL25]], i32 [[COND22]], i32 [[TMP30]]
; CHECK-NOMVE-NEXT: ret i32 [[COND32]]
;
entry:
%conv = insertelement <4 x i32> undef, i32 %d, i32 0
%conv2 = insertelement <4 x i32> %conv, i32 %d, i32 1
%conv3 = insertelement <4 x i32> %conv2, i32 %d, i32 2
%conv4 = insertelement <4 x i32> %conv3, i32 %d, i32 3
%tmp6 = add nsw <4 x i32> %conv4, <i32 0, i32 -1, i32 -2, i32 -3>
%cmp = icmp eq <4 x i32> %tmp6, zeroinitializer
%cmp.ext = sext <4 x i1> %cmp to <4 x i32>
%tmp8 = extractelement <4 x i32> %cmp.ext, i32 0
%tobool = icmp eq i32 %tmp8, 0
br i1 %tobool, label %cond.else, label %cond.then
return: ; preds = %cond.end28
ret i32 %cond32
cond.then: ; preds = %entry
%tmp10 = extractelement <4 x i32> %v, i32 0
br label %cond.end
cond.else: ; preds = %entry
%tmp12 = extractelement <4 x i32> %v, i32 3
br label %cond.end
cond.end: ; preds = %cond.else, %cond.then
%cond = phi i32 [ %tmp10, %cond.then ], [ %tmp12, %cond.else ]
%tmp14 = extractelement <4 x i32> %cmp.ext, i32 1
%tobool15 = icmp eq i32 %tmp14, 0
br i1 %tobool15, label %cond.else17, label %cond.then16
cond.then16: ; preds = %cond.end
%tmp20 = extractelement <4 x i32> %v, i32 1
br label %cond.end18
cond.else17: ; preds = %cond.end
br label %cond.end18
cond.end18: ; preds = %cond.else17, %cond.then16
%cond22 = phi i32 [ %tmp20, %cond.then16 ], [ %cond, %cond.else17 ]
%tmp24 = extractelement <4 x i32> %cmp.ext, i32 2
%tobool25 = icmp eq i32 %tmp24, 0
br i1 %tobool25, label %cond.else27, label %cond.then26
cond.then26: ; preds = %cond.end18
%tmp30 = extractelement <4 x i32> %v, i32 2
br label %cond.end28
cond.else27: ; preds = %cond.end18
br label %cond.end28
cond.end28: ; preds = %cond.else27, %cond.then26
%cond32 = phi i32 [ %tmp30, %cond.then26 ], [ %cond22, %cond.else27 ]
br label %return
}